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公开(公告)号：US09339868B2
公开(公告)日：2016-05-17
申请号：US14247274
申请日：2014-04-08
发明人： Joerg Ortner , Michael Sorger
IPC分类号： B22D19/00 , H01L21/02 , H01L21/768 , H01L21/311 , H01L21/48 , H01L23/00 , G03F7/00 , B82Y10/00 , B82Y40/00 , H05K1/02
CPC分类号： B22D19/0072 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L21/02 , H01L21/311 , H01L21/486 , H01L21/76898 , H01L24/03 , H01L24/05 , H01L2224/02371 , H01L2224/0346 , H01L2224/03472 , H01L2224/0502 , H01L2224/06182 , H01L2224/06188 , H01L2224/94 , H01L2924/181 , H05K1/02 , H05K2201/09036 , H05K2203/0108 , H05K2203/308 , Y10S977/887 , H01L2224/03 , H01L2924/00012 , H01L2924/00
摘要： In a method of processing a substrate in accordance with an embodiment, a trench may be formed in the substrate, a stamp device may be disposed at least in the trench; at least one part of the trench that is free from the stamp device may be at least partially filled with trench filling material; and the stamp device may be removed from the trench.
摘要翻译： 在根据实施例的处理衬底的方法中，可以在衬底中形成沟槽，印模器件可以至少设置在沟槽中; 沟槽的至少一部分没有印模装置可以至少部分地填充有沟槽填充材料; 并且邮票装置可以从沟槽中移除。
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公开(公告)号：US20160113087A1
公开(公告)日：2016-04-21
申请号：US14976698
申请日：2015-12-21
CPC分类号： F21K9/66 , F21K9/20 , F21K9/275 , F21K9/278 , F21K9/64 , F21K9/65 , F21V3/02 , F21V9/30 , F21V23/003 , F21V23/02 , F21V29/74 , F21Y2115/10 , G02F1/133603 , H01L23/367 , H01L23/4985 , H01L23/5387 , H01L24/32 , H01L24/83 , H01L25/0753 , H01L27/156 , H01L31/0468 , H01L33/0025 , H01L33/06 , H01L33/08 , H01L33/28 , H01L33/30 , H01L33/32 , H01L33/36 , H01L33/483 , H01L33/486 , H01L33/502 , H01L33/505 , H01L33/58 , H01L33/60 , H01L33/62 , H01L51/0097 , H01L2224/06102 , H01L2224/16225 , H01L2224/2929 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2224/83851 , H01L2225/107 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01058 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/07802 , H01L2924/07811 , H01L2924/10253 , H01L2924/10321 , H01L2924/10322 , H01L2924/10323 , H01L2924/10324 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/381 , H02S30/00 , H05B33/0854 , H05B37/0218 , H05B37/0227 , H05B37/0245 , H05K1/189 , H05K3/323 , H05K2201/09036 , H05K2201/10106 , H05K2203/302 , H01L2924/01015 , H01L2924/01031 , H01L2924/01051 , H01L2924/3512 , H01L2924/00 , H01L2924/00014
摘要： In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.
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公开(公告)号：US20160105950A1
公开(公告)日：2016-04-14
申请号：US14512073
申请日：2014-10-10
申请人： Apple Inc.
发明人： Paul S. Drzaic , Zhen Zhang
CPC分类号： H05K1/028 , B05D3/002 , B05D2201/02 , B29C53/04 , B29L2031/3425 , H05K1/0283 , H05K1/0296 , H05K1/189 , H05K3/0014 , H05K3/28 , H05K2201/09036 , H05K2201/09063 , H05K2201/09218 , H05K2201/09263 , H05K2201/10106
摘要： A flexible substrate may be provided with an array of holes and conductive traces that extend along the flexible substrate between the holes. The flexible substrate may form part of a display or other component in an electronic device. The conductive traces may be metal traces that have meandering path shapes to resist damage upon bending. A polymer coating may be applied over the metal traces to align a neutral stress plane with the metal traces and to serve as a moisture barrier. The holes may allow the flexible substrate to twist and form a three-dimensional shape as the flexible substrate is bent. A rigid or flexible protective coating may be formed by depositing a liquid polymer precursor on the flexible substrate and curing the liquid polymer precursor.
摘要翻译： 柔性基底可以设置有沿着孔之间的柔性基底延伸的孔阵列和导电迹线。 柔性基板可以形成电子设备中的显示器或其他部件的一部分。 导电迹线可以是具有曲折路径形状以抵抗弯曲时的损伤的金属迹线。 聚合物涂层可以施加在金属迹线上，以将中性应力平面与金属迹线对准并用作防潮层。 当柔性基板弯曲时，孔可以允许柔性基板扭曲并形成三维形状。 可以通过在柔性基底上沉积液体聚合物前体并固化液体聚合物前体来形成刚性或柔性保护涂层。
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64.发明授权公开(公告)号：US09313896B2
公开(公告)日：2016-04-12
申请号：US14000098
申请日：2013-07-05
发明人： Fei Zhou , Yulong Gao , Miaoqian Cao , Ying Gu
CPC分类号： H05K3/1258 , H05K1/0298 , H05K3/107 , H05K3/4635 , H05K2201/0108 , H05K2201/09036 , H05K2203/0278 , Y10T156/1028 , Y10T428/24917
摘要： A double-layered transparent conductive film includes: a first substrate; a first imprint adhesive layer formed on the first substrate, the first imprint adhesive layer defining a first mesh-shaped groove, the first mesh-shaped groove forming a first mesh; a first conductive layer including conductive material filled in the first mesh-shaped groove; a tackifier layer formed on the first imprint adhesive layer and the first conductive layer; a second substrate formed on the tackifier layer; a second imprint adhesive layer formed on the second substrate, the second imprint adhesive layer defining a second mesh-shaped groove, the second mesh-shaped groove forming a second mesh, wherein one of the first mesh and the second mesh is a regular mesh, the other is a random mesh; and a second conductive layer including conductive material filled in the second mesh-shaped groove. During the lamination, no alignment accuracy is needed, such that the production efficiency is greatly improved. A method of manufacturing the double-layered transparent conductive film is also provided.
摘要翻译： 双层透明导电膜包括：第一基板; 形成在所述第一基板上的第一压印粘合剂层，所述第一压印粘合剂层限定第一网状槽，所述第一网状槽形成第一网; 第一导电层，包括填充在第一网状槽中的导电材料; 形成在所述第一压印粘合剂层和所述第一导电层上的增粘层; 形成在增粘层上的第二基底; 形成在所述第二基板上的第二印记粘合剂层，所述第二印记粘合剂层限定第二网状凹槽，所述第二网状凹槽形成第二网格，其中所述第一网格和所述第二网格中的一个是规则网格， 另一个是随机网格; 以及第二导电层，包括填充在第二网状槽中的导电材料。 在层压期间，不需要对准精度，从而大大提高了生产效率。 还提供了制造双层透明导电膜的方法。
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公开(公告)号：US20160093431A1
公开(公告)日：2016-03-31
申请号：US14963619
申请日：2015-12-09
发明人： James E. Quilici
CPC分类号： H01F17/0033 , H01F5/00 , H01F17/062 , H01F27/027 , H01F27/24 , H01F27/2804 , H01F27/2895 , H01F41/02 , H01F41/0206 , H01F41/041 , H01F41/042 , H01F41/064 , H01F2027/2809 , H01F2027/2814 , H05K1/0284 , H05K1/165 , H05K3/0014 , H05K3/045 , H05K3/4611 , H05K2201/086 , H05K2201/09036 , H05K2201/09045 , H05K2201/09118 , Y10T29/4902 , Y10T29/49073 , Y10T29/49075 , Y10T156/10
摘要： Disclosed are apparatus and methods for arrayed embedded magnetic components that include magnetic devices that have a core that is embedded between two or more substrates and a winding pattern surrounding the core that is implemented on and through the two or more substrates. The winding pattern is operable to induce a magnetic flux within the core when energized by a time varying voltage potential. The winding pattern may be implemented by printed circuit layers, plated vias, other electrically conductive elements, and combinations thereof. Arrayed embedded magnetic components include two or more electrically interconnected magnetic devices positioned side-by-side in a horizontal integration, positioned top-to-bottom in a vertical integration, or combinations thereof. The magnetic devices may have a magnetic functionality such as, but not limited to, a transformer, inductor, and filter. Disclosed magnetic components and methods provide for low cost construction, consistent performance, and a low profile form, among other benefits.
摘要翻译： 公开了用于阵列嵌入式磁性部件的装置和方法，其包括具有嵌入在两个或更多个基板之间的磁芯的磁性装置和围绕该芯的绕组图案，该绕组图案被实现在并通过两个或多个基板。 当通过时变电压电位通电时，绕组模式可操作以在芯内感应磁通量。 绕组图案可以由印刷电路层，电镀通孔，其它导电元件及其组合来实现。 阵列嵌入式磁性部件包括以水平整合并排定位的两个或更多个电互连磁性装置，以垂直整合方式从顶部到底部定位，或其组合。 磁性器件可以具有磁性功能，例如但不限于变压器，电感器和滤波器。 公开的磁性部件和方法提供了低成本构造，一致的性能和低调的形式以及其他益处。
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公开(公告)号：US20160081235A1
公开(公告)日：2016-03-17
申请号：US14954206
申请日：2015-11-30
发明人： JEN-CHUN CHEN , PAI-SHENG SHIH
CPC分类号： H05K9/0022 , H01L21/568 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2924/1815 , H01L2924/3025 , H05K1/181 , H05K9/0037 , H05K9/0039 , H05K9/0064 , H05K13/046 , H05K2201/09036 , H05K2201/10371 , Y10T29/49155
摘要： A manufacturing method of electronic packaged device includes the following. A plurality of electronic components is disposed on a substrate carrier. An encapsulating member is disposed on the substrate carrier and covers the electronic components. The substrate carrier is separated from the encapsulating member. A plurality of first trenches is arranged on a first surface of the encapsulating member. Conductive material is disposed onto the first surface and into the first trenches to form a conductive layer. The conductive layer is patterned on the first surface to form a circuit layer. The circuit layer includes at least one grounding pad. A plurality of second trenches is arranged on a second surface of the encapsulating member. At least one shielding structure is formed in the first trenches and the second trenches. An electromagnetic shielding layer is connected to the grounding pad.
摘要翻译： 电子封装装置的制造方法包括以下。 多个电子部件设置在基板载体上。 封装构件设置在基板载体上并覆盖电子部件。 衬底载体与封装构件分离。 多个第一沟槽布置在封装构件的第一表面上。 导电材料设置在第一表面上并进入第一沟槽中以形成导电层。 在第一表面上形成导电层以形成电路层。 电路层包括至少一个接地垫。 多个第二沟槽布置在封装构件的第二表面上。 在第一沟槽和第二沟槽中形成至少一个屏蔽结构。 电磁屏蔽层连接到接地垫。
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67.发明授权Multilayer wiring board with built-in electronic component and method for manufacturing the same 有权具有内置电子部件的多层接线板及其制造方法公开(公告)号：US09282635B2
公开(公告)日：2016-03-08
申请号：US14669329
申请日：2015-03-26
申请人： IBIDEN CO., LTD.
发明人： Toyotaka Shimabe , Shunsuke Sakai
CPC分类号： H05K1/0284 , H01L21/568 , H01L24/19 , H01L24/25 , H01L2224/04105 , H01L2224/16227 , H01L2224/2518 , H01L2224/82039 , H01L2924/15313 , H05K1/185 , H05K3/4602 , H05K3/4697 , H05K2201/0344 , H05K2201/09036 , H05K2201/09145 , H05K2201/09154 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10522 , H05K2201/10636 , Y02P70/611 , Y10T29/4913
摘要： A multilayer wiring board with a built-in electronic component includes a substrate, a conductor layer formed on surface of the substrate, one or more electronic components positioned in a cavity formed through the substrate, an insulating layer formed on the substrate such that the insulating layer is formed on the component in the cavity, and a wiring layer formed on the insulating layer. The conductor layer has an opening formed such that the cavity is formed in the opening of the conductor layer and that the conductor layer has a first side in the opening and a second side in the opening on the opposite side across the cavity, and the cavity is formed in the opening of the conductor layer such that width between the cavity and the first side of the conductor layer is greater than width between the cavity and the second side of the conductor layer.
摘要翻译： 具有内置电子部件的多层布线基板包括基板，形成在基板的表面上的导体层，位于通过基板形成的空腔中的一个或多个电子部件，形成在基板上的绝缘层， 在空腔中的部件上形成层，以及形成在绝缘层上的布线层。 导体层具有形成为使得空腔形成在导体层的开口中并且导体层在开口中具有第一侧的开口，并且在开口中的相对于空腔的开口中的第二侧，并且空腔 形成在导体层的开口中，使得空腔和导体层的第一侧之间的宽度大于导体层的空腔和第二侧之间的宽度。
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68.发明申请Power Semiconductor Module System Having a High Isolation Strength and Method for Producing a Power Semiconductor Module Arrangement Having a High Isolation Strength 有权具有高隔离强度的功率半导体模块系统和用于制造具有高隔离强度的功率半导体模块布置的方法公开(公告)号：US20160029478A1
公开(公告)日：2016-01-28
申请号：US14809714
申请日：2015-07-27
发明人： Reinhold Bayerer
CPC分类号： H05K1/0256 , H01L23/04 , H01L2924/0002 , H05K1/18 , H05K1/181 , H05K3/30 , H05K3/306 , H05K2201/0761 , H05K2201/09036 , H05K2201/10166 , H05K2201/10303 , H05K2201/2036 , H01L2924/00
摘要： A power semiconductor module includes a module housing having a top side, a first terminal group, and a second terminal group. A circuit board, which has a first electrode and a second electrode, is mountable on the power semiconductor module in such a way that in the mounted state each terminal of the first group is electrically conductively connected to the first electrode and each terminal of the second group is electrically conductively connected to the second electrode. A first isolation web and/or a second isolation web is provided. Each isolation web is fixed to the circuit board even in the unmounted state, and arranged between the first terminal group and the second terminal group in the mounted state.
摘要翻译： 功率半导体模块包括具有顶侧，第一端子组和第二端子组的模块外壳。 具有第一电极和第二电极的电路板可以安装在功率半导体模块上，使得在安装状态下，第一组的每个端子与第一电极和第二电极的每个端子导电连接 组与第二电极导电连接。 提供了第一隔离网和/或第二隔离网。 即使处于未安装状态，每个隔离网固定到电路板，并且在安装状态下布置在第一端子组和第二端子组之间。
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公开(公告)号：US20160021780A1
公开(公告)日：2016-01-21
申请号：US14797304
申请日：2015-07-13
发明人： Alexander Schwarz
CPC分类号： H05K7/205 , H01L23/13 , H01L23/15 , H01L23/367 , H01L23/49838 , H01L2224/32225 , H05K1/0204 , H05K1/0306 , H05K1/09 , H05K1/181 , H05K3/0061 , H05K3/303 , H05K2201/066 , H05K2201/09009 , H05K2201/09036 , H05K2201/09745
摘要： A semiconductor module includes a carrier having a first carrier surface and a second carrier surface opposite the first carrier surface, a first semiconductor chip mounted over the first carrier surface and a heatsink coupled to the second carrier surface with a first heatsink surface facing the carrier. The second carrier surface or the first heatsink surface has at least one cavity in the form of one or more of dimples and trenches.
摘要翻译： 半导体模块包括具有第一载体表面和与第一载体表面相对的第二载体表面的载体，安装在第一载体表面上的第一半导体芯片和耦合到第二载体表面的散热器，其具有面向载体的第一散热器表面。 第二载体表面或第一散热表面具有凹坑和沟槽中的一个或多个形式的至少一个空腔。
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公开(公告)号：US20150377731A1
公开(公告)日：2015-12-31
申请号：US14766767
申请日：2014-01-24
发明人： Ulfert Drewes , Elke Schmidt
CPC分类号： G01L9/0075 , G01L19/0061 , H05K1/0218 , H05K1/0306 , H05K1/111 , H05K1/113 , H05K3/341 , H05K3/3421 , H05K2201/09036 , H05K2201/10151 , H05K2201/2036 , Y02P70/611 , Y02P70/613
摘要： method for soldering a connection element to a connection point on an electrically conductive coating that is suitable for soft-soldering on an insulating surface of a base body using a soft-soldering method; as well as sensors manufactured using this method for which a spatial limitation of the wetting of the coating with soft-solder material, during the process of soft-soldering, is effected by providing a groove in the base body which at least partly surrounds the connection point on the outside. At least a part of the area of the external insulating surface of the base body including the connection point is coated with the coating, and soft-solder material is locally applied to the connection point and the connection element is soldered onto the connection point using the applied soft-solder material in a soft-soldering process.
摘要翻译： 使用软焊接方法将连接元件焊接到适用于基体绝缘表面的软焊上的导电涂层上的连接点的方法; 以及使用这种方法制造的传感器，其通过在基体中设置沟槽来实现在软焊接过程中用软焊料材料涂层的润湿的空间限制，所述凹槽至少部分地围绕连接 点在外面。 包括连接点的基体的外部绝缘表面的至少一部分区域涂覆有涂层，并且软焊料材料局部地施加到连接点，并且使用连接点将连接元件焊接到连接点上 在软焊工艺中应用软焊料。
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