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公开(公告)号:US09761540B2
公开(公告)日:2017-09-12
申请号:US14927491
申请日:2015-10-30
发明人: Shing-Yih Shih
IPC分类号: H01L23/48 , H01L23/00 , H01L23/498 , H01L23/367 , H01L23/373 , H01L23/16 , H01L21/56 , H01L23/31
CPC分类号: H01L23/562 , H01L21/486 , H01L21/561 , H01L23/147 , H01L23/16 , H01L23/3128 , H01L23/367 , H01L23/3672 , H01L23/3736 , H01L23/4334 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L2224/16 , H01L2224/16238 , H01L2224/73204 , H01L2224/81005 , H01L2224/81192 , H01L2224/83005 , H01L2224/92125 , H01L2224/94 , H01L2224/97 , H01L2924/15311 , H01L2924/157 , H01L2924/1815 , H01L2924/3511 , H01L2224/81 , H01L2224/83
摘要: A semiconductor device that includes a redistribution layer (RDL) is disclosed. A chip is mounted on the RDL within a chip mounting area. The RDL is electrically connected to the chip. A molding compound covers and encapsulates the chip. A first stress-relief feature is embedded in the molding compound within a peripheral area adjacent to the chip mounting area. A second stress-relief feature is embedded in the molding compound within the chip mounting area. The first stress-relief feature is composed of a first material. The second stress-relief feature is composed of a second material that is different from the first material.
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公开(公告)号:US20170236763A1
公开(公告)日:2017-08-17
申请号:US15584864
申请日:2017-05-02
发明人: Chen-Hua Yu , Tsung-Ding Wang , Chen-Shien Chen , Chung-Shi Liu , Jiun Yi Wu
IPC分类号: H01L23/16 , H01L25/18 , H01L23/498 , H01L23/31
CPC分类号: H01L23/16 , H01L21/563 , H01L21/764 , H01L23/295 , H01L23/3128 , H01L23/315 , H01L23/36 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/80 , H01L24/92 , H01L25/105 , H01L25/18 , H01L25/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/80895 , H01L2224/92125 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2225/1094 , H01L2924/00014 , H01L2924/15311 , H01L2924/15331 , H01L2924/18161 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A device includes a bottom package component that includes a bottom die, and a dam over a top surface of the bottom die. The dam has a plurality of sides forming a partial ring, with an air gap surrounded by the plurality of side portions. The air gap overlaps the bottom die. A top package component is bonded to the bottom package component, wherein the air gap separates a bottom surface of the top package component from the bottom die.
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73.
公开(公告)号:US20170207199A1
公开(公告)日:2017-07-20
申请号:US15397136
申请日:2017-01-03
申请人: FUJITSU LIMITED
发明人: Hidehiko Kira , NORIO KAINUMA
IPC分类号: H01L25/065 , H01L23/00 , H01L21/56 , H01L23/31 , H01L25/00
CPC分类号: H01L25/0657 , H01L21/56 , H01L23/16 , H01L23/3142 , H01L24/17 , H01L25/043 , H01L25/074 , H01L25/0756 , H01L25/50 , H01L2224/05025 , H01L2224/05147 , H01L2224/13023 , H01L2224/13025 , H01L2224/16113 , H01L2224/16148 , H01L2224/17517 , H01L2224/2919 , H01L2224/32145 , H01L2224/73204 , H01L2224/81191 , H01L2224/81203 , H01L2224/83203 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/06575 , H01L2225/06593
摘要: A laminated semiconductor device includes: three or more semiconductor chips that are laminated; resins that are disposed among the semiconductor chips, the resins softening by heating; and support members that are disposed among the semiconductor chips and that contacts the adjacent semiconductor chips, the support members deforming by external force when a temperature of the support members reaching a predetermined temperature.
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公开(公告)号:US09704775B2
公开(公告)日:2017-07-11
申请号:US15285206
申请日:2016-10-04
申请人: FUJITSU LIMITED
发明人: Naoaki Nakamura
IPC分类号: H01L21/00 , H01L23/373 , H01L23/42 , B23K1/00 , B23K35/26 , C22C28/00 , H01L21/48 , H01L23/16 , H01L23/00
CPC分类号: H01L23/3736 , B23K1/0016 , B23K35/26 , C22C28/00 , H01L21/4871 , H01L23/16 , H01L23/42 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L2224/13111 , H01L2224/16225 , H01L2224/271 , H01L2224/2711 , H01L2224/29012 , H01L2224/29013 , H01L2224/29014 , H01L2224/29076 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/29139 , H01L2224/29147 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/83101 , H01L2224/83815 , H01L2924/00011 , H01L2924/014 , H01L2924/10253 , H01L2924/15311 , H01L2924/16195 , H01L2924/3511 , Y10T428/12458 , H01L2924/01047 , H01L2924/01082 , H01L2924/00014 , H01L2924/01029 , H01L2924/01083 , H01L2924/00012 , H01L2924/00 , H01L2224/83205
摘要: A thermal interface sheet includes a peripheral portion, in a surface direction, configured to have a melting point higher than the melting point of a central portion in the surface direction.
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公开(公告)号:US09683886B2
公开(公告)日:2017-06-20
申请号:US14587147
申请日:2014-12-31
发明人: Chih-Chen Lai
IPC分类号: G01J1/04 , G01J1/02 , H01L23/16 , H01L31/0203 , H05K3/30
CPC分类号: G01J1/0411 , G01J1/0271 , H01L23/16 , H01L31/0203 , H01L31/167 , H01L2924/0002 , H05K3/303 , H05K2201/10121 , H05K2203/167 , Y02P70/613 , H01L2924/00
摘要: A photoelectric converting module includes a circuit board, at least one light emitting/receiving unit and an optical coupler both mounted on the circuit board. Each light emitting/receiving unit includes a light emitter and a light receiver, the light emitter and the light receiver each include at least one positioning projection. The optical coupler includes positioning parts to engage with the positioning projections for aligning the optical coupler with the light emitting/receiving unit precisely.
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公开(公告)号:US20170170100A1
公开(公告)日:2017-06-15
申请号:US15444773
申请日:2017-02-28
发明人: Yuichi YATO , Hiroi OKA , Noriko OKUNISHI , Keita TAKADA
IPC分类号: H01L23/495 , H01L23/24 , H01L23/00 , H01L23/13 , H01L23/31
CPC分类号: H01L23/49513 , H01L21/565 , H01L23/13 , H01L23/16 , H01L23/24 , H01L23/3121 , H01L23/3142 , H01L23/4952 , H01L23/49524 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49582 , H01L23/49805 , H01L23/49844 , H01L23/562 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/743 , H01L24/77 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/37147 , H01L2224/40091 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/48624 , H01L2224/48644 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/743 , H01L2224/83192 , H01L2224/83439 , H01L2224/8385 , H01L2224/83862 , H01L2224/84205 , H01L2224/84439 , H01L2224/8501 , H01L2224/85181 , H01L2224/85205 , H01L2224/85439 , H01L2224/92157 , H01L2224/92247 , H01L2924/00014 , H01L2924/1301 , H01L2924/13091 , H01L2924/15747 , H01L2924/181 , H01L2924/18301 , H01L2924/351 , H01L2924/00 , H01L2924/0665 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor device according to an embodiment is a semiconductor device in which a semiconductor chip mounted on a chip mounting part is sealed by resin and a first member is fixed to a chip mounting surface side between a peripheral portion of the semiconductor chip and a peripheral portion of the chip mounting part. Also, the first member is sealed by the resin. Also, a length of the first part of the chip mounting part in the first direction is larger than a length of the semiconductor chip in the first direction, in a plan view.
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公开(公告)号:US20170170087A1
公开(公告)日:2017-06-15
申请号:US14967993
申请日:2015-12-14
申请人: Intel Corporation
发明人: Omkar Karhade , Kedar Dhane
IPC分类号: H01L23/16
CPC分类号: H01L23/16 , H01L23/562 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/92 , H01L2224/131 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/00014 , H01L2924/014 , H01L2924/3511 , H01L2924/3512
摘要: An electronic package that includes a substrate; a die attached to the substrate; an underfill positioned between the die and the substrate due to capillary action; a first support adjacent to the die and attached to the substrate; and a second support mounted on the first support, wherein the second support is closer to the die than the first support, wherein first support surrounds the die and the second support surrounds the die, and wherein the second support is a different material than the first support. The die may be flip chip bonded to the substrate and the underfill may secure the die to the substrate. The first support may be attached to the substrate using an adhesive and the second support may be attached to the first support using an adhesive.
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公开(公告)号:US20170162468A1
公开(公告)日:2017-06-08
申请号:US15179752
申请日:2016-06-10
发明人: Jae Hyun KO
IPC分类号: H01L23/373 , H01L23/367 , H01L23/498 , H01L23/00 , H01L23/31
CPC分类号: H01L23/3735 , H01L23/051 , H01L23/16 , H01L23/3107 , H01L23/3121 , H01L23/3675 , H01L23/4334 , H01L23/49833 , H01L23/49861 , H01L24/33 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/92 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48106 , H01L2224/48245 , H01L2224/73265 , H01L2224/83801 , H01L2224/85801 , H01L2224/92247 , H01L2924/00014 , H01L2924/01004 , H01L2924/05032 , H01L2924/0532 , H01L2924/05432 , H01L2924/1203 , H01L2924/1301 , H01L2924/13034 , H01L2924/13055 , H01L2924/13091 , H01L2924/15747 , H01L2224/05599 , H01L2224/45099 , H01L2224/85399
摘要: Disclosed relates to a power module package and a method for manufacturing the same. The power module package includes a lower substrate on which a pattern is formed, a power semiconductor element and a ribbon which are separated apart from each other at a predetermined distance to be mounted on an upper surface of the lower substrate, a first spacer attached to an upper portion of the power semiconductor element via a first adhesive layer, a second spacer attached to an upper portion of the ribbon via a second adhesive layer, and an upper substrate attached to an upper portion of each of the first and second spacers via a third adhesive layer.
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79.
公开(公告)号:US20170133352A1
公开(公告)日:2017-05-11
申请号:US15415844
申请日:2017-01-25
发明人: Charles W. C. Lin , Chia-Chung Wang
IPC分类号: H01L25/065 , H01L23/538 , H01L21/48 , H01L25/00 , H01L23/367 , H01L23/31 , H01L23/00 , H01L21/56 , H01L21/683
CPC分类号: H01L25/0657 , H01L21/4857 , H01L21/56 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/13 , H01L23/16 , H01L23/3128 , H01L23/36 , H01L23/3675 , H01L23/49816 , H01L23/49822 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L23/544 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/97 , H01L25/50 , H01L2221/68345 , H01L2221/68359 , H01L2221/68381 , H01L2223/54426 , H01L2223/54486 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/16235 , H01L2224/32225 , H01L2224/32245 , H01L2224/73253 , H01L2224/73267 , H01L2224/81005 , H01L2224/81203 , H01L2224/81207 , H01L2224/81815 , H01L2224/83005 , H01L2224/8314 , H01L2224/92225 , H01L2224/92244 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06572 , H01L2225/06586 , H01L2225/06589 , H01L2924/15153 , H01L2924/15192 , H01L2924/15311 , H01L2924/15313 , H01L2924/18161 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H01L2924/3511 , H01L2924/37001 , H01L2224/83 , H01L2224/81
摘要: A semiconductor assembly with three dimensional integration includes a face-to-face semiconductor sub-assembly electrically coupled to a heat spreader by bonding wires. The face-to-face semiconductor sub-assembly includes top and bottom devices assembled on opposite sides of a first routing circuitry, and the heat spreader includes a metal plate and a second routing circuitry on the metal plate. The sub-assembly is disposed in a through opening of the second routing circuitry of the heat spreader, and the bonding wires provide electrical connections between the first and second routing circuitries for interconnecting the devices face-to-face assembled in the sub-assembly to terminal pads provided in the heat spreader
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公开(公告)号:US09627286B1
公开(公告)日:2017-04-18
申请号:US15203068
申请日:2016-07-06
发明人: Kuo-Hsiung Li , Chi-Chih Shen , Jui-Cheng Chuang , Jen-Yu Chen
IPC分类号: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/16 , H01L23/055
CPC分类号: H01L23/16 , H01L23/04 , H01L23/055 , H01L23/10
摘要: The invention provides a package structure which includes a substrate, at least one chip module, and a housing. The at least one chip module is located on the substrate. The housing includes an upper cover, a surrounding wall, and at least one adhesion enhancement structure. The surrounding wall is connected to the upper cover and encompasses the at least one chip module. The surrounding wall and the adhesion enhancement structure are bonded to the substrate by an adhesive. The adhesion enhancement structure includes an encircled hole or a semi-encircled hole.
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