公开(公告)号：WO2015175557A1

公开(公告)日：2015-11-19

申请号：PCT/US2015/030413

申请日：2015-05-12

Applicant: INVENSAS CORPORATION

Inventor： UZOH, Cyprian, Emeka ,  KATKAR, Rajesh

IPC: H01L21/60 ,  H01L23/485 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/98 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L23/49811 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/0266 ,  B23K35/22 ,  B23K2201/40 ,  B32B15/01 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03 ,  H01L2224/03001 ,  H01L2224/03009 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/03334 ,  H01L2224/0348 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/051 ,  H01L2224/05294 ,  H01L2224/05547 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/056 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/2401 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/75253 ,  H01L2224/81 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82105 ,  H01L2224/83 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841

Abstract: In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion (510) of a solder ball's (140) surface is melted when the connection is formed on one structure (110) and/or when the connection is being attached to another structure (HOB). The structure (110) may be an integrated circuit, an interposer, a rigid or flexible wiring substrate, a printed circuit board, some other packaging substrate, or an integrated circuit package. In some embodiments, solder balls (140.1, 140.2) are joined by an intermediate solder ball (140i), upon melting of the latter only. Any of the solder balls (140, 140i) may have a non-solder central core (140C) coated by solder shell (140S). Some of the molten or softened solder may be squeezed out, to form a "squeeze-out" region (520, 520A, 520B, 520.1, 520.2). In some embodiments, a solder connection (210) such as discussed above, on a structure (110A), may be surrounded by a dielectric layer (1210), and may be recessed in a hole (1230) in that layer (1210), to help in aligning a post (1240) of a structure (HOB) with the connection (210) during attachment of the structures (110A, HOB). The dielectric layer (1210) may be formed by moulding. The dielectric layer may comprise a number of layers (1210.1, 1210.2), "shaved" (partially removed) to expose the solder connection (210). Alternatively, the recessed solder connections (210) may be formed using a sublimating or vapourisable material (1250), placed on top of the solder (210) before formation of the dielectric layer (1210) or coating solder balls (140); in the latter case, the solder (140C) sinks within the dielectric material (1210) upon removal of the material (1250) and subsequent reflow. In some embodiments, the solder connections (210) may also be formed in openings (2220) in a dielectric layer (2210) (photoimageable polymer or inorganic) by solder paste printing and/or solder ball jet placement followed by reflow to let the solder sink to the bottom of the openings (2220), with possible repetition of the process and possible use of different solders in the different steps. The solder connections (210, 210.1, 210.2) may be used for bonding one or more structures (HOB, HOC) (e.g. an integrated circuit die or wafer, a packaging substrate or a package) to a structure (110A) (a wiring substrate) on which a die (HOB) is flip-chip connected. The solder connections (210, 210.1, 210.2) may differ from each other, in particular in height, which can be used for attaching a structure (HOB) with posts (1240) of different heights or for attaching two structures (HOB, HOC) in the case of a stepped form of the dielectric layer, one of the structures (HOC) being possibly placed higher than the other structure (HOB). In some embodiments, the structure (HOA) may be removed after bonding to the structures (HOB, HOC) and a redistribution layer (3210) may be formed to provide connecting lines (3220) connecting the solder connections (210) to contact pads (120R) and possibly interconnecting between the solder connections (210) and/or between the contact pads (120R).

Abstract translation: 在一些实施例中，为了增加将不同结构与一个或多个焊球连接的焊料连接的高度与间距比，当焊接球（140）表面的一部分（510）形成在 一个结构（110）和/或当连接被附接到另一个结构（HOB）时。 结构（110）可以是集成电路，插入器，刚性或柔性布线基板，印刷电路板，一些其它封装基板或集成电路封装。 在一些实施例中，焊料球（140.1,140.2）仅在熔化时被中间焊球（140i）连接。 任何焊球（140,140i）可以具有由焊料壳（140S）涂覆的非焊料中心芯（140C）。 一些熔融或软化的焊料可能被挤出，以形成“挤出”区域（520,520A，520B，520.1,520.2）。 在一些实施例中，在结构（110A）上的如上所述的焊料连接（210）可被电介质层（1210）包围，并且可以凹入该层（1210）中的孔（1230）中， 以在结构（110A，110B）的附接期间帮助将结构的柱（1240）与连接件（210）对齐。 电介质层（1210）可以通过模制形成。 介电层可以包括多个层（1210.1,1212.2），“剃光”（部分去除）以暴露焊料连接（210）。 或者，可以在形成电介质层（1210）或涂覆焊球（140）之前使用升华或蒸发的材料（1250）形成凹陷的焊料连接（210），放置在焊料（210）的顶部上。 在后一种情况下，当去除材料（1250）和随后的回流时，焊料（140C）在电介质材料（1210）内下沉。 在一些实施例中，焊料连接（210）还可以通过焊膏印刷和/或焊球喷射放置形成在电介质层（2210）（可光成像的聚合物或无机）中的开口（2220）中，然后回流以使焊料 沉入开口（2220）的底部，可能重复该过程并可能在不同步骤中使用不同的焊料。 焊接连接（210,210.1,210.2）可以用于将一个或多个结构（HOB，HOC）（例如，集成电路管芯或晶片，封装衬底或封装）结合到结构（110A）（布线基板 ），其上晶片（HOB）被倒装连接。 焊接连接（210,210.1,210.2）可以彼此不同，特别是在高度上可以不同，其可用于将结构（HOB）与不同高度的柱（1240）连接或用于附接两个结构（HOB，HOC） 在阶梯形状的电介质层的情况下，结构（HOC）中的一个可能被放置得高于其他结构（HOB）。 在一些实施例中，可以在结合到结构（HOB，HOC）之后去除结构（HOA），并且可以形成再分布层（3210），以提供将焊接连接（210）连接到接触焊盘的连接线（3220） 120R），并且可能在焊料连接（210）和/或接触焊盘（120R）之间互连。

公开(公告)号：WO2015121199A3

公开(公告)日：2015-11-19

申请号：PCT/EP2015052647

申请日：2015-02-09

Applicant: AMS AG

Inventor： SCHREMS MARTIN ,  STERING BERNHARD ,  ETSCHMAIER HARALD

IPC: H01L23/485 ,  H01L23/31

CPC classification number: H01L24/11 ,  H01L23/31 ,  H01L23/3157 ,  H01L23/481 ,  H01L23/485 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02125 ,  H01L2224/03001 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05563 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/05576 ,  H01L2224/05599 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: The semiconductor device comprises a semiconductor substrate (1) with a main surface (10) and a further main surface (11) opposite the main surface, a TSV (3) penetrating the substrate from the main surface to the further main surface, a metallization (13) of the TSV, an under-bump metallization (5) and a bump contact (6) at least partially covering the TSV at the further main surface. The TSV (3) comprises a cavity (15), which may be filled with a gas or liquid. An opening (15') of the cavity is provided to expose the cavity to the environment.

Abstract translation: 半导体器件包括具有主表面（10）和与主表面相对的另一主表面（11）的半导体衬底（1），从主表面穿透衬底到另一主表面的TSV（3），金属化 （13），凸块下金属化部（5）和至少部分地在另一个主表面处覆盖TSV的凸块接触部（6）。 TSV（3）包括空腔（15），其可以填充有气体或液体。 提供空腔的开口（15'）以将空腔暴露于环境。

公开(公告)号：WO2015121199A2

公开(公告)日：2015-08-20

申请号：PCT/EP2015/052647

申请日：2015-02-09

Applicant: AMS AG

Inventor： SCHREMS, Martin ,  STERING, Bernhard ,  ETSCHMAIER, Harald

IPC: H01L23/485

CPC classification number: H01L24/11 ,  H01L23/31 ,  H01L23/3157 ,  H01L23/481 ,  H01L23/485 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02125 ,  H01L2224/03001 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05563 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/05576 ,  H01L2224/05599 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: The semiconductor device comprises a semiconductor substrate (1) with a main surface (10) and a further main surface (11) opposite the main surface, a TSV (3) penetrating the substrate from the main surface to the further main surface, a metallization (13) of the TSV, an under-bump metallization (5) and a bump contact (6) at least partially covering the TSV at the further main surface. The TSV (3) comprises a cavity (15), which may be filled with a gas or liquid. An opening (15') of the cavity is provided to expose the cavity to the environment.

Abstract translation: 半导体器件包括具有主表面（10）和与主表面相对的另一主表面（11）的半导体衬底（1），从主表面到另一主表面穿透衬底的TSV（3），金属化 （13），凸块下金属化（5）和凸起接触（6），其至少部分地覆盖在另一主表面处的TSV。 TSV（3）包括可以填充有气体或液体的空腔（15）。 提供空腔的开口（15'）以将空腔暴露于环境中。

公开(公告)号：WO2012067992A3

公开(公告)日：2012-12-20

申请号：PCT/US2011060553

申请日：2011-11-14

Applicant: TESSERA INC ,  HABA BELGACEM

Inventor： HABA BELGACEM

IPC: H01L23/485 ,  H01L21/60

CPC classification number: H01L24/05 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0657 ,  H01L2224/03001 ,  H01L2224/03003 ,  H01L2224/0311 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05576 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05686 ,  H01L2224/0569 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/16145 ,  H01L2224/16221 ,  H01L2224/29018 ,  H01L2224/29026 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1032 ,  H01L2924/10329 ,  H01L2924/1037 ,  H01L2924/1203 ,  H01L2924/12042 ,  H01L2924/1304 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1461 ,  H01L2924/20107 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An assembly 100 and method of making same are provided. The assembly 100 can include a first component 105 including a dielectric region 120 having an exposed surface 122, a conductive pad 134 at the surface 122 defined by a conductive element 132 having at least a portion extending in an oscillating or spiral path along the surface 122, and a an electrically conductive bonding material 140 joined to the conductive pad 134 and bridging an exposed portion 137 of the dielectric surface 122 between adjacent segments 136, 138. The conductive pad 134 can permit electrical interconnection of the first component 105 with a second component 107 having a terminal 108 joined to the pad 134 through the electrically conductive bonding material 140. The path of the conductive element 132 may or may not overlap or cross itself.

Abstract translation: 提供组件100及其制造方法。 组件100可以包括第一部件105，其包括具有暴露表面122的电介质区域120，在由导电元件132限定的表面122处的导电焊盘134，导电元件132具有沿着表面122的振荡或螺旋路径延伸的至少一部分 以及连接到导电焊盘134并桥接相邻段136,138之间的电介质表面122的暴露部分137的导电接合材料140.导电焊盘134可以允许第一部件105与第二部件 107具有通过导电接合材料140接合到焊盘134的端子108.导电元件132的路径可以或可以不与其自身重叠或交叉。

公开(公告)号：WO2016056750A1

公开(公告)日：2016-04-14

申请号：PCT/KR2015/009228

申请日：2015-09-02

Applicant: LG ELECTRONICS INC.

Inventor： YUH, Hwankuk

IPC: H01L33/62 ,  H01L33/36

CPC classification number: H01L33/385 ,  H01L24/03 ,  H01L25/0753 ,  H01L29/40 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/20 ,  H01L33/382 ,  H01L33/42 ,  H01L33/44 ,  H01L33/62 ,  H01L2224/03001 ,  H01L2933/0016

Abstract: A semiconductor device including a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer which are sequentially stacked; a first conductivity type upper electrode portion and a first conductivity type lower electrode portion disposed to correspond to each other with the first conductivity type semiconductor layer interposed therebetween; a second conductivity type upper electrode portion and a second conductivity type lower electrode portion disposed to correspond to each other with the first and second conductivity type semiconductor layers interposed therebetween; and a second conductivity type electrode connection portion electrically connecting the second conductivity type upper electrode portion and the second conductivity type lower electrode portion.

Abstract translation: 一种半导体器件，包括依次堆叠的第一导电类型半导体层，有源层和第二导电类型半导体层; 第一导电类型上电极部分和第一导电类型下电极部分，设置成彼此对应，第一导电类型半导体层插入其间; 第二导电类型上电极部分和第二导电类型下电极部分，其设置成彼此对应，第一和第二导电类型半导体层插入其间; 以及电连接第二导电型上电极部和第二导电型下电极部的第二导电型电极连接部。

公开(公告)号：WO2015033652A1

公开(公告)日：2015-03-12

申请号：PCT/JP2014/067551

申请日：2014-07-01

Applicant: オリンパス株式会社

Inventor： 右田　千裕 ,  石田　尚 ,  竹本　良章

IPC: H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L24/05 ,  H01L22/14 ,  H01L24/03 ,  H01L24/13 ,  H01L24/94 ,  H01L2224/03001 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13026 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2924/00012

Abstract: 　この半導体基板の製造方法は、基板部に複数の素子領域を形成する素子形成工程と、前記素子領域と接続された回路配線を形成する第一配線工程と、複数の電極パッドを形成する電極パッド形成工程と、複数の前記電極パッドの少なくとも一部を電気的に接続する電位調節配線を形成する第二配線工程と、前記第二配線工程後に、無電解めっきにより前記電極パッド上に電極本体を形成する電極形成工程と、前記電極形成工程後に、前記電位調節配線による接続を解除する電位調節解除工程と、を備える。

Abstract translation: 该半导体基板的制造方法具备：在基板部形成多个元件区域的元件形成工序; 用于形成连接到元件区域的电路布线的第一布线步骤; 用于形成多个电极焊盘的电极焊盘形成步骤; 第二布线步骤，用于形成电连接所述多个电极焊盘中的至少一些的电位调节布线; 电极形成步骤，用于在所述第二布线步骤之后通过无电解电镀在所述电极焊盘上形成电极体; 以及用于在电极形成步骤之后通过电位调节布线终止连接的电位调整终止步骤。

公开(公告)号：WO2012067992A2

公开(公告)日：2012-05-24

申请号：PCT/US2011/060553

申请日：2011-11-14

Applicant: TESSERA, INC. ,  HABA, Belgacem

Inventor： HABA, Belgacem

IPC: H01L23/498

CPC classification number: H01L24/05 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0657 ,  H01L2224/03001 ,  H01L2224/03003 ,  H01L2224/0311 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05576 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05686 ,  H01L2224/0569 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/16145 ,  H01L2224/16221 ,  H01L2224/29018 ,  H01L2224/29026 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1032 ,  H01L2924/10329 ,  H01L2924/1037 ,  H01L2924/1203 ,  H01L2924/12042 ,  H01L2924/1304 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1461 ,  H01L2924/20107 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An assembly 100 and method of making same are provided. The assembly 100 can include a first component 105 including a dielectric region 120 having an exposed surface 122, a conductive pad 134 at the surface 122 defined by a conductive element 132 having at least a portion extending in an oscillating or spiral path along the surface 122, and a an electrically conductive bonding material 140 joined to the conductive pad 134 and bridging an exposed portion 137 of the dielectric surface 122 between adjacent segments 136, 138. The conductive pad 134 can permit electrical interconnection of the first component 105 with a second component 107 having a terminal 108 joined to the pad 134 through the electrically conductive bonding material 140. The path of the conductive element 132 may or may not overlap or cross itself.

Abstract translation: 提供了组件100及其制造方法。 组件100可以包括第一部件105，第一部件105包括具有暴露表面122的电介质区域120，在表面122处的导电垫134由导电元件132限定，该导电元件132具有沿着表面122在振荡或螺旋路径中延伸的至少一部分 以及结合到导电焊盘134并桥接相邻段136,138之间的电介质表面122的暴露部分137的导电结合材料140.导电焊盘134可以允许第一部件105与第二部件 107，其具有通过导电结合材料140连接到焊盘134的端子108.导电元件132的路径可以重叠或不重叠。