公开(公告)号：WO2016203319A1

公开(公告)日：2016-12-22

申请号：PCT/IB2016/001138

申请日：2016-06-14

Applicant: INVENSAS CORPORATION

Inventor： SHEN, Hong ,  WANG, Liang ,  KATKAR, Rajesh ,  WOYCHIK, Charles, G. ,  GAO, Guilian

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/562 ,  H01L21/481 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L23/053 ,  H01L23/145 ,  H01L23/147 ,  H01L23/15 ,  H01L23/295 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/16153 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/16315 ,  H01L2924/1632 ,  H01L2924/167 ,  H01L2924/16787 ,  H01L2924/16788 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/01029 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Die (110) are attached to an interposer (420), and the interposer/die assembly is placed into a lid cavity (510). The lid (210) is attached to the top of the assembly, possibly to the encapsulant (474) at the top. The lid's legs (520) surround the cavity and extend down below the top surface of the interposer' s substrate (420S), possibly to the level of the bottom surface of the substrate or lower. The legs (520) may or may not be attached to the interposer/die assembly. In fabrication, the interposer wafer (420SW) has trenches (478) which receive the lid's legs during the lid placement. The interposer wafer is later thinned to remove the interposer wafer portion below the legs and to dice the interposer wafer. The thinning process also exposes, on the bottom, conductive vias (450) passing through the interposer substrate. Other features are also provided.

Abstract translation: 模具（110）附接到插入件（420），并且插入器/模具组件被放置在盖腔（510）中。 盖（210）附接到组件的顶部，可能附接到顶部的密封剂（474）。 盖的腿（520）围绕空腔并且向下延伸到插入器的基板（420S）的顶表面下方，可能到底板的底表面的水平或更低。 腿（520）可以或可以不附接到插入件/模具组件。 在制造中，插入器晶片（420SW）具有在盖放置期间接收盖的腿的沟槽（478）。 中间层晶片稍后变薄以去除腿下方的插入片晶片部分并且切割插入片晶片。 薄化工艺还在底部暴露穿过内插衬底的导电通孔（450）。 还提供其他功能。

公开(公告)号：WO2016089831A1

公开(公告)日：2016-06-09

申请号：PCT/US2015/063128

申请日：2015-12-01

Applicant: INVENSAS CORPORATION

Inventor： SHEN, Hong ,  WANG, Liang ,  KATKAR, Rajesh

IPC: H01L25/065 ,  H01L21/98 ,  H01L23/055 ,  H01L23/13 ,  H01L23/498

CPC classification number: H01L25/50 ,  H01L23/13 ,  H01L23/24 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5385 ,  H01L25/0652 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06589 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Stacked dies (110) are encapsulated in an interposer's cavity (304) by multiple encapsulant layers (524) formed of moldable material. Conductive paths (520, 620) connect the dies to the cavity's bottom wall (304B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole (514) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided.

Abstract translation: 堆叠的管芯（110）通过由可模制材料形成的多个密封层（524）封装在插入件的空腔（304）中。 导电路径（520,620）将模具连接到空腔的底壁（304B），并且通过穿过底壁的TSV连接到插入件下方的导体。 导电路径可以形成为各自形成在各个密封层中的通孔（514）中的段。 每个段可以通过电镀形成在下段上; 电镀电流可以通过TSV和较早形成的片段从插入件的下方提供。 还提供其他功能。

公开(公告)号：WO2022010715A1

公开(公告)日：2022-01-13

申请号：PCT/US2021/039928

申请日：2021-06-30

Applicant: INVENSAS CORPORATION

Inventor： CHANG, Xu ,  HABA, Belgacem ,  KATKAR, Rajesh ,  FISCH, David Edward ,  DELACRUZ, Javier A.

IPC: H01L27/11578 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11551 ,  H01L27/11519 ,  H01L27/11521

Abstract: Techniques for manufacturing memory devices, such as 3-dimensional NAND (3D-NAND) memory devices, may include splitting gate planes (e.g., the planes that include the word lines) into strips, thereby splitting the memory cells and increasing a density of memory cells for a respective memory device. The techniques described herein are applicable to various types of 3D-NAND or other memory devices.

公开(公告)号：WO2016123609A2

公开(公告)日：2016-08-04

申请号：PCT/US2016/015951

申请日：2016-02-01

Applicant: INVENSAS CORPORATION

Inventor： KATKAR, Rajesh ,  UZOH, Cyprian, Emeka ,  SITARAM, Arkalgud, R.

IPC: H01L23/485 ,  H01L21/60

CPC classification number: H01L24/81 ,  H01L21/768 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/10126 ,  H01L2224/1182 ,  H01L2224/13023 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/1379 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/1601 ,  H01L2224/16014 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/16507 ,  H01L2224/81007 ,  H01L2224/81048 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/8182 ,  H01L2224/81862 ,  H01L2224/81895 ,  H01L2224/81903 ,  H01L2224/81905 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2924/01327 ,  H01L2924/364 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/2064

Abstract: An apparatus relates generally to a microelectronic device. In such an apparatus, a first substrate has a first surface with first interconnects located on the first surface, and a second substrate has a second surface spaced apart from the first surface with a gap between the first surface and the second surface. Second interconnects are located on the second surface. Lower surfaces of the first interconnects and upper surfaces of the second interconnects are coupled to one another for electrical conductivity between the first substrate and the second substrate. A conductive collar is around sidewalls of the first and second interconnects, and a dielectric layer is around the conductive collar.

Abstract translation: 一种装置一般涉及一种微电子装置。 在这种装置中，第一基板具有第一表面，第一互连位于第一表面上，第二基板具有与第一表面间隔开的第二表面，第一表面与第二表面之间具有间隙。 第二互连位于第二表面上。 第一互连件的下表面和第二互连件的上表面彼此耦合，用于在第一基板和第二基板之间的导电性。 导电套环在第一和第二互连的侧壁周围，并且电介质层围绕导电套环。

公开(公告)号：WO2016094134A1

公开(公告)日：2016-06-16

申请号：PCT/US2015/063230

申请日：2015-12-01

Applicant: INVENSAS CORPORATION

Inventor： KATKAR, Rajesh ,  GAO, Guillian ,  WOYCHIK, Charles, G. ,  ZOHNI, Wael

IPC: H01L23/433 ,  H01L23/367 ,  H01L25/065

CPC classification number: H01L23/3677 ,  H01L21/76885 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/5384 ,  H01L25/0652 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00012

Abstract: In a microelectronic device, a substrate has first upper and lower surfaces. An integrated circuit die has second upper and lower surfaces. Interconnects couple the first upper surface of the substrate to the second lower surface of the integrated circuit die for electrical communication therebetween. A via array has proximal ends of wires thereof coupled to the second upper surface for conduction of heat away from the integrated circuit die. A molding material is disposed in the via array with distal ends of the wires of the via array extending at least to a superior surface of the molding material.

Abstract translation: 在微电子器件中，衬底具有第一上表面和下表面。 集成电路管芯具有第二上表面和下表面。 互连件将基板的第一上表面耦合到集成电路管芯的第二下表面，以在它们之间进行电连接。 通孔阵列具有耦合到第二上表面的电线的近端，用于将热量从集成电路管芯导出。 模制材料设置在通孔阵列中，通孔阵列的导线的远端至少延伸到模制材料的上表面。

公开(公告)号：WO2016044405A1

公开(公告)日：2016-03-24

申请号：PCT/US2015/050395

申请日：2015-09-16

Applicant: INVENSAS CORPORATION

Inventor： UZOH, Cyprian, Emeka ,  KATKAR, Rajesh ,  WOYCHIK, Charles, G. ,  GAO, Guilian ,  SITARAM, Arkalgud, R.

IPC: H01L23/498 ,  H01L25/065

CPC classification number: H01L23/5328 ,  H01L21/76838 ,  H01L21/7684 ,  H01L21/76898 ,  H01L23/49811 ,  H01L23/5226 ,  H01L24/83 ,  H01L25/0652 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/4823 ,  H01L2224/73203 ,  H01L2224/73257 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2924/014

Abstract: An interconnect (124) suitable for attachment of integrated circuit assemblies to each other comprises a polymer member (130) which is conductive and/or is coated with a conductive material (144). Such interconnects replace metal bond wires in some embodiments. Other features are also provided.

Abstract translation: 适于将集成电路组件彼此连接的互连（124）包括导电和/或涂覆有导电材料（144）的聚合物构件（130）。 在一些实施例中，这种互连替代金属接合线。 还提供其他功能。

公开(公告)号：WO2016025499A1

公开(公告)日：2016-02-18

申请号：PCT/US2015/044687

申请日：2015-08-11

Applicant: INVENSAS CORPORATION

Inventor： WOYCHIK, Charles, G. ,  UZOH, Cyprian, Emeka ,  SHEN, Hong ,  LATTIN, Christopher, W ,  GAO, Guilian ,  KATKAR, Rajesh

IPC: H01L23/498 ,  H01L25/065 ,  H01L25/00 ,  H05K1/18 ,  H01L25/16 ,  H01L23/00 ,  H01L23/34 ,  H01L21/56 ,  H01L23/538

CPC classification number: H01L25/0652 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/165 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/11003 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14181 ,  H01L2224/14517 ,  H01L2224/14519 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17517 ,  H01L2224/17519 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19107 ,  H05K1/185 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A device and method for an integrated device includes a first redistribution layer comprising one or more first conductors, one or more first dies mounted to a first surface of the first redistribution layer and electrically coupled to the first conductors, one or more first posts having first ends attached to the first dies and second ends opposite the first ends, one or more second posts having third ends attached to the first surface of the first redistribution layer and fourth ends opposite the third ends, and a second redistribution layer comprising one or more second conductors, the second redistribution layer being attached to the second ends of the first posts and to the fourth ends of the second posts. In some embodiments, the integrated device further includes a heat spreader mounted to a second surface of the first redistribution layer. The second surface is opposite the first surface.

Abstract translation: 用于集成器件的器件和方法包括：第一再分配层，其包括一个或多个第一导体，一个或多个第一裸片，其安装到第一再分配层的第一表面并电耦合到第一导体，一个或多个第一柱具有第一 一端连接到第一模具和与第一端相对的第二端，一个或多个第二柱具有附接到第一再分布层的第一表面的第三端和与第三端相对的第四端，以及包括一个或多个第二端的第二再分布层 导体，第二再分配层附接到第一柱的第二端和第二柱的第四端。 在一些实施例中，集成装置还包括安装到第一再分配层的第二表面的散热器。 第二表面与第一表面相对。

公开(公告)号：WO2015175557A1

公开(公告)日：2015-11-19

申请号：PCT/US2015/030413

申请日：2015-05-12

Applicant: INVENSAS CORPORATION

Inventor： UZOH, Cyprian, Emeka ,  KATKAR, Rajesh

IPC: H01L21/60 ,  H01L23/485 ,  H01L21/48 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/98 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L23/49811 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/0266 ,  B23K35/22 ,  B23K2201/40 ,  B32B15/01 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03 ,  H01L2224/03001 ,  H01L2224/03009 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/03334 ,  H01L2224/0348 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/051 ,  H01L2224/05294 ,  H01L2224/05547 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/056 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/2401 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/75253 ,  H01L2224/81 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82105 ,  H01L2224/83 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841

Abstract: In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion (510) of a solder ball's (140) surface is melted when the connection is formed on one structure (110) and/or when the connection is being attached to another structure (HOB). The structure (110) may be an integrated circuit, an interposer, a rigid or flexible wiring substrate, a printed circuit board, some other packaging substrate, or an integrated circuit package. In some embodiments, solder balls (140.1, 140.2) are joined by an intermediate solder ball (140i), upon melting of the latter only. Any of the solder balls (140, 140i) may have a non-solder central core (140C) coated by solder shell (140S). Some of the molten or softened solder may be squeezed out, to form a "squeeze-out" region (520, 520A, 520B, 520.1, 520.2). In some embodiments, a solder connection (210) such as discussed above, on a structure (110A), may be surrounded by a dielectric layer (1210), and may be recessed in a hole (1230) in that layer (1210), to help in aligning a post (1240) of a structure (HOB) with the connection (210) during attachment of the structures (110A, HOB). The dielectric layer (1210) may be formed by moulding. The dielectric layer may comprise a number of layers (1210.1, 1210.2), "shaved" (partially removed) to expose the solder connection (210). Alternatively, the recessed solder connections (210) may be formed using a sublimating or vapourisable material (1250), placed on top of the solder (210) before formation of the dielectric layer (1210) or coating solder balls (140); in the latter case, the solder (140C) sinks within the dielectric material (1210) upon removal of the material (1250) and subsequent reflow. In some embodiments, the solder connections (210) may also be formed in openings (2220) in a dielectric layer (2210) (photoimageable polymer or inorganic) by solder paste printing and/or solder ball jet placement followed by reflow to let the solder sink to the bottom of the openings (2220), with possible repetition of the process and possible use of different solders in the different steps. The solder connections (210, 210.1, 210.2) may be used for bonding one or more structures (HOB, HOC) (e.g. an integrated circuit die or wafer, a packaging substrate or a package) to a structure (110A) (a wiring substrate) on which a die (HOB) is flip-chip connected. The solder connections (210, 210.1, 210.2) may differ from each other, in particular in height, which can be used for attaching a structure (HOB) with posts (1240) of different heights or for attaching two structures (HOB, HOC) in the case of a stepped form of the dielectric layer, one of the structures (HOC) being possibly placed higher than the other structure (HOB). In some embodiments, the structure (HOA) may be removed after bonding to the structures (HOB, HOC) and a redistribution layer (3210) may be formed to provide connecting lines (3220) connecting the solder connections (210) to contact pads (120R) and possibly interconnecting between the solder connections (210) and/or between the contact pads (120R).

Abstract translation: 在一些实施例中，为了增加将不同结构与一个或多个焊球连接的焊料连接的高度与间距比，当焊接球（140）表面的一部分（510）形成在 一个结构（110）和/或当连接被附接到另一个结构（HOB）时。 结构（110）可以是集成电路，插入器，刚性或柔性布线基板，印刷电路板，一些其它封装基板或集成电路封装。 在一些实施例中，焊料球（140.1,140.2）仅在熔化时被中间焊球（140i）连接。 任何焊球（140,140i）可以具有由焊料壳（140S）涂覆的非焊料中心芯（140C）。 一些熔融或软化的焊料可能被挤出，以形成“挤出”区域（520,520A，520B，520.1,520.2）。 在一些实施例中，在结构（110A）上的如上所述的焊料连接（210）可被电介质层（1210）包围，并且可以凹入该层（1210）中的孔（1230）中， 以在结构（110A，110B）的附接期间帮助将结构的柱（1240）与连接件（210）对齐。 电介质层（1210）可以通过模制形成。 介电层可以包括多个层（1210.1,1212.2），“剃光”（部分去除）以暴露焊料连接（210）。 或者，可以在形成电介质层（1210）或涂覆焊球（140）之前使用升华或蒸发的材料（1250）形成凹陷的焊料连接（210），放置在焊料（210）的顶部上。 在后一种情况下，当去除材料（1250）和随后的回流时，焊料（140C）在电介质材料（1210）内下沉。 在一些实施例中，焊料连接（210）还可以通过焊膏印刷和/或焊球喷射放置形成在电介质层（2210）（可光成像的聚合物或无机）中的开口（2220）中，然后回流以使焊料 沉入开口（2220）的底部，可能重复该过程并可能在不同步骤中使用不同的焊料。 焊接连接（210,210.1,210.2）可以用于将一个或多个结构（HOB，HOC）（例如，集成电路管芯或晶片，封装衬底或封装）结合到结构（110A）（布线基板 ），其上晶片（HOB）被倒装连接。 焊接连接（210,210.1,210.2）可以彼此不同，特别是在高度上可以不同，其可用于将结构（HOB）与不同高度的柱（1240）连接或用于附接两个结构（HOB，HOC） 在阶梯形状的电介质层的情况下，结构（HOC）中的一个可能被放置得高于其他结构（HOB）。 在一些实施例中，可以在结合到结构（HOB，HOC）之后去除结构（HOA），并且可以形成再分布层（3210），以提供将焊接连接（210）连接到接触焊盘的连接线（3220） 120R），并且可能在焊料连接（210）和/或接触焊盘（120R）之间互连。

公开(公告)号：WO2015109157A1

公开(公告)日：2015-07-23

申请号：PCT/US2015/011715

申请日：2015-01-16

Applicant: INVENSAS CORPORATION

Inventor： KATKAR, Rajesh

IPC: H01L23/498 ,  H01L25/10 ,  H01L21/48

CPC classification number: H01L23/3107 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/566 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/10 ,  H01L25/105 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/83005 ,  H01L2224/92242 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00

Abstract: A method for simultaneously making a plurality of microelectronic packages by forming an electrically conductive redistribution structure along with a plurality of microelectronic element attachment regions on a carrier. The attachment regions being spaced apart from one another and overlying the carrier. The method also including the formation of conductive connector elements between adjacent attachment regions. Each connector element having the first or second end adjacent the carrier and the remaining end at a height of the microelectronic element. The method also includes forming an encapsulation over portions of the connector elements and subsequently singulating the assembly, into microelectronic units, each including a microelectronic element. The surface of the microelectronic unit, opposite the redistribution structure, having both the active face of the microelectronic element and the free ends of the connector elements so that both are available for connection with a component external to the microelectronic unit.

Abstract translation: 一种通过与载体上的多个微电子元件附着区一起形成导电再分配结构来同时制造多个微电子封装的方法。 附接区域彼此间隔开并且覆盖在载体上。 该方法还包括在相邻附接区域之间形成导电连接器元件。 每个连接器元件具有与载体相邻的第一端或第二端，并且其余端在微电子元件的高度处。 该方法还包括在连接器元件的部分上形成封装，并随后将组件分成微电子单元，每个微电子单元包括微电子元件。 微电子单元的与再分布结构相对的表面具有微电子元件的有源面和连接器元件的自由端，使得两者可用于与微电子单元外部的部件连接。

公开(公告)号：WO2015054413A1

公开(公告)日：2015-04-16

申请号：PCT/US2014/059737

申请日：2014-10-08

Applicant: INVENSAS CORPORATION

Inventor： UZOH, Cyprian, Emeka ,  KATKAR, Rajesh

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L24/11 ,  H01L21/3213 ,  H01L21/32139 ,  H01L21/4853 ,  H01L21/76885 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/0362 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05564 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05578 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05664 ,  H01L2224/05686 ,  H01L2224/0569 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/1111 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1182 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/81815 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00

Abstract: An apparatus relating generally to a substrate is disclosed. In this apparatus, a first metal layer is on the substrate. The first metal layer has an opening. The opening of the first metal layer has a bottom and one or more sides extending from the bottom. A second metal layer is on the first metal layer. The first metal layer and the second metal layer provide a bowl-shaped structure. An inner surface of the bowl-shaped structure is defined responsive to the opening of the first metal layer and the second metal layer thereon. The opening of the bowl-shaped structure is configured to receive and at least partially retain a bonding material during a reflow process.

Abstract translation: 公开了一般涉及基板的装置。 在该装置中，第一金属层位于基板上。 第一金属层具有开口。 第一金属层的开口具有从底部延伸的底部和一个或多个侧面。 第二金属层位于第一金属层上。 第一金属层和第二金属层提供碗形结构。 碗形结构的内表面是响应于其上的第一金属层和第二金属层的开口而定义的。 碗形结构的开口构造成在回流过程期间接收并且至少部分地保持接合材料。