Abstract:
An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.
Abstract:
Metallpaste, die (A) 75 bis 90 Gew.-% wenigstens eines Metalls, das in Form von Partikeln vorliegt, die ein Coating aufweisen, das wenigstens eine organische Verbindung enthält, und (B) 6 bis 20 Gew.-% organisches Lösemittel umfasst, dadurch gekennzeichnet, dass die Metallpaste ferner (C) 2 bis 10 Gew.-% mindestens eines Ammoniumtetrafluoroborats der Formel (NHR1R2R3) + (BF 4 ) - umfasst, wobei die Reste R1, R2 und R3 gleiche oder verschiedene Reste ausgewählt aus H und Kohlenwasserstoffresten mit jeweils ≤ 12 C-Atomen bedeuten.
Abstract:
Ce procédé de fabrication d'un dispositif microélectronique comportant un premier composant (12) hybridé à un second composant (14) au moyen d'interconnexions électriques, consiste : à réaliser des premier et second composants (12, 14), le second composant (14) étant transparent à un rayonnement ultraviolet au moins au droit d'emplacements prévus pour les interconnexions; à former des éléments d'interconnexion (22) comprenant de l'oxyde de cuivre sur le second composant (14) aux emplacements prévus pour les interconnexions; à reporter les premier et second composants (12, 14) l'un sur l'autre; et à appliquer un rayonnement ultraviolet au travers le second composant (14) sur les éléments comprenant de l'oxyde de cuivre de manière à mettre en œuvre un recuit ultraviolet transformant l'oxyde de cuivre en cuivre.
Abstract:
A first contact (310) surface of a semiconductor laser chip (302) is formed to a surface roughness selected to have a maximum peak to valley height that is substantially smaller than a diffusion barrier layer thickness. A diffusion barrier layer that includes a non-metallic, electrically-conducting compound and that has the barrier layer thickness is applied to the first contact surface, and the semiconductor laser chip is soldered to a carrier mounting (304) along the first contact surface using a solder composition (306) by heating the soldering composition to less than a threshold temperature at which dissolution of the barrier layer into the soldering composition occurs. Thereby the diffusion barrier remains contiguous. The non-metallic, electrically conducting compound may comprise at least one of titanium nitride, titanium oxy-nitride, tungsten nitride, cerium oxide and cerium gadolinium oxy-nitride
Abstract:
Various semiconductor chip thermal interface material methods and apparatus are disclosed. In one aspect, a method of establishing thermal contact between a first semiconductor chip (15, 115) and a heat spreader (30) is provided. The method includes placing a thermal interface material layer (35, 35 ', 35 ", 35 " ', 35 " ") containing a support structure (40, 40') on the first semiconductor chip (15, 115). The heat spreader (30) is positioned proximate the thermal interface material layer (35, 35 ', 35 ", 35 " ', 35 " "). The thermal interface material layer (35, 35 ', 35 ", 35 " ', 35 "") is reflowed to establish thermal contact with both the first semiconductor chip (15, 115) and the heat spreader (30).
Abstract:
Es wird ein Verfahren zur Herstellung von optoelektronischen Bauelementen (1) angegeben, bei dem eine Mehrzahl von Halbleiterkörpern (2) mit jeweils einer Halbleiterschichtenfolge bereitgestellt wird. Weiterhin wird ein Bauelementträgerverbund (30) mit einer Mehrzahl von Anschlussflächen (35) bereitgestellt. Die Halbleiterkörper (2) werden relativ zum Bauelementträgerverbund (30) positioniert. Zwischen den Anschlussflächen (35) und den zugeordneten Halbleiterkörpern (2) wird eine elektrisch leitende Verbindung hergestellt und die Halbleiterkörper werden an dem Bauelementträgerverbund (30) befestigt. Die optoelektronischen Bauelemente (2) werden fertig gestellt, wobei für jedes optoelektronische Bauelement (1) ein Bauelementträger (3) aus dem Bauelementträgerverbund (30), auf dem die Halbleiterkörper (2) befestigt sind, ausgebildet wird. Ferner wird ein optoelektronisches Bauelement angegeben.
Abstract:
Packaged semiconductor components and methods for manufacturing packaged semiconductor components. In one embodiment a semiconductor component (100) comprises a die (20) having a semiconductor substrate (12) and an integrated circuit (26). The substrate has a first side (14), a second side (17), a sidewall between the first and second sides, a first indentation (21a) at the sidewall around a periphery of the first side, and a second indentation (21b) at the sidewall around a periphery of the second side. The component further includes a first exterior cover (51) at the first side and a second exterior cover (71) at the second side. The first exterior cover has a first extension (54) in the first indentation, and the second exterior cover has a second extension (74) in the second indentation. The first and second extensions are spaced apart from each other by an exposed portion (23) of the sidewall.
Abstract:
An electrical connection for a microelectronic chip, and a method for manufacturing such a connection. A method of manufacturing an electrical connection for a microelectronic chip, the microelectronic chip 3, 13, 23, 33 comprises at least one connection pad of reduced size 2, 2A, 2B, 2C, 2D, wherein the method of manufacturing comprises the steps of: - adding an additional layer 11, 11',11", 11A, 11B on the at least one connection pad, - bonding a wire 8 on the additional layer.