公开(公告)号：US09263332B2

公开(公告)日：2016-02-16

申请号：US13943737

申请日：2013-07-16

Applicant: STATS ChipPAC, Ltd.

Inventor： HeeJo Chi ,  NamJu Cho ,  HanGil Shin

IPC: H01L23/02 ,  H01L21/78 ,  H01L21/683 ,  H01L23/498 ,  H01L23/538 ,  H01L23/552 ,  H01L25/18 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2224/11003 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/48091 ,  H01L2224/48157 ,  H01L2224/48158 ,  H01L2224/4816 ,  H01L2224/73265 ,  H01L2224/81001 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device is made by mounting a semiconductor wafer to a temporary carrier. A plurality of TSV is formed through the wafer. A cavity is formed partially through the wafer. A first semiconductor die is mounted to a second semiconductor die. The first and second die are mounted to the wafer such that the first die is disposed over the wafer and electrically connected to the TSV and the second die is disposed within the cavity. An encapsulant is deposited over the wafer and first and second die. A portion of the encapsulant is removed to expose a first surface of the first die. A portion of the wafer is removed to expose the TSV and a surface of the second die. The remaining portion of the wafer operates as a TSV interposer for the first and second die. An interconnect structure is formed over the TSV interposer.

公开(公告)号：US20130105970A1

公开(公告)日：2013-05-02

申请号：US13683946

申请日：2012-11-21

Applicant: STATS ChipPAC, Ltd.

Inventor： HeeJo Chi ,  NamJu Cho ,  HanGil Shin

IPC: H01L23/498 ,  H01L23/34 ,  H01L21/56

CPC classification number: H01L23/49816 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/367 ,  H01L23/4334 ,  H01L23/49524 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24227 ,  H01L2224/29099 ,  H01L2224/29186 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/05432 ,  H01L2924/00014 ,  H01L2924/0542 ,  H01L2924/0503 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155

Abstract: A semiconductor device has a prefabricated multi-die leadframe with a base and integrated raised die paddle and a plurality of bodies extending from the base. A thermal interface layer is formed over a back surface of a semiconductor die or top surface of the raised die paddle. The semiconductor die is mounted over the raised die paddle between the bodies of the leadframe with the TIM disposed between the die and raised die paddle. An encapsulant is deposited over the leadframe and semiconductor die. Vias can be formed in the encapsulant. An interconnect structure is formed over the leadframe, semiconductor die, and encapsulant, including into the vias. The base is removed to separate the bodies from the raised die paddle. The raised die paddle provides heat dissipation for the semiconductor die. The bodies are electrically connected to the interconnect structure. The bodies operate as conductive posts for electrical interconnect.

Abstract translation: 半导体器件具有预制的多管芯引线框架，其具有基底和集成凸起的裸片焊盘以及从基部延伸的多个主体。 热界面层形成在半导体管芯的背表面或凸起的管芯焊盘的顶表面上。 半导体管芯安装在引线框架的主体之间的凸起的模板上，并且TIM设置在模具和凸起的模板之间。 封装剂沉积在引线框架和半导体管芯上。 可以在密封剂中形成通孔。 在引线框架，半导体管芯和密封剂之上形成互连结构，包括到通孔中。 移除基座以将体与凸起模片分离。 凸起的芯片为半导体管芯提供散热。 主体电连接到互连结构。 主体用作电气互连的导电柱。

公开(公告)号：US09966335B2

公开(公告)日：2018-05-08

申请号：US14596080

申请日：2015-01-13

Applicant: STATS ChipPAC, Ltd.

Inventor： NamJu Cho ,  HeeJo Chi ,  HanGil Shin

IPC: H01L23/50 ,  H01L21/56 ,  H01L21/683 ,  H01L23/13 ,  H01L23/498 ,  H01L25/065 ,  H01L23/12 ,  H01L23/28 ,  H01L23/29 ,  H01L23/31 ,  H01L23/00 ,  H05K3/00

CPC classification number: H01L23/50 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/12 ,  H01L23/13 ,  H01L23/28 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48105 ,  H01L2224/48145 ,  H01L2224/48157 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85005 ,  H01L2224/85447 ,  H01L2224/92163 ,  H01L2224/92164 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/146 ,  H01L2924/15311 ,  H01L2924/171 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H05K3/0052 ,  H01L2924/01014 ,  H01L2924/0665 ,  H01L2924/0105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/81805 ,  H01L2224/85

Abstract: A semiconductor device has an interposer frame mounted over a carrier. A semiconductor die has an active surface and bumps formed over the active surface. The semiconductor die can be mounted within a die opening of the interposer frame or over the interposer frame. Stacked semiconductor die can also be mounted within the die opening of the interposer frame or over the interposer frame. Bond wires or bumps are formed between the semiconductor die and interposer frame. An encapsulant is deposited over the interposer frame and semiconductor die. An interconnect structure is formed over the encapsulant and bumps of the first semiconductor die. An electronic component, such as a discrete passive device, semiconductor die, or stacked semiconductor die, is mounted over the semiconductor die and interposer frame. The electronic component has an I/O count less than an I/O count of the semiconductor die.

公开(公告)号：US09508635B2

公开(公告)日：2016-11-29

申请号：US13929775

申请日：2013-06-27

Applicant: STATS ChipPAC, Ltd.

Inventor： HanGil Shin ,  HeeJo Chi ,  NamJu Cho

IPC: H01L21/00 ,  H01L23/498 ,  H01L21/48 ,  H05K3/46 ,  H01L23/00 ,  H01L21/56 ,  H05K1/09 ,  H05K3/12

CPC classification number: H01L23/49838 ,  H01L21/4867 ,  H01L21/561 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48229 ,  H01L2224/4917 ,  H01L2224/49173 ,  H01L2224/49176 ,  H01L2224/49179 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/181 ,  H05K1/092 ,  H05K3/125 ,  H05K3/1283 ,  H05K3/4685 ,  H05K2201/026 ,  H05K2201/0323 ,  H05K2203/095 ,  H05K2203/1194 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00015 ,  H01L2924/0665 ,  H01L2924/00012

Abstract: Methods of forming conductive jumper traces for semiconductor devices and packages. Substrate is provided having first, second and third trace lines formed thereon, where the first trace line is between the second and third trace lines. The first trace line can be isolated with a covering layer. A conductive layer can be formed between the second and third trace lines and over the first trace line by a depositing process followed by a heating process to alter the chemical properties of the conductive layer. The resulting conductive layer is able to conform to the covering layer and serve to provide electrical connection between the second and third trace lines.

Abstract translation: 形成用于半导体器件和封装的导电跳线迹线的方法。 衬底具有形成在其上的第一，第二和第三迹线，其中第一迹线位于第二和第三迹线之间。 第一条痕迹线可以用覆盖层隔离。 可以通过沉积工艺在第二和第三迹线之间和第一迹线上形成导电层，随后进行加热处理以改变导电层的化学性质。 所得到的导电层能够符合覆盖层并且用于在第二和第三迹线之间提供电连接。

公开(公告)号：US20160233168A1

公开(公告)日：2016-08-11

申请号：US15130452

申请日：2016-04-15

Applicant: STATS ChipPAC, Ltd.

Inventor： HeeJo Chi ,  HanGil Shin ,  NamJu Cho

IPC: H01L23/538

CPC classification number: H01L24/19 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/528 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/73 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/6834 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68386 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/08146 ,  H01L2224/08235 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/19 ,  H01L2224/24227 ,  H01L2224/25171 ,  H01L2224/82039 ,  H01L2224/94 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10322 ,  H01L2924/10324 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/153 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/82 ,  H01L2224/08

Abstract: A semiconductor device has a plurality of semiconductor die. A substrate is provided with bumps disposed over the substrate. A first prefabricated insulating film is disposed between the semiconductor die and substrate. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The bumps include a copper core encapsulated within copper plating. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The substrate includes a conductive layer formed in the substrate and coupled to the bumps. The semiconductor die is disposed between the bumps of the substrate. The bumps and the semiconductor die are embedded within the first prefabricated insulating film. A portion of the first prefabricated insulating film is removed to expose the bumps. The bumps electrically connect the substrate to the interconnect structure.

公开(公告)号：US20150270237A1

公开(公告)日：2015-09-24

申请号：US14220336

申请日：2014-03-20

Applicant: STATS ChipPAC, Ltd.

Inventor： HeeJo Chi ,  HanGil Shin ,  NamJu Cho

IPC: H01L23/00 ,  H01L21/768 ,  H01L25/065 ,  H01L23/528 ,  H01L25/00

CPC classification number: H01L24/19 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/528 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/73 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/6834 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68386 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/08146 ,  H01L2224/08235 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/19 ,  H01L2224/24227 ,  H01L2224/25171 ,  H01L2224/82039 ,  H01L2224/94 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10322 ,  H01L2924/10324 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/153 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/82 ,  H01L2224/08

Abstract: A semiconductor device has a plurality of semiconductor die. A substrate is provided with bumps disposed over the substrate. A first prefabricated insulating film is disposed between the semiconductor die and substrate. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The bumps include a copper core encapsulated within copper plating. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The substrate includes a conductive layer formed in the substrate and coupled to the bumps. The semiconductor die is disposed between the bumps of the substrate. The bumps and the semiconductor die are embedded within the first prefabricated insulating film. A portion of the first prefabricated insulating film is removed to expose the bumps. The bumps electrically connect the substrate to the interconnect structure.

Abstract translation: 半导体器件具有多个半导体管芯。 衬底设置有设置在衬底上的凸起。 第一预制绝缘膜设置在半导体管芯和衬底之间。 在半导体管芯和第一预制绝缘膜上形成互连结构。 凸块包括封装在镀铜中的铜芯。 第一预制绝缘膜包括玻璃布，玻璃纤维或玻璃填料。 衬底包括形成在衬底中并耦合到凸块的导电层。 半导体管芯设置在衬底的凸块之间。 凸块和半导体管芯嵌入在第一预制绝缘膜内。 去除第一预制绝缘膜的一部分以暴露凸块。 凸块将基板电连接到互连结构。

公开(公告)号：US09064859B2

公开(公告)日：2015-06-23

申请号：US13683946

申请日：2012-11-21

Applicant: STATS ChipPAC, Ltd.

Inventor： HeeJo Chi ,  NamJu Cho ,  HanGil Shin

IPC: H01L23/28 ,  H01L21/58 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/433 ,  H01L23/495 ,  H01L23/538 ,  H01L23/34 ,  H01L23/31 ,  H01L23/367 ,  H01L23/00 ,  H01L25/10

CPC classification number: H01L23/49816 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/367 ,  H01L23/4334 ,  H01L23/49524 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24227 ,  H01L2224/29099 ,  H01L2224/29186 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/05432 ,  H01L2924/00014 ,  H01L2924/0542 ,  H01L2924/0503 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155

Abstract: A semiconductor device has a prefabricated multi-die leadframe with a base and integrated raised die paddle and a plurality of bodies extending from the base. A thermal interface layer is formed over a back surface of a semiconductor die or top surface of the raised die paddle. The semiconductor die is mounted over the raised die paddle between the bodies of the leadframe with the TIM disposed between the die and raised die paddle. An encapsulant is deposited over the leadframe and semiconductor die. Vias can be formed in the encapsulant. An interconnect structure is formed over the leadframe, semiconductor die, and encapsulant, including into the vias. The base is removed to separate the bodies from the raised die paddle. The raised die paddle provides heat dissipation for the semiconductor die. The bodies are electrically connected to the interconnect structure. The bodies operate as conductive posts for electrical interconnect.

Abstract translation: 半导体器件具有预制的多管芯引线框架，其具有基底和集成凸起的裸片焊盘以及从基部延伸的多个主体。 热界面层形成在半导体管芯的背表面或凸起的管芯焊盘的顶表面上。 半导体管芯安装在引线框架的主体之间的凸起的模板上，并且TIM设置在模具和凸起的模板之间。 封装剂沉积在引线框架和半导体管芯上。 可以在密封剂中形成通孔。 在引线框架，半导体管芯和密封剂之上形成互连结构，包括到通孔中。 移除基座以将体与凸起模片分离。 凸起的芯片为半导体管芯提供散热。 主体电连接到互连结构。 主体用作电气互连的导电柱。

公开(公告)号：US20150123273A1

公开(公告)日：2015-05-07

申请号：US14596080

申请日：2015-01-13

Applicant: STATS ChipPAC, Ltd.

Inventor： NamJu Cho ,  HeeJo Chi ,  HanGil Shin

IPC: H01L23/50 ,  H01L23/00 ,  H01L23/28 ,  H01L23/12

CPC classification number: H01L23/50 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/12 ,  H01L23/13 ,  H01L23/28 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48105 ,  H01L2224/48145 ,  H01L2224/48157 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85005 ,  H01L2224/85447 ,  H01L2224/92163 ,  H01L2224/92164 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/146 ,  H01L2924/15311 ,  H01L2924/171 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H05K3/0052 ,  H01L2924/01014 ,  H01L2924/0665 ,  H01L2924/0105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/81805 ,  H01L2224/85

Abstract: A semiconductor device has an interposer frame mounted over a carrier. A semiconductor die has an active surface and bumps formed over the active surface. The semiconductor die can be mounted within a die opening of the interposer frame or over the interposer frame. Stacked semiconductor die can also be mounted within the die opening of the interposer frame or over the interposer frame. Bond wires or bumps are formed between the semiconductor die and interposer frame. An encapsulant is deposited over the interposer frame and semiconductor die. An interconnect structure is formed over the encapsulant and bumps of the first semiconductor die. An electronic component, such as a discrete passive device, semiconductor die, or stacked semiconductor die, is mounted over the semiconductor die and interposer frame. The electronic component has an I/O count less than an I/O count of the semiconductor die.

Abstract translation: 半导体器件具有安装在载体上的插入器框架。 半导体管芯具有形成在有源表面上的有源表面和凸起。 半导体管芯可以安装在插入器框架的模具开口内或者插入器框架上。 堆叠的半导体管芯也可以安装在插入器框架的模具开口内或插入架上。 在半导体管芯和内插框架之间形成接合线或凸点。 封装剂沉积在插入器框架和半导体管芯上。 在第一半导体管芯的密封剂和凸块之上形成互连结构。 诸如分立无源器件，半导体管芯或堆叠半导体管芯的电子部件安装在半导体管芯和插入器框架上。 电子部件的I / O计数小于半导体管芯的I / O数。

公开(公告)号：US08932907B2

公开(公告)日：2015-01-13

申请号：US13714061

申请日：2012-12-13

Applicant: STATS ChipPAC, Ltd.

Inventor： NamJu Cho ,  HeeJo Chi ,  HanGil Shin

IPC: H01L21/44 ,  H01L23/498 ,  H01L21/56 ,  H01L21/683 ,  H01L23/13 ,  H01L23/00 ,  H01L25/065 ,  H01L23/29 ,  H01L23/31 ,  H05K3/00

CPC classification number: H01L23/50 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/12 ,  H01L23/13 ,  H01L23/28 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48105 ,  H01L2224/48145 ,  H01L2224/48157 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85005 ,  H01L2224/85447 ,  H01L2224/92163 ,  H01L2224/92164 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/146 ,  H01L2924/15311 ,  H01L2924/171 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H05K3/0052 ,  H01L2924/01014 ,  H01L2924/0665 ,  H01L2924/0105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/81805 ,  H01L2224/85

Abstract: A semiconductor device has an interposer frame mounted over a carrier. A semiconductor die has an active surface and bumps formed over the active surface. The semiconductor die can be mounted within a die opening of the interposer frame or over the interposer frame. Stacked semiconductor die can also be mounted within the die opening of the interposer frame or over the interposer frame. Bond wires or bumps are formed between the semiconductor die and interposer frame. An encapsulant is deposited over the interposer frame and semiconductor die. An interconnect structure is formed over the encapsulant and bumps of the first semiconductor die. An electronic component, such as a discrete passive device, semiconductor die, or stacked semiconductor die, is mounted over the semiconductor die and interposer frame. The electronic component has an I/O count less than an I/O count of the semiconductor die.

Abstract translation: 半导体器件具有安装在载体上的插入器框架。 半导体管芯具有形成在有源表面上的有源表面和凸起。 半导体管芯可以安装在插入器框架的模具开口内或者插入器框架上。 堆叠的半导体管芯也可以安装在插入器框架的模具开口内或插入架上。 在半导体管芯和内插框架之间形成接合线或凸点。 封装剂沉积在插入器框架和半导体管芯上。 在第一半导体管芯的密封剂和凸块之上形成互连结构。 诸如分立无源器件，半导体管芯或堆叠半导体管芯的电子部件安装在半导体管芯和插入器框架上。 电子部件的I / O计数小于半导体管芯的I / O数。

公开(公告)号：US20140361423A1

公开(公告)日：2014-12-11

申请号：US14466923

申请日：2014-08-22

Applicant: STATS ChipPAC, Ltd.

Inventor： HeeJo Chi ,  NamJu Cho ,  HanGil Shin

IPC: H01L23/00 ,  H01L25/16 ,  H01L23/31

CPC classification number: H01L24/17 ,  H01L21/4832 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/33 ,  H01L24/97 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a leadframe with a plurality of bodies extending from the base plate. A first semiconductor die is mounted to the base plate of the leadframe between the bodies. An encapsulant is deposited over the first semiconductor die and base plate and around the bodies of the leadframe. A portion of the encapsulant over the bodies of the leadframe is removed to form first openings in the encapsulant that expose the bodies. An interconnect structure is formed over the encapsulant and extending into the first openings to the bodies of the leadframe. The leadframe and bodies are removed to form second openings in the encapsulant corresponding to space previously occupied by the bodies to expose the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with bumps extending into the second openings of the encapsulant to electrically connect to the interconnect structure.

Abstract translation: 半导体器件具有从基板延伸的多个主体的引线框架。 第一半导体管芯安装在引线框架的基板之间。 密封剂沉积在第一半导体管芯和基板上并且围绕引线框架的主体。 去除引线框架的主体上的密封剂的一部分，以在密封剂中形成暴露主体的第一开口。 互连结构形成在密封剂上方并延伸到引导框架的主体的第一开口中。 引导框架和主体被移除以在密封剂中形成对应于先前由主体占据的空间以露出互连结构的第二开口。 第二半导体管芯安装在第一半导体管芯上，凸块延伸到密封剂的第二开口中以电连接到互连结构。