公开(公告)号：US08421227B2

公开(公告)日：2013-04-16

申请号：US11769736

申请日：2007-06-28

Applicant: Mou-Shiung Lin ,  Jin-Yuan Lee

Inventor： Mou-Shiung Lin ,  Jin-Yuan Lee

IPC: H01L23/48

CPC classification number: H01L24/11 ,  H01L23/5227 ,  H01L23/53238 ,  H01L23/53252 ,  H01L24/05 ,  H01L24/06 ,  H01L24/12 ,  H01L24/16 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05084 ,  H01L2224/05553 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13171 ,  H01L2224/13173 ,  H01L2224/13176 ,  H01L2224/13181 ,  H01L2224/13183 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/73204 ,  H01L2224/838 ,  H01L2224/85201 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/01032 ,  H01L2924/01031 ,  H01L2224/48869 ,  H01L2224/48744 ,  H01L2224/05552

Abstract: A semiconductor chip structure includes a semiconductor substrate, an circuit structure, a passivation layer, a first adhesion/barrier layer, a metal cap and a metal layer. The semiconductor substrate has multiple electric devices located on a surface layer of a surface of the substrate. The circuit structure had multiple circuit layers electrically connecting with each other and electrically connecting with the electric devices. One of the circuit layers has multiple pads. The passivation layer is located on the circuit structure and has multiple openings penetrating through the passivation layer. The openings expose the pads. The first adhesion/barrier layer is over the pads and the passivation layer. The metal cap is located on the first adhesion/barrier layer and the passivation layer. The metal layer is on the metal layer.

Abstract translation: 半导体芯片结构包括半导体衬底，电路结构，钝化层，第一粘附/阻挡层，金属帽和金属层。 半导体衬底具有位于衬底表面的表面层上的多个电子器件。 电路结构具有彼此电连接并与电气装置电连接的多个电路层。 其中一个电路层具有多个焊盘。 钝化层位于电路结构上，具有贯穿钝化层的多个开口。 开口露出垫。 第一粘附/阻挡层在焊盘和钝化层之上。 金属盖位于第一粘附/阻挡层和钝化层上。 金属层在金属层上。

公开(公告)号：US20130049231A1

公开(公告)日：2013-02-28

申请号：US13590472

申请日：2012-08-21

Applicant: Kosuke MIYOSHI ,  Kinya SAKODA ,  Toshikuni SHINOHARA

Inventor： Kosuke MIYOSHI ,  Kinya SAKODA ,  Toshikuni SHINOHARA

IPC: H01L23/48 ,  H01L21/56

CPC classification number: H01L24/48 ,  H01L23/3107 ,  H01L23/4952 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/05554 ,  H01L2224/29101 ,  H01L2224/29339 ,  H01L2224/29386 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48097 ,  H01L2224/48247 ,  H01L2224/48456 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85986 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A semiconductor device includes a semiconductor chip, a die pad including an obverse surface on which the semiconductor chip is bonded, a lead spaced apart from the die pad, a bonding wire electrically connecting the semiconductor chip and the lead to each other, and a resin package that seals the semiconductor chip and the bonding wire. The bonding wire includes a first bond portion press-bonded to the semiconductor chip by ball bonding, a second bond portion press bonded to the lead by stitch bonding, a landing portion extending from the second bond portion toward the die pad and formed in contact with an obverse surface of the lead, and a loop extending obliquely upward from the landing portion toward the semiconductor chip.

Abstract translation: 半导体器件包括：半导体芯片，包括半导体芯片接合的正面的管芯焊盘，与管芯焊盘间隔开的引线，将半导体芯片和引线彼此电连接的接合线，以及树脂 密封半导体芯片和接合线的封装。 接合线包括通过球接接合压接到半导体芯片的第一接合部，通过缝合接合而与接合引线接合的第二接合部，从第二接合部延伸到管芯焊盘而形成为与 引线的正面，以及从着陆部朝向半导体芯片向斜上方延伸的环。

公开(公告)号：US08274140B2

公开(公告)日：2012-09-25

申请号：US13048355

申请日：2011-03-15

Applicant: Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

Inventor： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

IPC: H01L23/495

CPC classification number: H01L23/4334 ,  H01L23/49551 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: The invention relates to leadframes and semiconductor chip package assemblies using leadframes, and to methods for their assembly. A disclosed embodiment of the invention includes a semiconductor package leadframe with a chip mounting surface for receiving a semiconductor chip and a plurality of leadfingers. The leadfingers have a proximal end for receiving one or more wirebond, and a distal end for providing an electrical path from the proximal end. One or more of the leadfingers also has an offset portion at its proximal end for increasing the clearance between the leadfinger and underlying heat spreader, increasing the stiffness of the leadfinger, and increasing leadfinger deflection-resistance and spring-back. The offset is in the direction opposite the plane of a heat spreader thermally coupled to the mounting surface. Preferred embodiments of the invention further include a semiconductor chip affixed to the mounting surface and a plurality of bondwires operably coupling bond pads of the chip to the offset portions of the proximal ends of individual leadfingers.

Abstract translation: 本发明涉及引线框和使用引线框的半导体芯片封装组件及其组装方法。 本发明公开的实施例包括具有用于接收半导体芯片和多个引线引脚的芯片安装表面的半导体封装引线框架。 引导器具有用于接收一个或多个引线键的近端和用于从近端提供电路径的远端。 一个或多个引导装置在其近端还具有偏移部分，用于增加引导件和下面的散热器之间的间隙，增加引导件的刚度，以及增加引线夹的抗挠曲和回弹。 偏移方向与热耦合到安装表面的散热器的平面相反。 本发明的优选实施例还包括固定到安装表面的半导体芯片和可操作地将芯片的接合焊盘耦合到单个引线管的近端的偏移部分的多个焊丝。

公开(公告)号：US08152046B2

公开(公告)日：2012-04-10

申请号：US13063852

申请日：2010-03-26

Applicant: Gary S. Gillotti

Inventor： Gary S. Gillotti

IPC: B23K31/02

CPC classification number: H01L24/85 ,  B23K3/0623 ,  B23K20/004 ,  B23K2101/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/0401 ,  H01L2224/04073 ,  H01L2224/1134 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13664 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/78301 ,  H01L2224/78801 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/851 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85986 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  Y10S228/904 ,  H01L2224/85186 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48227 ,  H01L2924/01006 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A method of forming a conductive bump is provided. The method includes the steps of: (1) bonding a free air ball to a bonding location using a bonding tool to form a bonded ball; (2) raising the bonding tool to a desired height, with a wire clamp open, while paying out wire continuous with the bonded ball; (3) closing the wire clamp; (4) lowering the bonding tool to a smoothing height with the wire clamp still closed; (5) smoothing an upper surface of the bonded ball, with the wire clamp still closed, using the bonding tool; and (6) raising the bonding tool, with the wire clamp still closed, to separate the bonded ball from wire engaged with the bonding tool.

Abstract translation: 提供一种形成导电凸块的方法。 该方法包括以下步骤：（1）使用接合工具将自由空气球结合到接合位置以形成接合球; （2）将焊接工具提升到所需的高度，同时将电线夹打开，同时支付与接合球连续的电线; （3）关闭线夹; （4）将导线夹仍然封闭时，将焊接工具降至平滑高度; （5）使用焊接工具使焊丝夹仍然闭合，使接合球的上表面平滑化; 和（6）提升接合工具，线夹仍然闭合，以将接合球与接合工具接合的线分离。

公开(公告)号：US08129226B2

公开(公告)日：2012-03-06

申请号：US12599625

申请日：2007-05-10

Applicant: James P. Johnston ,  Chu-Chung Lee ,  Tu-Anh N. Tran ,  James W. Miller ,  Kevin J. Hess

Inventor： James P. Johnston ,  Chu-Chung Lee ,  Tu-Anh N. Tran ,  James W. Miller ,  Kevin J. Hess

IPC: H01L21/44

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49833 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48471 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2224/4945 ,  H01L2224/85191 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/4554

Abstract: A packaging assembly (30), such as a ball grid array package, is formed which distributes power across an interior region of an integrated circuit die (52) by using an encapsulated patterned leadframe conductor (59) that is disposed over the die (52) and bonded to a plurality of bonding pads (45) formed in a BGA carrier substrate (42) and in the interior die region, thereby electrically coupling the interior die region to an externally provided reference voltage.

Abstract translation: 形成诸如球栅阵列封装的封装组件（30），其通过使用设置在模具（52）上的封装的图案化引线框导体（59）来分布跨集成电路管芯（52）的内部区域的电力 ）并且接合到形成在BGA载体衬底（42）中的多个接合焊盘（45）和内部管芯区域中，从而将内部管芯区域电连接到外部提供的参考电压。

公开(公告)号：US08101527B2

公开(公告)日：2012-01-24

申请号：US12758505

申请日：2010-04-12

Applicant: Joon Mo Seo ,  Hyuk Soo Moon ,  Cheol Jong Han ,  Jong Geol Lee ,  Kyung Tae Wi

Inventor： Joon Mo Seo ,  Hyuk Soo Moon ,  Cheol Jong Han ,  Jong Geol Lee ,  Kyung Tae Wi

IPC: H01L21/31

CPC classification number: H01L21/78 ,  C09J7/22 ,  C09J7/35 ,  C09J2201/134 ,  C09J2203/326 ,  C09J2463/00 ,  C09J2467/006 ,  C09J2479/08 ,  H01L21/6836 ,  H01L24/27 ,  H01L24/29 ,  H01L24/45 ,  H01L24/73 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/85201 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: The present invention relates to a dicing film having an adhesive film for dicing a wafer and a die adhesive film, which are used for manufacturing a semiconductor package, and a method of manufacturing a semiconductor package using the same. More particularly, the present invention relates to a dicing film wherein a shrinkage release film is inserted between an adhesive film for dicing a wafer and a die adhesive film so that the die adhesive film and a die can be easily separated from the adhesive film for dicing a wafer when picking up a semiconductor die, and a method of manufacturing a semiconductor package using the same.

Abstract translation: 本发明涉及一种具有用于切割晶片的粘合剂膜和用于制造半导体封装的芯片粘合膜的切割膜以及使用其的半导体封装的制造方法。 更具体地说，本发明涉及一种切割膜，其中将收缩剥离膜插入在用于切割晶片的粘合膜和模片粘合剂膜之间，使得模片粘合剂膜和模具可以容易地从用于切割的粘合剂膜分离 拾取半导体管芯时的晶片，以及使用其制造半导体封装的方法。

公开(公告)号：US08084847B2

公开(公告)日：2011-12-27

申请号：US12486998

申请日：2009-06-18

Applicant: Lei Wang ,  Jai-sung Lee ,  Qian Wang ,  Zhenging Zhao

Inventor： Lei Wang ,  Jai-sung Lee ,  Qian Wang ,  Zhenging Zhao

IPC: H01L23/495

CPC classification number: H01L23/49541 ,  H01L23/49572 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/48644 ,  H01L2224/48844 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85001 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85444 ,  H01L2224/85947 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  Y10T29/49121 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/00012

Abstract: A prefabricated lead frame to bond a chip and a substrate, and a bonding method using the prefabricated lead frame. The prefabricated lead frame includes an inner ring, an outer ring, and a plurality of wires, wherein inner ends and outer ends of the wires are respectively connected to the inner ring and the outer ring, and the prefabricated lead frame has a wire shape corresponding to a chip and a substrate to be bonded. The prefabricated lead frame may be manufactured in batch production to increase the manufacturing efficiency of semiconductor devices, and the prefabricated lead frame may be used instead of a general wire bonding process.

Abstract translation: 用于结合芯片和基板的预制引线框架和使用预制引线框架的接合方法。 预制引线框架包括内环，外环和多根电线，其中电线的内端和外端分别连接到内环和外环，并且预制引线框架具有对应的线形状 连接到芯片和待接合的基板。 预制引线框架可以批量生产以提高半导体器件的制造效率，并且可以使用预制引线框架来代替通常的引线接合工艺。

公开(公告)号：US08053909B2

公开(公告)日：2011-11-08

申请号：US13007743

申请日：2011-01-17

Applicant: David R. Hembree

Inventor： David R. Hembree

IPC: H01L23/49

CPC classification number: H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact. The semiconductor component can be used to form chip scale components, wafer scale components, stacked components, or interconnect components for electrically engaging or testing other semiconductor components.

Abstract translation: 用于通过导线互连制造半导体部件的方法包括提供具有电路侧，背面和通孔的基板的步骤。 该方法还包括以下步骤：将导线穿过通孔，在背面的导线上形成接触，在电路侧的导线上形成接合接触，然后将线从接合接触件断开。 通线互连包括通孔中的导线，背侧的触点和电路侧的接合触点。 背面的触点和电路侧的接合触点允许多个部件与相邻部件之间的电连接层叠。 用于执行该方法的系统包括具有通孔的基板和具有接合毛细管的引线接合器，所述接合毛细管被配置为使线穿过通孔，并形成接触和接合接触。 半导体部件可用于形成用于电接合或测试其它半导体部件的芯片级部件，晶片级部件，堆叠部件或互连部件。

公开(公告)号：US08018075B2

公开(公告)日：2011-09-13

申请号：US12501309

申请日：2009-07-10

Applicant: Hsiao Chuan Chang ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Ho Ming Tong ,  Jian Cheng Chen ,  Wei Chi Yih ,  Chang Ying Hung

Inventor： Hsiao Chuan Chang ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Ho Ming Tong ,  Jian Cheng Chen ,  Wei Chi Yih ,  Chang Ying Hung

IPC: H01L23/48 ,  H01L21/44

CPC classification number: H01L24/85 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85201 ,  H01L2224/85375 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A wire bonding structure of a semiconductor package includes a bonding wire, a pad and a non-conductive adhesive material. The bonding wire includes a line portion and a block portion, wherein the block portion is physically connected to the line portion, and the sectional area of the block portion is bigger than that of the line portion. The pad is bonded to the block portion. The non-conductive adhesive material covers the pad and seals the whole block portion of the bonding wire.

Abstract translation: 半导体封装的引线接合结构包括接合线，焊盘和非导电粘合材料。 接合线包括线部分和块部分，其中块部分物理连接到线部分，并且块部分的截面积大于线部分的截面面积。 焊盘粘合到块部分。 非导电粘合剂材料覆盖焊盘并密封焊丝的整个块部分。

公开(公告)号：US07928544B2

公开(公告)日：2011-04-19

申请号：US12120515

申请日：2008-05-14

Applicant: Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

Inventor： Chien-Te Feng ,  Yuan-Pao Cheng ,  Li-Chaio Chou

IPC: H01L23/495

CPC classification number: H01L23/4334 ,  H01L23/49551 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: The invention relates to leadframes and semiconductor chip package assemblies using leadframes, and to methods for their assembly. A disclosed embodiment of the invention includes a semiconductor package leadframe with a chip mounting surface for receiving a semiconductor chip and a plurality of leadfingers. The leadfingers have a proximal end for receiving one or more wirebond, and a distal end for providing an electrical path from the proximal end. One or more of the leadfingers also has an offset portion at its proximal end for increasing the clearance between the leadfinger and underlying heat spreader, increasing the stiffness of the leadfinger, and increasing leadfinger deflection-resistance and spring-back. The offset is in the direction opposite the plane of a heat spreader thermally coupled to the mounting surface. Preferred embodiments of the invention further include a semiconductor chip affixed to the mounting surface and a plurality of bondwires operably coupling bond pads of the chip to the offset portions of the proximal ends of individual leadfingers.

Abstract translation: 本发明涉及引线框和使用引线框的半导体芯片封装组件及其组装方法。 本发明公开的实施例包括具有用于接收半导体芯片和多个引线引脚的芯片安装表面的半导体封装引线框架。 引导器具有用于接收一个或多个引线键的近端和用于从近端提供电路径的远端。 一个或多个引导装置在其近端还具有偏移部分，用于增加引导器和下面的散热器之间的间隙，增加引导件的刚度，以及增加引线架的抗偏转和弹回。 偏移方向与热耦合到安装表面的散热器的平面相反。 本发明的优选实施例还包括固定到安装表面的半导体芯片和可操作地将芯片的接合焊盘耦合到单个引线管的近端的偏移部分的多个焊丝。