公开(公告)号：US20080079505A1

公开(公告)日：2008-04-03

申请号：US11904526

申请日：2007-09-26

Applicant: Tomotaka Kuroda

Inventor： Tomotaka Kuroda

IPC: H03B1/02 ,  H01L41/053

CPC classification number: H05K1/144 ,  H05K3/301 ,  H05K3/3421 ,  H05K3/3442 ,  H05K3/3447 ,  H05K2201/042 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/10083 ,  H05K2201/10318 ,  H05K2201/10325 ,  H05K2201/10871

Abstract: To provide high reliable surface mounting oscillator that solder does not leak out by heat from the oscillator. The base print board with a terminal on the first surface and a concave on the second surface which is the opposite side of the first surface, the metal strut fixed to the concave, the sub print board has piezoelectric vibrator supported by the metal strut, the base print board, the cover which covers the metal strut and the sub print board.

Abstract translation: 提供高可靠的表面安装振荡器，焊料不会从振荡器的热量泄漏出来。 基板印刷电路板具有位于第一表面上的端子，第二表面上是与第一表面相对的凹面，金属支柱固定在凹面上，副印刷电路板具有由金属支柱支撑的压电振动器， 基板印刷板，覆盖金属支柱和副印刷板的盖板。

公开(公告)号：US20080076249A1

公开(公告)日：2008-03-27

申请号：US11898973

申请日：2007-09-18

Applicant: Tomoharu Fujii ,  Kiyoshi Oi

Inventor： Tomoharu Fujii ,  Kiyoshi Oi

IPC: H01L21/44

CPC classification number: H05K3/4652 ,  H01L21/4853 ,  H01L23/552 ,  H01L24/48 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/185 ,  H05K3/06 ,  H05K3/4046 ,  H05K3/4614 ,  H05K2201/10318 ,  H05K2203/0369 ,  H05K2203/0733 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing a semiconductor device includes: a step of forming a via plug erected on an electrically conductive layer, and embedding the via plug in an insulation layer to form a wiring structure; and a step of bonding the wiring structure to a wiring substrate including electronic components mounted thereon.

Abstract translation: 一种制造半导体器件的方法包括：形成竖立在导电层上的通孔插塞的步骤，并且将通孔插塞嵌入绝缘层中以形成布线结构; 以及将布线结构接合到包括安装在其上的电子部件的布线基板的步骤。

公开(公告)号：US07347702B2

公开(公告)日：2008-03-25

申请号：US11561297

申请日：2006-11-17

Applicant: Benjamin N. Eldridge ,  Thomas H. Dozier, II ,  Igor Y. Khandros ,  Gaetan L. Mathieu ,  William D. Smith

Inventor： Benjamin N. Eldridge ,  Thomas H. Dozier, II ,  Igor Y. Khandros ,  Gaetan L. Mathieu ,  William D. Smith

IPC: H01R12/00

CPC classification number: H05K3/4015 ,  B23K1/0016 ,  B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D21/02 ,  G01R1/06711 ,  G01R1/06716 ,  G01R1/07342 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/49208 ,  Y10T29/49222 ,  H01L2924/00 ,  H01L2224/48

Abstract: An interconnection apparatus and a method of forming an interconnection apparatus. Contact structures are attached to or formed on a first substrate. The first substrate is attached to a second substrate, which is larger than the first substrate. Multiple such first substrates may be attached to the second substrate in order to create an array of contact structures. Each contact structure may be elongate and resilient and may comprise a core that is over coated with a material that imparts desired structural properties to the contact structure.

Abstract translation: 一种互连装置和形成互连装置的方法。 接触结构附着在第一基底上或形成在第一基底上。 第一衬底附接到比第一衬底大的第二衬底。 可以将多个这样的第一基板附接到第二基板，以便产生接触结构的阵列。 每个接触结构可以是细长的和弹性的，并且可以包括在涂覆有向接触结构赋予期望的结构特性的材料的芯上。

公开(公告)号：US20080055874A1

公开(公告)日：2008-03-06

申请号：US11572334

申请日：2005-08-30

Applicant: Masanori Kawade ,  Hiroyuki Tsuruga ,  Makoto Ebina

Inventor： Masanori Kawade ,  Hiroyuki Tsuruga ,  Makoto Ebina

IPC: H01R9/00

CPC classification number: H01L24/81 ,  H01L23/49811 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15312 ,  H05K3/3426 ,  H05K2201/10318 ,  H05K2201/1084 ,  Y02P70/613 ,  H01L2224/05599

Abstract: A semiconductor loading lead pin that does not tilt at a time of reflow. A void is sometimes left in solder between an electrode pad and the flange of a semiconductor loading lead pin. When reflow is carried out to load an IC chip, the solder for connection is melted and at the same time, the void in the solder is expanded. The solder escapes sideway along the groove portion, and thereby a flange is not raised by the void so that the semiconductor loading lead pin is not tilted.

Abstract translation: 半导体负载引脚，在回流时不倾斜。 在电极焊盘和半导体负载引脚的凸缘之间的焊料中有时留下空隙。 当进行回流以加载IC芯片时，用于连接的焊料熔化，并且同时焊料中的空隙膨胀。 焊料沿着槽部侧向逸出，由此凸缘不会被空隙升高，使得半导体负载引脚不倾斜。

公开(公告)号：US20080009155A1

公开(公告)日：2008-01-10

申请号：US11351028

申请日：2006-02-09

Applicant: Kazuhiko Ide ,  Hiroyuki Motoda ,  Yoshinori Furihata

Inventor： Kazuhiko Ide ,  Hiroyuki Motoda ,  Yoshinori Furihata

IPC: H01R12/00

CPC classification number: H01R43/0256 ,  H01L2924/0002 ,  H01L2924/15312 ,  H05K3/3426 ,  H05K2201/10318 ,  Y02P70/613 ,  H01L2924/00

Abstract: A wiring board with lead pins having high reliability is provided. When the lead pins are attached to electrode pads, the lead pins are attached to the electrode pads without leaving voids in a conductive agent, and bonding strength of the lead pins are improved. When the wiring board to which the lead pins are attached is reheated, the lead pins are prevented from being inclined or shifted from their normal positions. In the wiring board with lead pins formed by attaching head portions of the lead pins to the electrode pads formed on the wiring board through the conductive agent, the lead pin has notch portions are formed in cut-out shapes in peripheral edge portion of the disk shaped head portion.

Abstract translation: 提供具有高可靠性的引线引脚的布线板。 当引线引脚连接到电极焊盘时，引线引脚连接到电极焊盘，而不会在导电剂中留下空隙，引脚的焊接强度提高。 当引线引脚连接到的接线板被再加热时，可以防止引脚从其正常位置倾斜或偏移。 在通过导电剂将引线引脚的头部附着在布线板上形成的电极焊盘而形成的引线引脚的引线板中，引线销具有切​​口形状，在圆盘的周缘部分形成切口形状 形状的头部。

公开(公告)号：US20070264845A1

公开(公告)日：2007-11-15

申请号：US11433363

申请日：2006-05-15

Applicant: Olof Simonsson ,  Omid Kazemifar ,  Mikael Hall ,  Maiko Karlsson ,  Hakan Petersson

Inventor： Olof Simonsson ,  Omid Kazemifar ,  Mikael Hall ,  Maiko Karlsson ,  Hakan Petersson

IPC: H01R12/00

CPC classification number: H01R12/62 ,  H01R4/04 ,  H05K3/326 ,  H05K3/365 ,  H05K2201/10234 ,  H05K2201/10318 ,  H05K2201/1059 ,  H05K2201/10704 ,  H05K2201/10734

Abstract: A system includes a first electrical device including a conductive structure, and a second electrical device including an opening and a conductor provided in the opening. The conductor contacts the conductive structure of the first electrical device to electrically interconnect the first electrical device to the second electrical device.

Abstract translation: 一种系统包括包括导电结构的第一电气装置和包括设置在开口中的开口和导体的第二电气装置。 导体接触第一电气装置的导电结构以使第一电气装置与第二电气装置电互连。

公开(公告)号：US20070075715A1

公开(公告)日：2007-04-05

申请号：US11561297

申请日：2006-11-17

Applicant: Igor Khandros ,  Benjamin Eldridge ,  Gaetan Mathieu ,  Thomas Dozier ,  William Smith

Inventor： Igor Khandros ,  Benjamin Eldridge ,  Gaetan Mathieu ,  Thomas Dozier ,  William Smith

IPC: G01R31/02

CPC classification number: H05K3/4015 ,  B23K1/0016 ,  B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D21/02 ,  G01R1/06711 ,  G01R1/06716 ,  G01R1/07342 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/49208 ,  Y10T29/49222 ,  H01L2924/00 ,  H01L2224/48

Abstract: An interconnection apparatus and a method of forming an interconnection apparatus. Contact structures are attached to or formed on a first substrate. The first substrate is attached to a second substrate, which is larger than the first substrate. Multiple such first substrates may be attached to the second substrate in order to create an array of contact structures. Each contact structure may be elongate and resilient and may comprise a core that is over coated with a material that imparts desired structural properties to the contact structure.

Abstract translation: 一种互连装置和形成互连装置的方法。 接触结构附着在第一基底上或形成在第一基底上。 第一衬底附接到比第一衬底大的第二衬底。 可以将多个这样的第一基板附接到第二基板，以便产生接触结构的阵列。 每个接触结构可以是细长的和弹性的，并且可以包括在涂覆有向接触结构赋予期望的结构特性的材料的芯上。

公开(公告)号：US07196402B2

公开(公告)日：2007-03-27

申请号：US10937647

申请日：2004-09-08

Applicant: Gabe Cherian

Inventor： Gabe Cherian

IPC: H01L23/495

CPC classification number: H01L24/12 ,  H01L23/49555 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/3426 ,  H05K2201/09418 ,  H05K2201/10318 ,  H05K2201/10386 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10825 ,  Y02P70/613 ,  H01L2224/29099 ,  H01L2924/00

Abstract: The present invention relates generally to permanent interconnections between electronic devices, such as integrated circuit packages, chips, wafers and printed circuit boards or substrates, or similar electronic devices. More particularly it relates to high-density electronic devices.The invention describes means and methods that can be used to counteract the undesirable effects of thermal cycling, shock and vibrations and severe environment conditions in general.For leaded devices, the leads are oriented to face the thermal center of the devices and the system they interact with.For leadless devices, the mounting elements are treated or prepared to control the migration of solder along the length of the elements, to ensure that those elements retain their desired flexibility.

Abstract translation: 本发明一般涉及电子设备之间的永久互连，例如集成电路封装，芯片，晶片和印刷电路板或基板或类似的电子设备。 更具体地说，涉及高密度电子设备。

公开(公告)号：US20070046313A1

公开(公告)日：2007-03-01

申请号：US11552856

申请日：2006-10-25

Applicant: Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Ga tan Mathieu

Inventor： Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Ga tan Mathieu

IPC: G01R31/26

CPC classification number: H05K7/1069 ,  B23K1/0008 ,  B23K20/004 ,  B23K2101/40 ,  C23C18/1605 ,  C23C18/165 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R31/2856 ,  G01R31/2863 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/49811 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/16 ,  H01L2223/54453 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45572 ,  H01L2224/45599 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48844 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/90 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10S977/712 ,  Y10S977/723 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/4922 ,  Y10T29/49812 ,  Y10T428/12396 ,  Y10T428/12528 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/29099 ,  H01L2224/29075 ,  H01L2224/85399 ,  H01L2924/206

Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150° C., and can be completed in less than 60 minutes.

Abstract translation: 弹性接触结构直接安装在半导体晶片上的接合焊盘上，在裸片与半导体晶片分离（分离）之前。 这使得半导体管芯能够通过具有设置在其表面上的多个端子的电路板等连接到半导体管芯来进行（例如，测试和/或烧入）。 接下来，半导体管芯可以从半导体晶片分离，因此可以使用相同的弹性接触结构来实现半导体管芯和其他电子部件（例如布线基板，半导体封装等）之间的互连。 使用本发明的全金属复合互连元件作为弹性接触结构，可以在至少150℃的温度下进行老化，并且可以在少于60分钟内完成。

公开(公告)号：US20060289977A1

公开(公告)日：2006-12-28

申请号：US11167425

申请日：2005-06-27

Applicant: Raj Master ,  Srinivasan Anand ,  Srinivasan Parthasarathy ,  Yew Mui

Inventor： Raj Master ,  Srinivasan Anand ,  Srinivasan Parthasarathy ,  Yew Mui

IPC: H01L23/02

CPC classification number: C22C13/02 ,  B23K35/262 ,  H01L23/49811 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15312 ,  H01L2924/19105 ,  H05K3/3463 ,  H05K2201/10318 ,  H05K2201/10674 ,  H05K2203/047 ,  H01L2224/81 ,  H01L2224/0401

Abstract: A package substrate includes die solder pads and pin solder fillets. The pin solder fillets might comprise between approximately 90 wt % to approximately 99 wt % tin and approximately 10 wt % to 1 wt % antimony. The die solder pads might comprise between approximately 4 wt % to approximately 8 wt % bismuth, approximately 2 wt % to approximately 4 wt % silver, approximately 0 wt % to approximately 0.7 wt % copper, and approximately 87 wt % to approximately 92 wt % tin. The die solder pads might comprise between approximately 7 wt % to approximately 20 wt % indium, between approximately 2 wt % to approximately 4.5 wt % silver, between approximately 0 wt % to approximately 0.7 wt % copper, between approximately 0 wt % to approximately 0.5 wt % antimony, and between approximately 74.3 wt % to approximately 90 wt % tin.

Abstract translation: 封装衬底包括管芯焊盘和焊脚焊脚。 针焊料焊片可以包含约90重量％至约99重量％的锡和约10重量％至1重量％的锑。 模焊盘可以包括约4重量％至约8重量％的铋，约2重量％至约4重量％的银，约0重量％至约0.7重量％的铜，以及约87重量％至约92重量％ 锡。 模焊盘可以包括约7重量％至约20重量％的铟，约2重量％至约4.5重量％的银之间，约0重量％至约0.7重量％的铜之间，约0重量％至约0.5重量％ 重量锑，以及约74.3重量％至约90重量％的锡。