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    High density signal interposer with power and ground wrap
    3.
    发明授权
    High density signal interposer with power and ground wrap 有权
    高密度信号插入器，具有电源和地面包装

    公开(公告)号：US6081026A

    公开(公告)日：2000-06-27

    申请号：US191755

    申请日：1998-11-13

    申请人： Wen-chou Vincent Wang ,  Yasuhito Takahashi ,  William T. Chou ,  Michael G. Peters ,  Michael G. Lee ,  Solomon Beilin

    发明人： Wen-chou Vincent Wang ,  Yasuhito Takahashi ,  William T. Chou ,  Michael G. Peters ,  Michael G. Lee ,  Solomon Beilin

    IPC分类号： H01L23/498 ,  H01L23/50 ,  H01L23/538 ,  H01L23/552 ,  H05K1/02 ,  H05K1/14 ,  H05K3/20 ,  H01L23/12 ,  H01L23/053

    CPC分类号： H01L23/5383 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/552 ,  H05K1/0219 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/141 ,  H05K1/144 ,  H05K2201/049 ,  H05K2201/055 ,  H05K2201/10378 ,  H05K3/20

    摘要： An interposer for providing power, ground, and signal connections between an integrated circuit chip or chips and a substrate. The interposer includes a signal core and external power/ground connection wrap. The two sections may be fabricated and tested separately, then joined together using z-connection technology. The signal core is a dielectric film with patterned metal on both sides. The two metal layers are interconnected by a through via or post process. The power/ground wrap includes an upper substrate positioned above the signal core and a lower substrate positioned below the signal core. The upper and lower substrates of the power/ground wrap are formed from a dielectric film having a patterned metal layer on both sides connected by a through via or post process. The upper power/ground wrap substrate, signal core, and lower power/ground substrate are interconnected as desired using z-connection technology (e.g., solder or conductive ink). The power/ground layers on the upper substrate can be connected to the power/ground layers on the lower substrate by suitable edge connectors. With an integrated circuit chip or chips connected to the upper layer of the top substrate of the power/ground wrap and a printed circuit board or other mounting substrate connected to the bottom layer of the lower substrate of the wrap, the inventive interposer provides a set of high density and electrically isolated signal, power, and ground interconnections.

    摘要翻译： 一种用于在集成电路芯片或芯片与基板之间提供电源，接地和信号连接的插入器。 插入器包括信号芯和外部电源/接地连接外壳。 这两个部分可以单独制造和测试，然后使用z连接技术连接在一起。 信号芯是两侧具有图案化金属的电介质膜。 两个金属层通过通孔或后处理相互连接。 电源/接地包裹物包括位于信号芯上方的上基板和位于信号芯下方的下基板。 电源/接地套管的上基板和下基板由具有通过通孔或后工艺连接的两侧上的图案化金属层的电介质膜形成。 上电源/地基封装衬底，信号芯和下电源/接地衬底根据需要使用z连接技术（例如焊料或导电油墨）互连。 上基板上的电源/接地层可以通过合适的边缘连接器连接到下基板上的电源/接地层。 通过将集成电路芯片或芯片连接到电源/接地外壳的顶部基板的上层，以及连接到包装的下基板的底层的印刷电路板或其它安装基板，本发明的插入件提供一组 高密度和电隔离的信号，电源和接地互连。

    Sputtered and anodized capacitors capable of withstanding exposure to high temperatures
    10.
    发明授权
    Sputtered and anodized capacitors capable of withstanding exposure to high temperatures 失效
    溅射和阳极氧化电容器能承受高温暴露

    公开(公告)号：US5872696A

    公开(公告)日：1999-02-16

    申请号：US826980

    申请日：1997-04-09

    申请人： Michael G. Peters ,  Michael G. Lee ,  Solomon I. Beilin ,  Yasuhito Takahashi

    发明人： Michael G. Peters ,  Michael G. Lee ,  Solomon I. Beilin ,  Yasuhito Takahashi

    IPC分类号： H01G4/08 ,  H01L21/02 ,  H01G4/008 ,  B05D5/12 ,  H01G4/06

    CPC分类号： H01L28/60 ,  H01G4/085

    摘要： Novel structures for capacitors which are capable of withstanding heat treatments to at least 400.degree. C. while providing low defect densities and low electrical series resistance in its electrodes are disclosed. In one embodiment of the present invention, a capacitor structure includes a bottom capacitor electrode formed of a first sub-layer of aluminum, a second sub-layer of tantalum nitride, and a third sub-layer of tantalum. The capacitor structure further includes a sputtered dielectric layer of tantalum pentoxide over the tantalum sub-layer of the bottom electrode. The resulting structure is anodized such that the underlying tantalum layer is fully anodized, and preferably such that a portion of the tantalum nitride layer is converted to a tantalum oxy-nitride. The tantalum nitride layer was discovered by the inventors to act as a good high temperature diffusion barrier for the aluminum, preventing the aluminum from migrating into the anodized tantalum pentoxide layer under high temperature processing conditions, where it would chemically reduce the tantalum atoms in the tantalum pentoxide layer and introduce conductive paths of tantalum in the dielectric (tantalum pentoxide) layer. The aluminum layer provides good electrical conductivity for the bottom electrode, and is anodized to fill any pinhole defects in the layers formed above it, thereby increasing manufacturing yields.

    摘要翻译： 公开了一种电容器的新型结构，其能够耐热处理至少400℃，同时在其电极中提供低缺陷密度和低电串联电阻。 在本发明的一个实施例中，电容器结构包括由铝的第一子层，氮化钽的第二子层和钽的第三子层形成的底部电容器电极。 电容器结构还包括在底部电极的钽子层上的五氧化二钽的溅射介电层。 所得到的结构被阳极氧化，使得下面的钽层被完全阳极氧化，并且优选地使得一部分氮化钽层转化为氮氧化钽。 本发明人发现氮化钽层用作铝的良好的高温扩散阻挡层，防止铝在高温加工条件下迁移到阳极氧化的五氧化二钽层中，其中它将化学还原钽中的钽原子 并在介电（五氧化二钽）层中引入钽的导电路径。 铝层为底部电极提供良好的导电性，并被阳极氧化以填充其上形成的层中的任何针孔缺陷，从而提高制造产量。