专利检索 cpc:"H01L2924/054" 第 1 页

1.

发明授权
Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate 有权
标题翻译：半导体封装和将半导体裸片安装在TSV基板的相对侧上的方法

公开(公告)号：US09305897B2

公开(公告)日：2016-04-05

申请号：US14138646

申请日：2013-12-23

申请人： STATS ChipPAC, Ltd.

发明人： DaeSik Choi , JongHo Kim , HyungMin Lee

IPC分类号： H01L21/4763 , H01L23/00 , H01L21/683 , H01L23/498 , H01L23/538 , H01L23/552 , H01L25/065 , H01L25/10 , H01L25/00 , H01L23/522 , H01L23/48 , H01L23/31 , H01L23/367 , H05K3/00

CPC分类号： H01L24/82 , H01L21/6835 , H01L23/3107 , H01L23/3121 , H01L23/3128 , H01L23/3672 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/5226 , H01L23/5389 , H01L23/552 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/95 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2221/68331 , H01L2221/68363 , H01L2221/68381 , H01L2221/68386 , H01L2224/0401 , H01L2224/04042 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/131 , H01L2224/13111 , H01L2224/16225 , H01L2224/29 , H01L2224/29101 , H01L2224/29144 , H01L2224/29187 , H01L2224/2919 , H01L2224/29298 , H01L2224/48105 , H01L2224/48175 , H01L2224/48227 , H01L2224/48228 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81191 , H01L2224/81192 , H01L2224/81815 , H01L2224/95001 , H01L2224/96 , H01L2224/97 , H01L2225/06548 , H01L2225/06572 , H01L2225/1023 , H01L2225/1058 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/09701 , H01L2924/10329 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/181 , H01L2924/3025 , H05K3/0052 , H05K3/007 , H05K3/0097 , H01L2924/01014 , H01L2924/05432 , H01L2924/054 , H01L2924/0542 , H01L2924/00 , H01L2924/3512 , H01L2224/81 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207

摘要： A semiconductor device includes a wafer level substrate having a plurality of first conductive vias formed through the wafer level substrate. A first semiconductor die is mounted to the wafer level substrate. A first surface of the first semiconductor die includes contact pads oriented toward a first surface of the wafer level substrate. A first encapsulant is deposited over the first semiconductor die. A second semiconductor die is mounted to the wafer level substrate. A first surface of the second semiconductor die includes contact pads oriented toward a second surface of the wafer level substrate opposite the first surface of the wafer level substrate. A second encapsulant is deposited over the second semiconductor die. A plurality of bumps is formed over the plurality of first conductive vias. A second conductive via can be formed through the first encapsulant and connected to the first conductive via. The semiconductor packages are stackable.

摘要翻译： 半导体器件包括具有通过晶片级衬底形成的多个第一导电通孔的晶片级衬底。第一半导体管芯安装到晶片级衬底。第一半导体管芯的第一表面包括朝向晶片级衬底的第一表面定向的接触焊盘。第一密封剂沉积在第一半导体管芯上。第二半导体管芯安装到晶片级衬底。第二半导体管芯的第一表面包括朝向与晶片级衬底的第一表面相对的晶片级衬底的第二表面的接触焊盘。第二密封剂沉积在第二半导体管芯上。在多个第一导电通孔上形成多个凸点。可以通过第一密封剂形成第二导电通孔并连接到第一导电通孔。半导体封装是可堆叠的。

2.

发明授权
Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods 有权

公开(公告)号：US09966347B2

公开(公告)日：2018-05-08

申请号：US15624493

申请日：2017-06-15

申请人： Micron Technology, Inc.

发明人： Brandon P. Wirz , Jaspreet S. Gandhi , Christopher J. Gambee , Satish Yeldandi

IPC分类号： H01L21/20 , H01L21/768 , H01L29/43 , H01L29/84 , H01L23/498 , H01L23/00 , H01L23/48

CPC分类号： H01L23/481 , H01L24/03 , H01L24/05 , H01L24/94 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/03614 , H01L2224/038 , H01L2224/0382 , H01L2224/039 , H01L2224/03914 , H01L2224/0401 , H01L2224/05009 , H01L2224/05016 , H01L2224/05017 , H01L2224/05025 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05583 , H01L2224/05584 , H01L2224/05687 , H01L2224/94 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/365 , H01L2924/00014 , H01L2924/04953 , H01L2924/01074 , H01L2924/00012 , H01L2924/053 , H01L2924/054 , H01L2224/03

摘要： The present technology is directed to manufacturing semiconductor dies with under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects or other types of interconnects. In one embodiment, a method for forming under-bump metal (UBM) structures on a semiconductor die comprises constructing a UBM pillar by plating a first material onto first areas of a seed structure and depositing a second material over the first material. The first material has first electrical potential and the second material has a second electrical potential greater than the first electrical potential. The method further comprises reducing the difference in the electrical potential between the first material and the second material, and then removing second areas of the seed structure between the UBM pillars thereby forming UBM structures on the semiconductor die.

3.

发明授权
Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods 有权

公开(公告)号：US09704781B2

公开(公告)日：2017-07-11

申请号：US14084037

申请日：2013-11-19

申请人： Micron Technology, Inc.

发明人： Brandon P. Wirz , Jaspreet S. Gandhi , Christopher J. Gambee , Satish Yeldandi

IPC分类号： H01L23/498 , H01L21/3205 , H01L21/60 , H01L23/48 , H01L21/44 , H01L23/00

CPC分类号： H01L23/481 , H01L24/03 , H01L24/05 , H01L24/94 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/03614 , H01L2224/038 , H01L2224/0382 , H01L2224/039 , H01L2224/03914 , H01L2224/0401 , H01L2224/05009 , H01L2224/05016 , H01L2224/05017 , H01L2224/05025 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05583 , H01L2224/05584 , H01L2224/05687 , H01L2224/94 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/365 , H01L2924/00014 , H01L2924/04953 , H01L2924/01074 , H01L2924/00012 , H01L2924/053 , H01L2924/054 , H01L2224/03

摘要： The present technology is directed to manufacturing semiconductor dies with under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects or other types of interconnects. In one embodiment, a method for forming under-bump metal (UBM) structures on a semiconductor die comprises constructing a UBM pillar by plating a first material onto first areas of a seed structure and depositing a second material over the first material. The first material has first electrical potential and the second material has a second electrical potential greater than the first electrical potential. The method further comprises reducing the difference in the electrical potential between the first material and the second material, and then removing second areas of the seed structure between the UBM pillars thereby forming UBM structures on the semiconductor die.

4.

发明申请
UNDER-BUMP METAL STRUCTURES FOR INTERCONNECTING SEMICONDUCTOR DIES OR PACKAGES AND ASSOCIATED SYSTEMS AND METHODS 有权
标题翻译：用于互连半导体器件或封装及相关系统和方法的欠压金属结构

公开(公告)号：US20150137353A1

公开(公告)日：2015-05-21

申请号：US14084037

申请日：2013-11-19

申请人： Micron Technology, Inc.

发明人： Brandon P. Wirz , Jaspreet S. Gandhi , Christopher J. Gambee , Satish Yeldandi

IPC分类号： H01L23/00 , H01L23/48

CPC分类号： H01L23/481 , H01L24/03 , H01L24/05 , H01L24/94 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/03614 , H01L2224/038 , H01L2224/0382 , H01L2224/039 , H01L2224/03914 , H01L2224/0401 , H01L2224/05009 , H01L2224/05016 , H01L2224/05017 , H01L2224/05025 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05583 , H01L2224/05584 , H01L2224/05687 , H01L2224/94 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/365 , H01L2924/00014 , H01L2924/04953 , H01L2924/01074 , H01L2924/00012 , H01L2924/053 , H01L2924/054 , H01L2224/03

摘要： The present technology is directed to manufacturing semiconductor dies with under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects or other types of interconnects. In one embodiment, a method for forming under-bump metal (UBM) structures on a semiconductor die comprises constructing a UBM pillar by plating a first material onto first areas of a seed structure and depositing a second material over the first material. The first material has first electrical potential and the second material has a second electrical potential greater than the first electrical potential. The method further comprises reducing the difference in the electrical potential between the first material and the second material, and then removing second areas of the seed structure between the UBM pillars thereby forming UBM structures on the semiconductor die.

摘要翻译： 本技术涉及制造具有用于管芯到管芯和/或封装到封装互连或其它类型互连的具有凸块下金属（UBM）结构的半导体管芯。在一个实施例中，用于在半导体管芯上形成凸块状凸起的金属（UBM）结构的方法包括通过将第一材料镀在种子结构的第一区域上并在第一材料上沉积第二材料来构造UBM柱。第一材料具有第一电位，第二材料具有大于第一电位的第二电势。该方法还包括减小第一材料和第二材料之间的电位差，然后去除UBM柱之间的种子结构的第二区域，从而在半导体管芯上形成UBM结构。

5.

发明申请
UNDER-BUMP METAL STRUCTURES FOR INTERCONNECTING SEMICONDUCTOR DIES OR PACKAGES AND ASSOCIATED SYSTEMS AND METHODS 有权

公开(公告)号：US20170287857A1

公开(公告)日：2017-10-05

申请号：US15624493

申请日：2017-06-15

申请人： Micron Technology, Inc.

发明人： Brandon P. Wirz , Jaspreet S. Gandhi , Christopher J. Gambee , Satish Yeldandi

IPC分类号： H01L23/00 , H01L23/48

CPC分类号： H01L23/481 , H01L24/03 , H01L24/05 , H01L24/94 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/03614 , H01L2224/038 , H01L2224/0382 , H01L2224/039 , H01L2224/03914 , H01L2224/0401 , H01L2224/05009 , H01L2224/05016 , H01L2224/05017 , H01L2224/05025 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05583 , H01L2224/05584 , H01L2224/05687 , H01L2224/94 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/365 , H01L2924/00014 , H01L2924/04953 , H01L2924/01074 , H01L2924/00012 , H01L2924/053 , H01L2924/054 , H01L2224/03

摘要： The present technology is directed to manufacturing semiconductor dies with under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects or other types of interconnects. In one embodiment, a method for forming under-bump metal (UBM) structures on a semiconductor die comprises constructing a UBM pillar by plating a first material onto first areas of a seed structure and depositing a second material over the first material. The first material has first electrical potential and the second material has a second electrical potential greater than the first electrical potential. The method further comprises reducing the difference in the electrical potential between the first material and the second material, and then removing second areas of the seed structure between the UBM pillars thereby forming UBM structures on the semiconductor die.

6.

发明申请
SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS 有权

公开(公告)号：US20170186627A1

公开(公告)日：2017-06-29

申请号：US15456767

申请日：2017-03-13

申请人： Kulicke and Soffa Industries, Inc.

发明人： Robert N. Chylak , Dominick A. DeAngelis , Horst Clauberg

IPC分类号： H01L21/449 , H01L21/762 , H01L25/00 , H01L25/065 , H01L23/00

CPC分类号： H01L21/449 , H01L21/76251 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/75 , H01L24/81 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2021/60195 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13187 , H01L2224/136 , H01L2224/13687 , H01L2224/16148 , H01L2224/16225 , H01L2224/16238 , H01L2224/48091 , H01L2224/48225 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75343 , H01L2224/75348 , H01L2224/75349 , H01L2224/75744 , H01L2224/75745 , H01L2224/759 , H01L2224/81121 , H01L2224/81193 , H01L2224/81201 , H01L2224/81203 , H01L2224/81205 , H01L2224/81207 , H01L2224/81355 , H01L2224/81409 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81801 , H01L2224/81895 , H01L2224/81906 , H01L2224/94 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/181 , H01L2924/19107 , H01L2924/20102 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20301 , H01L2924/20302 , H01L2924/20303 , H01L2924/20304 , H01L2924/20305 , H01L2924/20306 , H01L2924/20307 , H01L2924/01029 , H01L2924/01014 , H01L2924/00012 , H01L2924/014 , H01L2224/8121 , H01L2924/00 , H01L2224/45099 , H01L2224/81 , H01L2924/04941 , H01L2924/04953 , H01L2924/0503 , H01L2924/01013 , H01L2924/0504 , H01L2924/0105 , H01L2924/0502 , H01L2924/0103 , H01L2924/0494 , H01L2924/0104 , H01L2924/0495 , H01L2924/01023 , H01L2924/0496 , H01L2924/01024 , H01L2924/05 , H01L2924/01028 , H01L2924/0543 , H01L2924/0544 , H01L2924/0542 , H01L2924/0534 , H01L2924/0535 , H01L2924/0536 , H01L2924/054 , H01L2924/0463 , H01L2924/0464 , H01L2924/0462 , H01L2924/0454 , H01L2924/0455 , H01L2924/0456 , H01L2924/046 , H01L2924/01105

摘要： A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures. A bonding surface of at least one of the first conductive structures and the second conductive structures includes a frangible coating.

7.

发明授权
Induction heating for underfill removal and chip rework 有权
标题翻译：感应加热用于底部填料去除和芯片返修

公开(公告)号：US09508680B1

公开(公告)日：2016-11-29

申请号：US14741757

申请日：2015-06-17

申请人： GLOBALFOUNDRIES INC.

发明人： Stephen P. Ayotte , Glen E. Richard , Timothy M. Sullivan

IPC分类号： H01L23/00 , C09K5/06 , H01L21/56

CPC分类号： H01L24/98 , C09K5/06 , H01L21/56 , H01L21/563 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/1132 , H01L2224/11334 , H01L2224/1145 , H01L2224/11462 , H01L2224/131 , H01L2224/13111 , H01L2224/13116 , H01L2224/16227 , H01L2224/2929 , H01L2224/29355 , H01L2224/29357 , H01L2224/2936 , H01L2224/29387 , H01L2224/29388 , H01L2224/29499 , H01L2224/32225 , H01L2224/73204 , H01L2224/81424 , H01L2224/81447 , H01L2224/81455 , H01L2224/81466 , H01L2224/81815 , H01L2224/83102 , H01L2224/83862 , H01L2224/8388 , H01L2224/92125 , H01L2924/014 , H01L2924/00014 , H01L2924/01082 , H01L2924/01074 , H01L2924/069 , H01L2924/05381 , H01L2924/0549 , H01L2924/054 , H01L2924/01028 , H01L2924/0542 , H01L2924/0103 , H01L2924/01048 , H01L2924/0537 , H01L2924/01025 , H01L2924/0532 , H01L2924/01012 , H01L2924/05442

摘要： Underfill materials and methods for removing an underfill material from beneath a chip in relation to removal of the chip from a substrate. The underfill material may a plurality of particles dispersed in a bulk matrix. The material constituting the particles may be capable of generating heat energy when exposed to a time-varying magnetic field. The bulk matrix of the underfill material between the chip and a substrate may be heated with heat energy transferred from the particles. While heated, the underfill material is removed. The heating of the underfill material may also be used to heat solder bumps connecting the chip with the substrate so that the solder bumps are liquefied.

摘要翻译： 用于从芯片下面去除底部填充材料的底部填充材料和方法相对于从衬底移除芯片。底部填充材料可以分散在块状基质中的多个颗粒。构成颗粒的材料可以在暴露于时变磁场时能够产生热能。芯片和衬底之间的底部填充材料的主体矩阵可以用从颗粒转移的热能来加热。加热时，去除底部填充材料。底部填充材料的加热也可以用于加热将芯片与衬底连接的焊料凸块，使得焊料凸块液化。

8.

发明授权
Semiconductor device 有权
标题翻译：半导体器件

公开(公告)号：US09355937B2

公开(公告)日：2016-05-31

申请号：US14465884

申请日：2014-08-22

申请人： Mitsubishi Electric Corporation

发明人： Hidetoshi Koyama

IPC分类号： H01L23/482 , H01L23/48 , H01L23/00

CPC分类号： H01L23/4827 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/29 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/0361 , H01L2224/039 , H01L2224/04026 , H01L2224/05005 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05084 , H01L2224/05116 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05169 , H01L2224/05179 , H01L2224/05187 , H01L2224/05561 , H01L2224/05564 , H01L2224/05644 , H01L2224/29022 , H01L2224/291 , H01L2224/29144 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2924/054 , H01L2924/01028 , H01L2924/01078 , H01L2924/0544 , H01L2924/01082 , H01L2924/05341 , H01L2924/0539 , H01L2924/01027 , H01L2924/0105 , H01L2224/034

摘要： A semiconductor device includes a semiconductor substrate, a first metal layer, a barrier metal layer, and a second metal layer. The semiconductor substrate includes a front surface and a back surface. A semiconductor element and an electrode of the semiconductor element are located on the front surface. An opening in the back surface reaches a lower surface of the electrode, and the opening is defined by a side surface and a bottom surface. The first metal layer covers the side surface and the bottom surface. The barrier metal layer covers the first metal layer in the opening. The second metal layer is in contact with solder in the opening and is closer to the electrode than parts of the barrier metal layer. The second metal layer is laminated on the barrier metal layer and covers at least a part of the barrier metal layer in the opening.

摘要翻译： 半导体器件包括半导体衬底，第一金属层，阻挡金属层和第二金属层。半导体衬底包括前表面和后表面。半导体元件的半导体元件和电极位于前表面。后表面的开口到达电极的下表面，并且开口由侧表面和底表面限定。第一金属层覆盖侧表面和底表面。阻挡金属层覆盖开口中的第一金属层。第二金属层与开口中的焊料接触，并且比阻挡金属层的部分更接近电极。第二金属层被层压在阻挡金属层上并且覆盖开口中的阻挡金属层的至少一部分。