摘要:
Die vorliegende Erfindung betrifft ein verfahren zum Bonden eines ersten Festkörpersubstrats (1 ) mit einem eine erstes Material enthaltenden zweiten Festkörpersubstrat (2) mit folgenden Schritten, insbesondere folgendem Ablauf: - Ausbildung oder Aufbringung einer ein zweites Material enthaltenden Funktionsschicht (5) auf das zweite Festkörpersubstrat (2), - Kontaktieren des ersten Festkörpersubstrats (1 ) mit dem zweiten Festkörpersubstrat (2) an der Funktionsschicht (5), - Zusammenpressen der Festkörpersubstrate (1, 2) zur Ausbildung eines permanenten Bonds zwischen dem ersten und dem zweiten Festkörpersubstrat (1, 2), zumindest teilweise verstärkt durch Festkörperdiffusion und/oder Phasenumwandlung des ersten Materials mit dem zweiten Material, wobei eine Volumenvergrößerung an der Funktionsschicht (5) bewirkt wird. Während des Bondens wird die Löslichkeitsgrenze des ersten Materials für das zweite Material nicht oder nur geringfügig überschritten, so dass Ausscheidung von intermetallischen Phasen möglichst weitgehend vermieden wird und dagegen Mischkristall ausgebildet wird. Das erste Material kann Kupfer und das zweite Material kann Zinn sein.
摘要:
An apparatus comprising an insulating substrate (101) having first and second surfaces (101a, 101b) and a plurality of metal-filled vias (102) extending from the first to the second surface. The first and second surfaces have contact pads (103, 104), each one comprising a connector stack to at least one of the vias. The stack comprises a seed metal layer (110, copper) in contact with the via metal capable of providing an adhesive and conductive layer for electroplating on its surface, a first electroplated support layer (111 a, copper) secured to the seed metal layer, a second electroplated support layer (111 b, nickel), and at least one reflow metal bonding layer (112, palladium, gold) on the second support layer. The electrolytic plating process produces support layers substantially pure (at least 99.0 %), free of unwanted additives such as phosphorus or boron, and exhibiting closely controlled grain sizes. Reflow metal connectors (220, 230) provide attachment to chip contact pads and external parts.
摘要:
Two microelectronic components (110, 120), e.g. a die and an interposer, are bonded to each other. One of the components' contact pads (110C) include metal, and the other component has silicon (410) which reacts with the metal to form metal silicide (504). Then a hole (510) is made through one of the components to reach the metal silicide and possibly even the unreacted metal (110C) of the other component. The hole is filled with a conductor (130), possibly metal, to provide a conductive via that can be electrically coupled to contact pads (120C.B) attachable to other circuit elements or microelectronic components, e.g. to a printed circuit board.
摘要:
An apparatus comprising an insulating substrate (101) having first and second surfaces (101a, 101b) and a plurality of metal-filled vias (102) extending from the first to the second surface. The first and second surfaces have contact pads (103, 104), each one comprising a connector stack to at least one of the vias. The stack comprises a seed metal layer (110, copper) in contact with the via metal capable of providing an adhesive and conductive layer for electroplating on its surface, a first electroplated support layer (111 a, copper) secured to the seed metal layer, a second electroplated support layer (111 b, nickel), and at least one reflow metal bonding layer (112, palladium, gold) on the second support layer. The electrolytic plating process produces support layers substantially pure (at least 99.0 %), free of unwanted additives such as phosphorus or boron, and exhibiting closely controlled grain sizes. Reflow metal connectors (220, 230) provide attachment to chip contact pads and external parts.
摘要:
Il comprend les étapes de -a) Fournir un premier substrat (1) recouvert par une couche métallique (2) et un deuxième substrat (3) recouvert par une couche métallique (4), -b) Mettre en contact direct les couches métallique (2,4) de sorte à former une interface de collage (6) comprenant des ponts de matière (5) métalliques espacés par des cavités reliées fluidiquement entre elles, -d) Immerger l'interface de collage (6) dans un fluide oxydant (8) de sorte à former un oxyde métallique comblant au moins en partie les cavités et des zones de contact (9) métal/oxyde métallique/métal. L'invention concerne également une structure (100) comprenant un premier substrat (1), une première couche métallique (2), une deuxième couche métallique (4) formant une interface de collage (6)avec la première couche métallique (2), et un deuxième substrat (3), l'interface de collage (6) comprenant des ponts de matière (5) métalliques espacés par des cavités, un oxyde métallique comblant en partie les cavités et des zones de contact (9) métal/oxyde métallique/métal.
摘要:
Methods of bonding together semiconductor structures include annealing metal of a feature on a semiconductor structure prior to directly bonding the feature to a metal feature of another semiconductor structure to form a bonded metal structure, and annealing the bonded metal structure after the bonding process. The thermal budget of the first annealing process may be at least as high as a thermal budget of a later annealing process. Additional methods involve forming a void in a metal feature, and annealing the metal feature to expand the metal of the feature into the void. Bonded semiconductor structures and intermediate structures are formed using such methods.