公开(公告)号：US08569892B2

公开(公告)日：2013-10-29

申请号：US13062262

申请日：2009-10-05

Applicant: Kentaro Mori ,  Daisuke Ohshima ,  Shintaro Yamamichi ,  Hideya Murai ,  Katsumi Maeda ,  Katsumi Kikuchi ,  Yoshiki Nakashima

Inventor： Kentaro Mori ,  Daisuke Ohshima ,  Shintaro Yamamichi ,  Hideya Murai ,  Katsumi Maeda ,  Katsumi Kikuchi ,  Yoshiki Nakashima

IPC: H01L23/48 ,  H01L23/10

CPC classification number: H01L24/85 ,  H01L23/13 ,  H01L23/142 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/24 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L24/92 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/85 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A semiconductor device includes: at least one semiconductor element having electrode terminals; a metal plate supporting the semiconductor element; and a wiring board covering the semiconductor element and including a plurality of insulating layers and wiring layers alternately stacked and external connection terminals on a surface, the wiring layers being electrically connected to each other by vias. The electrode terminals and the external connection terminals are electrically connected via at least one of the wiring layers and the vias. At least one of the electrode terminals, the is wiring layers, and the vias is electrically connected to the metal plate.

Abstract translation: 半导体器件包括：至少一个具有电极端子的半导体元件; 支撑半导体元件的金属板; 以及覆盖半导体元件并且在表面上交替堆叠的多个绝缘层和布线层以及外部连接端子的布线板，布线层通过通孔彼此电连接。 电极端子和外部连接端子经由布线层和通孔中的至少一个电连接。 至少一个电极端子，即布线层和通孔，电连接到金属板。

公开(公告)号：US08525330B2

公开(公告)日：2013-09-03

申请号：US13382633

申请日：2010-08-30

Applicant: Masahide Okamoto ,  Osamu Ikeda ,  Yuki Murasato

Inventor： Masahide Okamoto ,  Osamu Ikeda ,  Yuki Murasato

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: C22C18/04 ,  B22F2998/00 ,  B23K1/0016 ,  B23K2101/42 ,  B32B15/017 ,  C22C21/00 ,  C22C21/06 ,  H01L23/04 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29147 ,  H01L2224/29211 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/49826 ,  Y10T428/12736 ,  B22F7/062 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/01013 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01014 ,  H01L2924/01083 ,  H01L2924/01031 ,  H01L2924/01082 ,  H01L2924/01049 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/05599

Abstract: Provided is a connecting part for a semiconductor device including a semiconductor element, a frame, and a connecting part which connects the semiconductor element and the frame to each other, in which an interface between the connecting part and the semiconductor element and an interface between the connecting part and the frame respectively have the area of Al oxide film which is more than 0% and less than 5% of entire area of the respective interfaces. The connecting part has an Al-based layer and first and second Zn-based layers on main surfaces of the Al-based layer, a thickness ratio of the Al-based layer relative to the Zn-based layers being less than 0.59.

Abstract translation: 提供了一种半导体器件的连接部件，其包括半导体元件，框架和将半导体元件和框架彼此连接的连接部分，其中连接部分和半导体元件之间的界面和 连接部和框架分别具有比各界面的整个面积大于0％且小于5％的Al氧化物膜的面积。 连接部分在Al基层的主表面上具有Al基层和第一和第二Zn基层，Al基层相对于Zn基层的厚度比小于0.59。

公开(公告)号：US08513816B2

公开(公告)日：2013-08-20

申请号：US13173226

申请日：2011-06-30

Applicant: Naohide Takamoto ,  Goji Shiga ,  Fumiteru Asai

Inventor： Naohide Takamoto ,  Goji Shiga ,  Fumiteru Asai

IPC: H01L23/48 ,  H01L21/50 ,  C09K5/00 ,  B32B7/12 ,  B32B3/00

CPC classification number: C08K3/22 ,  C08K2201/001 ,  C08K2201/005 ,  C09J163/00 ,  H01L21/563 ,  H01L21/6836 ,  H01L23/293 ,  H01L23/295 ,  H01L23/544 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/68377 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81815 ,  H01L2224/83022 ,  H01L2224/83102 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  Y10T428/24355 ,  Y10T428/2848 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/00

Abstract: The present invention relates to a film for flip chip type semiconductor back surface, which is to be disposed on the back surface of a semiconductor element to be flip chip-connected onto an adherend, the film containing a resin and a thermoconductive filler, in which the content of the thermoconductive filler is at least 50% by volume of the film, and the thermoconductive filler has an average particle size relative to the thickness of the film of at most 30% and has a maximum particle size relative to the thickness of the film of at most 80%.

Abstract translation: 本发明涉及一种用于倒装芯片型半导体背表面的薄膜，其将被设置在半导体元件的背面上以便倒装芯片连接到被粘物上，该薄膜含有树脂和导热填料，其中 导电填料的含量至少为膜的50体积％，并且导热填料相对于膜厚度的平均粒径为至多30％，并且具有相对于膜的厚度的最大粒径 电影最多80％。

公开(公告)号：US20130210194A1

公开(公告)日：2013-08-15

申请号：US13749647

申请日：2013-01-24

Applicant: LuxVue Technology Corporation

Inventor： Andreas Bibl ,  John A. Higginson ,  Hsin-Hua Hu ,  Hung-Fai Stephen Law

IPC: H01L23/00

CPC classification number: H01L24/83 ,  H01L21/67144 ,  H01L24/75 ,  H01L24/95 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29183 ,  H01L2224/75261 ,  H01L2224/75281 ,  H01L2224/75282 ,  H01L2224/75283 ,  H01L2224/75725 ,  H01L2224/7598 ,  H01L2224/83 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83805 ,  H01L2224/83825 ,  H01L2224/8383 ,  H01L2224/83948 ,  H01L2224/95001 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/12041 ,  H01L2924/1461 ,  H01L2933/0066 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01031 ,  H01L2924/01051 ,  H01L2924/01029 ,  H01L2924/01048 ,  H01L2924/01082 ,  H01L2924/0103

Abstract: Electrostatic transfer head array assemblies and methods of transferring and bonding an array of micro devices to a receiving substrate are described. In an embodiment, a method includes picking up an array of micro devices from a carrier substrate with an electrostatic transfer head assembly supporting an array of electrostatic transfer heads, contacting a receiving substrate with the array of micro devices, transferring energy from the electrostatic transfer head assembly to bond the array of micro devices to the receiving substrate, and releasing the array of micro devices onto the receiving substrate.

Abstract translation: 描述静电转印头阵列组件以及将微器件阵列转移和接合到接收衬底的方法。 在一个实施例中，一种方法包括从载体基板拾取微器件阵列，其中静电转印头组件支持静电转印头阵列，使接收基片与微器件阵列接触，将静电转印头 组件将微器件阵列接合到接收衬底，以及将微器件阵列释放到接收衬底上。

公开(公告)号：US08496159B2

公开(公告)日：2013-07-30

申请号：US13154412

申请日：2011-06-06

Applicant: Claudius Feger ,  Mark H. McLeod ,  Jae-Woong Nah ,  Eric D. Perfecto

Inventor： Claudius Feger ,  Mark H. McLeod ,  Jae-Woong Nah ,  Eric D. Perfecto

IPC: B23K3/00 ,  B23K3/06

CPC classification number: B23K1/0016 ,  B23K1/20 ,  B23K3/0623 ,  B23K2101/42 ,  H01L21/6835 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2221/68372 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/11002 ,  H01L2224/11312 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11902 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/1403 ,  H01L2224/14505 ,  H01L2224/16237 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/81805

Abstract: Solder bumps of uniform height are provided on a substrate through the use of injection molded solder. Copper pillars or ball limiting metallurgy are formed over I/O pads within the channels of a patterned layer of photoresist. Solder is injected over the pillars or BLM, filling the channels. The solder, which does not contain flux, is allowed to solidify. It forms a plurality of solder structures (bumps) of equal heights. Solder injection and solidification are preferably carried out in a nitrogen environment or a forming gas environment. Molten solder can be injected in channels formed in round wafers without spillage using a carrier assembly that accommodates such wafers and a fill head.

Abstract translation: 通过使用注射成型的焊料在基板上设置均匀高度的焊料凸块。 在图案化的光致抗蚀剂层的通道内的I / O焊盘上形成铜柱或极限极限冶金。 焊料注入柱子或BLM，填充通道。 允许不含焊剂的焊料固化。 它形成相同高度的多个焊料结构（凸块）。 焊接注入和固化优选在氮气环境或形成气体环境中进行。 可以使用容纳这种晶片和填充头的载体组件将熔融焊料注入到以圆形晶片形成的通道中而不会溢出。

公开(公告)号：US08478344B2

公开(公告)日：2013-07-02

申请号：US12326327

申请日：2008-12-02

Applicant: Ahmadreza (Reza) Rofougaran

Inventor： Ahmadreza (Reza) Rofougaran

IPC: H04M1/00

CPC classification number: H04B1/18 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2225/06527 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01061 ,  H01L2924/01083 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01Q1/2283 ,  H01Q1/38 ,  H01Q9/065 ,  H01Q23/00 ,  Y10T307/826 ,  Y10T307/858 ,  Y10T307/865 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A power recovery system includes a transmission line that is coupled to transfer an RF signal received via an antenna. The RF signal generates a partial standing wave in the transmission line and the transmission line has at least one standing wave anti-node. A power recovery circuit converts an anti-node signal from the at least one standing wave anti-node to a power signal.

Abstract translation: 功率恢复系统包括被传输经由天线接收的RF信号的传输线。 RF信号在传输线中产生部分驻波，并且传输线具有至少一个驻波反节点。 功率恢复电路将来自至少一个驻波反节点的反节点信号转换为功率信号。

公开(公告)号：US20130157415A1

公开(公告)日：2013-06-20

申请号：US13715996

申请日：2012-12-14

Applicant: NITTO DENKO CORPORATION

Inventor： Kosuke Morita ,  Naohide Takamoto ,  Hiroyuki Senzai

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L21/563 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/27003 ,  H01L2224/2783 ,  H01L2224/27848 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29316 ,  H01L2224/29318 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29371 ,  H01L2224/29387 ,  H01L2224/29388 ,  H01L2224/29393 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73104 ,  H01L2224/81203 ,  H01L2224/83191 ,  H01L2224/83862 ,  H01L2224/94 ,  H01L2924/15787 ,  H01L2924/3641 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/00

Abstract: There is provided a method for producing a semiconductor device, capable of suppressing generation of voids at an interface between a semiconductor element and an under-fill sheet to produce a semiconductor device with high reliability. The method includes providing a sealing sheet having a support and an under-fill material laminated on the support; thermally pressure-bonding a circuit surface of a semiconductor wafer, on which a connection member is formed, and the under-fill material of the sealing sheet under conditions of a reduced-pressure atmosphere of 10000 Pa or less, a bonding pressure of 0.2 MPa or more and a heat pressure-bonding temperature of 40° C. or higher; dicing the semiconductor wafer to form a semiconductor element with the under-fill material; and electrically connecting the semiconductor element and the adherend through the connection member while filling a space between the adherend and the semiconductor element using the under-fill material.

Abstract translation: 提供一种半导体器件的制造方法，其能够抑制半导体元件和欠补充片之间的界面处的空隙的产生，从而制造出高可靠性的半导体器件。 该方法包括提供具有支撑体的密封片和层压在支撑体上的填充不足的材料; 在形成有连接构件的半导体晶片的电路表面和密封片的未填充材料的热压粘合条件下，在10000Pa以下的减压气氛下，接合压力为0.2MPa 以上且40℃以上的热压接温度; 切割半导体晶片以形成具有欠填充材料的半导体元件; 并且通过所述连接构件将所述半导体元件和所述被粘物电连接，同时使用所述填充材料填充所述被粘体和所述半导体元件之间的空间。

公开(公告)号：US08466546B2

公开(公告)日：2013-06-18

申请号：US11409298

申请日：2006-04-21

Applicant: Andy Farlow ,  Mark Pavier ,  Andrew N. Sawle ,  George Pearson ,  Martin Standing

Inventor： Andy Farlow ,  Mark Pavier ,  Andrew N. Sawle ,  George Pearson ,  Martin Standing

IPC: H01L23/48

CPC classification number: H01L24/33 ,  H01L23/041 ,  H01L23/492 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/29 ,  H01L2224/29007 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/32245 ,  H01L2224/73153 ,  H01L2224/83801 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/078 ,  H01L2924/0781 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/16152 ,  H01L2924/166 ,  H01L2924/30105 ,  H01L2924/01083 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: A semiconductor package including a conductive clip preferably in the shape of a can, a semiconductor die, and a conductive stack interposed between the die and the interior of the can which includes a conductive platform and a conductive adhesive body.

Abstract translation: 一种半导体封装，其包括优选为罐形状的导电夹子，半导体管芯和插入在所述管芯和所述罐体内部的导电堆叠，其包括导电平台和导电粘合体。

公开(公告)号：US08466540B2

公开(公告)日：2013-06-18

申请号：US12693984

申请日：2010-01-26

Applicant: Shigeki Tanaka ,  Masakazu Sakano ,  Toshiyuki Shinya ,  Takafumi Konno ,  Kazuaki Yoshida ,  Takashi Sato ,  Atsushi Fujisawa

Inventor： Shigeki Tanaka ,  Masakazu Sakano ,  Toshiyuki Shinya ,  Takafumi Konno ,  Kazuaki Yoshida ,  Takashi Sato ,  Atsushi Fujisawa

IPC: H01L23/495

CPC classification number: H01L23/49575 ,  B81B7/007 ,  B81B2207/098 ,  B81C1/0023 ,  G01C19/56 ,  G01L19/141 ,  G01P1/023 ,  H01L21/565 ,  H01L23/3107 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85186 ,  H01L2224/85207 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: The reliability of a semiconductor device is prevented from being reduced. A planar shape of a sealing body is comprised of a quadrangle having a pair of first sides, and a pair of second sides crossing with the first sides. Further, it has a die pad, a controller chip (first semiconductor chip) and a sensor chip (second semiconductor chip) mounted over the die pad, and a plurality of leads arranged along the first sides of the sealing body. The controller chip and the leads are electrically coupled to each other via wires (first wires), and the sensor chip and the controller chip are electrically coupled to each other via wires (second wires). Herein, the die pad is supported by a plurality of suspending leads formed integrally with the die pad and extending from the die pad toward the first sides of the sealing body. Each of the suspending leads has an offset part.

Abstract translation: 防止半导体器件的可靠性降低。 密封体的平面形状由具有一对第一侧面的四边形和与第一面交叉的一对第二侧面构成。 此外，其具有安装在管芯焊盘上的管芯焊盘，控制器芯片（第一半导体芯片）和传感器芯片（第二半导体芯片）以及沿着密封体的第一侧布置的多个引线。 控制器芯片和引线通过导线（第一布线）彼此电耦合，并且传感器芯片和控制器芯片通过导线（第二布线）彼此电耦合。 这里，管芯焊盘由与焊盘一体形成的多个悬置引线支撑，并从焊盘朝向密封体的第一侧延伸。 每个悬挂引线都有一个偏移部分。

公开(公告)号：US20130142568A1

公开(公告)日：2013-06-06

申请号：US13690343

申请日：2012-11-30

Applicant: Heraeus Materials Technology GmbH & Co. KG

Inventor： Murali SARANGAPANI ,  Ping Ha YEUNG ,  Eugen MILKE

IPC: B23K35/30

CPC classification number: B23K35/302 ,  C22C9/00 ,  C22F1/08 ,  H01L24/43 ,  H01L24/45 ,  H01L2224/05624 ,  H01L2224/43848 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/48511 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/181 ,  Y10T403/479 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01204 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01078 ,  H01L2924/01024 ,  H01L2924/01016 ,  H01L2924/01203 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01026 ,  H01L2924/0104 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01205

Abstract: A 3N copper wire with trace additions for bonding in microelectronics contains 3N copper and one or more corrosion resistance addition materials selected from Ag, Ni, Pd, Au, Pt, and Cr. A total concentration of the corrosion resistance addition materials is between about 90 wt. ppm and about 980 wt. ppm.

Abstract translation: 微电子结合微量添加的3N铜线包含3N铜和一种或多种选自Ag，Ni，Pd，Au，Pt和Cr的耐腐蚀性添加材料。 耐腐蚀添加材料的总浓度为约90wt。 ppm和约980wt。 ppm。