公开(公告)号：US07480150B2

公开(公告)日：2009-01-20

申请号：US11615495

申请日：2006-12-22

申请人： Takashi Kariya ,  Akira Mochida

发明人： Takashi Kariya ,  Akira Mochida

IPC分类号： H05K1/18

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

摘要： In a printed wiring board 10, an upper electrode connecting portion 52 penetrates through a capacitor portion 40 in top to bottom direction so that an upper electrode connecting portion first part 52a is not in contact with the capacitor portion 40, passes through an upper electrode connecting portion third part 52c provided at the upper portion of the capacitor portion 40, and then connects from the upper electrode connecting portion second part 52b to an upper electrode 42. Furthermore, a lower electrode connecting portion 51 penetrates through the capacitor portion 40 in top to bottom direction so that it is not in contact with the upper electrode 42 of the capacitor portion 40, but is in contact with a lower electrode 41. Therefore, the upper electrode connecting portion 52 and the lower electrode connecting portion 51 can be formed even after in process of build-up, the whole surface is covered by a high dielectric capacitor sheet that has a structure that a high dielectric layer is sandwiched between two metal foils and will afterwards serve as the capacitor portion 40.

摘要翻译： 在印刷电路板10中，上电极连接部52从上下方向贯通电容器部40，使上电极连接部第一部52a与电容部40不接触，通过上电极连接 部分第三部分52c设置在电容器部分40的上部，然后从上电极连接部分52b连接到上电极42.此外，下电极连接部分51穿过电容器部分40顶部到 使其不与电容器部40的上部电极42接触而与下部电极41接触。因此，上部电极连接部52和下部电极连接部51即使在 在积聚过程中，整个表面被具有高介电层结构的高介电电容器片覆盖 夹在两个金属箔之间，然后用作电容器部分40。

公开(公告)号：US07435910B2

公开(公告)日：2008-10-14

申请号：US10793515

申请日：2004-03-04

申请人： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

发明人： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC分类号： H05K1/16

CPC分类号： H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

摘要： A multilayer printed circuit board has an IC chip 20 included in a core substrate 30 in advance and a transition layer 38 provided on a pad 24 of the IC chip 20. Due to this, it is possible to electrically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on the die pad 24, it is possible to prevent resin residues on the pad 24 and to improve connection characteristics between the pad 24 and a via hole 60 and reliability.

摘要翻译： 多层印刷电路板预先包括在芯基板30中的IC芯片20和设置在IC芯片20的焊盘24上的过渡层38。 由此，可以不使用引线部件和密封树脂将IC芯片电连接到多层印刷电路板。 此外，通过在芯片焊盘24上设置由铜制成的过渡层38，可以防止焊盘24上的树脂残留，并且改善焊盘24和通孔60之间的连接特性以及可靠性。

公开(公告)号：US20080201944A1

公开(公告)日：2008-08-28

申请号：US12103414

申请日：2008-04-15

申请人： Hajime SAKAMOTO ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

发明人： Hajime SAKAMOTO ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC分类号： H05K3/30 ,  H05K3/02

CPC分类号： H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

摘要： A multilayer printed circuit board has an IC chip 20 included in a core substrate 30 in advance and a transition layer 38 provided on a pad 24 of the IC chip 20. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on the die pad 24, it is possible to prevent resin residues on the pad 24 and to improve connection characteristics between the pad 24 and a via hole 60 and reliability.

摘要翻译： 多层印刷电路板预先包括在芯基板30中的IC芯片20和设置在IC芯片20的焊盘24上的过渡层38。 由此，可以在不使用引线部件和密封树脂的情况下将IC芯片电连接到多层印刷电路板。 此外，通过在芯片焊盘24上设置由铜制成的过渡层38，可以防止焊盘24上的树脂残留，并且改善焊盘24和通孔60之间的连接特性以及可靠性。

公开(公告)号：US20080151520A1

公开(公告)日：2008-06-26

申请号：US12034581

申请日：2008-02-20

申请人： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

发明人： Hajime Sakamoto ,  Tadashi Sugiyama ,  Dongdong Wang ,  Takashi Kariya

IPC分类号： H05K1/18

CPC分类号： H01L24/29 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/83 ,  H01L25/03 ,  H01L25/18 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/18162 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09918 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00

摘要： A multilayer printed circuit board has an IC chip 20 included in a core substrate 30 in advance and a mediate layer 38 provided on a pad 24 of the IC chip 20. Due to this, it is possible to electronically connect the IC chip to the multilayer printed circuit board without using lead members and a sealing resin. Also, by providing the mediate layer 38 made of copper on the die pad 24, it is possible to prevent resin residues on the pad 24 and to improve connection characteristics between the pad 24 and a via hole 60 and reliability.

摘要翻译： 多层印刷电路板预先包括在芯基板30中的IC芯片20和设置在IC芯片20的焊盘24上的中间层38.由此，可以将IC芯片电连接到多层印刷电路板 印刷电路板，不使用引线部件和密封树脂。 此外，通过在芯片焊盘24上设置由铜制成的中介层38，可以防止焊盘24上的树脂残留，并且改善焊盘24和通孔60之间的连接特性，并且可靠性。

公开(公告)号：US07375289B2

公开(公告)日：2008-05-20

申请号：US11331268

申请日：2006-01-13

申请人： Yasuji Hiramatsu ,  Motoo Asai ,  Naohiro Hirose ,  Takashi Kariya

发明人： Yasuji Hiramatsu ,  Motoo Asai ,  Naohiro Hirose ,  Takashi Kariya

IPC分类号： H05K1/11 ,  H01R12/04

CPC分类号： H05K3/4679 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0035 ,  H05K3/0082 ,  H05K3/421 ,  H05K3/4652 ,  H05K3/4655 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2203/0554 ,  Y10S430/146 ,  Y10T29/49004 ,  Y10T29/49082 ,  Y10T29/49085 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： A multi-layer printed wiring board includes a board covered with a conductor layer, an interlayer insulating resin layer, an etched metal film on the interlayer insulating resin layer, and a via hole. The interlayer insulating resin layer has a fibrous substrate. The via hole has an electrolytic plated film and an electrolessly plated film and connects the conductor layer of the board and the etched metal film.

摘要翻译： 多层印刷电路板包括覆盖有导体层的基板，层间绝缘树脂层，层间绝缘树脂层上的蚀刻金属膜和通孔。 层间绝缘树脂层具有纤维基材。 通孔具有电解电镀膜和无电镀膜，并且连接板的导体层和蚀刻的金属膜。

公开(公告)号：US20070190819A1

公开(公告)日：2007-08-16

申请号：US11566862

申请日：2006-12-05

申请人： Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

发明人： Takashi Kariya ,  Toshiki Furutani ,  Takeshi Kawanishi

IPC分类号： H05K1/00

CPC分类号： H05K3/4015 ,  H01L21/4853 ,  H01L23/49811 ,  H01L24/45 ,  H01L24/72 ,  H01L24/78 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/451 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/78301 ,  H01L2224/786 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/838 ,  H01L2224/851 ,  H01L2224/85205 ,  H01L2224/90 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3011 ,  H05K3/326 ,  H05K3/341 ,  H05K2201/10265 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49135 ,  Y10T29/49142 ,  Y10T29/49149 ,  Y10T29/49153 ,  H01L2224/13099 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2224/48 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A printed circuit board according to the present invention is a printed circuit board (4) including a component mounting pin (1) made of a metal wire to connect with a semiconductor chip (10). The semiconductor chip (10) is a surface mounting type semiconductor chip having an electrode pad on its mounting surface for use in a flip-chip mounting system. The component mounting pin (1) is formed by using wire-bonding technology. This printed circuit board (4) is able to decrease malconnections or disconnection caused by a difference between the coefficients of thermal expansion of the semiconductor chip (10) and the printed circuit board (4).

摘要翻译： 根据本发明的印刷电路板是印刷电路板（4），包括由金属线制成的元件安装销（1），以与半导体芯片（10）连接。 半导体芯片（10）是表面安装型半导体芯片，其在其安装表面上具有用于倒装芯片安装系统的电极焊盘。 元件安装销（1）通过引线接合技术形成。 该印刷电路板（4）能够减少由半导体芯片（10）和印刷电路板（4）的热膨胀系数之间的差异引起的误连接或断开。

公开(公告)号：US20060180341A1

公开(公告)日：2006-08-17

申请号：US11397802

申请日：2006-04-05

申请人： Takashi Kariya ,  Toshiki Furutani

发明人： Takashi Kariya ,  Toshiki Furutani

IPC分类号： H05K1/03

CPC分类号： H01L24/16 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/0271 ,  H05K1/0373 ,  H05K1/111 ,  H05K1/115 ,  H05K3/243 ,  H05K3/28 ,  H05K3/4007 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/068 ,  H05K2201/09881 ,  H05K2201/10674 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49204 ,  H01L2924/00 ,  H01L2224/0401

摘要： A multilayer printed wiring board 10 includes: a core substrate 20; a build-up layer 30 formed on the core substrate 20 and having a conductor pattern 32 on an upper surface; a low elastic modulus layer 40 formed on the build-up layer 30; lands 52 that are disposed on an upper surface of the low elastic modulus layer 40 and connected via solder bumps 66 to a semiconductor chip 70; and conductor posts 50 that are passing through the low elastic modulus layer 40 and electrically connecting lands 52 with conductor patterns 32. The conductor posts 50 are formed to have the diameters of an upper portion and a lower portion of 80 μm, the diameter of an intermediate portion of 35 μm, the height of 200 μm, and the aspect ratio Rasp (height/minimum diameter) of 5.7 and the maximum diameter/minimum diameter of 2.3.

摘要翻译： 多层印刷线路板10包括：芯基板20; 形成在芯基板20上并且在上表面上具有导体图案32的堆积层30; 形成在积层30上的低弹性模量层40; 焊盘52设置在低弹性模量层40的上表面上并通过焊锡凸块66连接到半导体芯片70; 以及导体柱50，其穿过低弹性模量层40和电连接焊盘52与导体图案32。 导体柱50形成为具有80μm的上部和下部的直径，35μm的中间部分的直径，200μm的高度以及纵横比Rasp（高度/最小直径） 5.7，最大直径/最小直径为2.3。

公开(公告)号：US07049528B2

公开(公告)日：2006-05-23

申请号：US10344892

申请日：2002-02-06

申请人： Takashi Kariya ,  Masaya Nishikawa

发明人： Takashi Kariya ,  Masaya Nishikawa

IPC分类号： H01R12/01 ,  H01R1/11 ,  H05K1/00

CPC分类号： H01L24/32 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83101 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/30107 ,  H01L2924/3511 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor chip mounting wiring board 2 includes an insulating resin substrate 5, a first conductive bump 12 formed on one side of the insulative resin substrate 5 to mount a semiconductor chip 3, a wiring pattern 15 extending from the first conductive bump 12 toward the periphery of the insulating resin substrate 5, a filled viahole 9 leading from the other side of the insulating resin substrate 5 to the wiring pattern 15, and a second conductive bump 13, or a conductive pad 19, positioned just above the filled viahole 9 and electrically connected to the viahole 9. A semiconductor module is produced by mounting the semiconductor chip 3 in advance on the first conductive bump 12 on the semiconductor chip mounting wiring board 2 and stacking a plurality of the wiring boards 2 and interlayer members 20 each having an opening 27 to receive the semiconductor chip 3 and a conductive post 26 or conductive pad connected to the second conductive bump 13 of the wiring board 2 alternately on each other with an adhesive applied between them, placing another interconnecting circuit board such as an I/O wiring board 30 or the like on an outermost layer, and by applying hot-pressing to the stack. The semiconductor module thus produced has a high connection reliability and can be designed for a high mounting density and a lower profile.

公开(公告)号：US08908387B2

公开(公告)日：2014-12-09

申请号：US13562683

申请日：2012-07-31

申请人： Yukinobu Mikado ,  Shunsuke Sakai ,  Takashi Kariya ,  Toshiki Furutani

发明人： Yukinobu Mikado ,  Shunsuke Sakai ,  Takashi Kariya ,  Toshiki Furutani

IPC分类号： H05K7/12 ,  H05K1/18 ,  H05K3/30 ,  H05K3/46 ,  H05K1/02

CPC分类号： H05K1/185 ,  H01G2/06 ,  H05K1/0207 ,  H05K1/115 ,  H05K3/30 ,  H05K3/32 ,  H05K3/4602 ,  H05K2201/09827 ,  H05K2201/10015 ,  H05K2201/10522 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49146

摘要： A wiring board includes a substrate having an opening portion, electronic components positioned in the opening portion of the substrate and including first and second electronic components, and an insulation layer formed over the substrate and the first and second components. The first component has first and second electrodes having side portions on side surfaces of the first component, the second component has first and second electrodes having side portions on side surfaces of the second component, the first electrode of the first component and the first electrode of the second component are set to have substantially the same electric potential, and the first component and the second component are positioned in the opening portion of the substrate such that the side portion of the first electrode of the first component is beside the side portion of the first electrode of the second component.

摘要翻译： 布线板包括具有开口部分的基板，位于基板的开口部分中的电子部件，并且包括第一和第二电子部件，以及形成在基板和第一和第二部件上的绝缘层。 第一部件具有在第一部件的侧面具有侧部的第一电极和第二电极，第二部件具有第一部件和第二电极，第一部件的第一电极和第二电极具有在第二部件的侧面上的侧面部分，第一部件的第一电极和第一部件的第一电极 第二部件被设定为具有大致相同的电位，并且第一部件和第二部件位于基板的开口部分中，使得第一部件的第一电极的侧部位于第二部件的侧部 第二部件的第一电极。

公开(公告)号：US08563420B2

公开(公告)日：2013-10-22

申请号：US13561247

申请日：2012-07-30

申请人： Takashi Kariya ,  Akira Mochida

发明人： Takashi Kariya ,  Akira Mochida

IPC分类号： H01L21/4763

CPC分类号： H05K1/162 ,  H05K1/0231 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/4602 ,  H05K2201/0133 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/10522 ,  H05K2201/10734

摘要： A method for manufacturing a printed wiring board includes forming an uncalcined layer containing a raw ceramic material on a first metal layer, firing the uncalcined layer formed on the first metal layer such that a high dielectric constant layer having a ceramic body calcined in a sheet form is formed on the first metal layer, forming a second metal layer on the high dielectric constant layer on the opposite side of the high dielectric constant layer with respect to the first metal layer such that a layered capacitor having the high dielectric constant layer and first and second layer electrodes sandwiching the high dielectric constant layer is formed, and disposing the layered capacitor in a main body.

摘要翻译： 一种制造印刷电路板的方法包括在第一金属层上形成含有原料陶瓷材料的未煅烧层，焙烧形成在第一金属层上的未煅烧层，使得具有以片状形式煅烧的陶瓷体的高介电常数层 形成在第一金属层上，相对于第一金属层在高介电常数层的相对侧的高介电常数层上形成第二金属层，使得具有高介电常数层的层状电容器和第一金属层 形成夹着高介电常数层的第二层电极，并将层叠电容器配置在主体中。