公开(公告)号：US09508629B2

公开(公告)日：2016-11-29

申请号：US15050070

申请日：2016-02-22

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Wael Zohni ,  Richard Dewitt Crisp ,  Ilyas Mohammed

IPC: H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01L25/18 ,  G11C5/04 ,  H01L23/12 ,  H01L27/108 ,  H01L23/31 ,  H01L23/00 ,  H01L23/13 ,  H01L23/36 ,  H01L23/498

CPC classification number: H01L23/481 ,  G11C5/04 ,  H01L23/12 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49838 ,  H01L23/538 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/09 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/108 ,  H01L2224/0401 ,  H01L2224/061 ,  H01L2224/091 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1203 ,  H01L2924/1205 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15786 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/301 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate having first and second opposed surfaces, at least two pairs of microelectronic elements, and a plurality of terminals exposed at the second surface. Each pair of microelectronic elements can include an upper microelectronic element and a lower microelectronic element. The pairs of microelectronic elements can be fully spaced apart from one another in a horizontal direction parallel to the first surface of the substrate. Each lower microelectronic element can have a front surface facing the first surface of the substrate and a plurality of contacts at the front surface. A surface of each of the upper microelectronic elements can at least partially overlie a rear surface of the lower microelectronic element in its pair. The microelectronic package can also include electrical connections extending from at least some of the contacts of each lower microelectronic element to at least some of the terminals.

公开(公告)号：US09502390B2

公开(公告)日：2016-11-22

申请号：US13795756

申请日：2013-03-12

Applicant: Invensas Corporation

Inventor： Terrence Caskey ,  Ilyas Mohammed ,  Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Michael Newman ,  Pezhman Monadgemi ,  Reynaldo Co ,  Ellis Chau ,  Belgacem Haba

IPC: H05K1/02 ,  H01L25/10 ,  H05K3/46 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/105 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73257 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/381 ,  H05K1/0298 ,  H05K3/46 ,  Y10T29/49126 ,  Y10T29/49162 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.

Abstract translation: 制造插入件的方法包括形成结合到第一元件的一个或多个第一表面的多个引线键合。 形成电介质封装，其接触将引线接合部彼此分隔开的引线接合的边缘表面。 进一步的处理包括去除第一元件的至少一部分，其中插入件具有通过至少封装相互隔开的第一和第二相对侧，并且插入件分别在第一和第二相对侧具有第一接触和第二接触， 分别与第一和第二部件电连接，第一触点通过引线键与第二触点电连接。

公开(公告)号：US09461196B2

公开(公告)日：2016-10-04

申请号：US14605550

申请日：2015-01-26

Applicant: Invensas Corporation

Inventor： Ilyas Mohammed ,  Liang Wang

IPC: H01L33/10 ,  H01L33/00 ,  H01L33/18 ,  H01L33/16 ,  H05B33/14 ,  H05B33/22 ,  H01L33/14 ,  H01L33/36 ,  H01L33/48

CPC classification number: H01L33/0012 ,  H01L33/0095 ,  H01L33/14 ,  H01L33/16 ,  H01L33/18 ,  H01L33/36 ,  H01L33/486 ,  H01L2933/0016 ,  H01L2933/0033 ,  H05B33/14 ,  H05B33/22

Abstract: Non-crystalline inorganic light emitting diode. In accordance with a first embodiment of the present invention, an article of manufacture includes a light emitting diode. The light emitting diode includes a non-crystalline inorganic light emission layer and first and second semiconducting non-crystalline inorganic charge transport layers surrounding the light emission layer. The light emission layer may be amorphous. The charge transport layers may be configured to inject one type of charge carrier and block the other type of charge carrier.

公开(公告)号：US09355996B2

公开(公告)日：2016-05-31

申请号：US14837561

申请日：2015-08-27

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Richard Dewitt Crisp ,  Wael Zohni ,  Ilyas Mohammed

IPC: H01L21/00 ,  H01L25/065 ,  H01L23/13 ,  H01L23/538 ,  H01L23/31 ,  H01L23/498 ,  H01L23/525 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L23/5386 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/525 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip package has multiple chips that may be arranged side-by-side or in a staggered, stair step arrangement. The contacts of the chips are connected to interconnect pads carried on the chips themselves or on a redistribution substrate. The interconnect pads desirably are arranged in a relatively narrow interconnect zone, such that the interconnect pads can be readily wire-bonded or otherwise connected to a package substrate.

公开(公告)号：US09330954B2

公开(公告)日：2016-05-03

申请号：US14087114

申请日：2013-11-22

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed

IPC: H01L21/48 ,  H01L21/683 ,  H01L23/522

CPC classification number: H01L23/5384 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/5226 ,  H01L23/5383 ,  H01L23/5386 ,  H01L25/0652 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/11 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

Abstract: Wafer to carrier adhesion without mechanical adhesion for formation of an IC. In such formation, an apparatus has a bottom surface of a substrate abutting a top surface of a support platform without adhesive therebetween. A material is disposed around the substrate and on the top surface of the support platform. The material is in contact with a side surface of the substrate to completely seal an interface as between the bottom surface of the substrate and the top surface of the support platform to retain abutment of the top surface and the bottom surface.

Abstract translation: 晶片与载体粘合无机械粘合形成IC。 在这种形成中，装置具有基板的底表面邻接支撑平台的顶表面而没有粘合剂。 材料围绕衬底设置在支撑平台的顶表面上。 该材料与衬底的侧表面接触以完全密封基底的底表面和支撑平台的顶表面之间的界面，以保持顶表面和底表面的邻接。

公开(公告)号：US20160079215A1

公开(公告)日：2016-03-17

申请号：US14953565

申请日：2015-11-30

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Liang Wang

IPC: H01L25/10 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L25/50 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81805 ,  H01L2224/92125 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2225/06582 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15333 ,  H01L2924/014 ,  H01L2924/00

Abstract: A microelectronic assembly can be made by joining first and second subassemblies by electrically conductive masses to connect electrically conductive elements on support elements of each subassembly. A patterned layer of photo-imageable material may overlie a surface of one of the support elements and have openings with cross-sectional dimensions which are constant or monotonically increasing with height from the surface of that support element, where the masses extend through the openings and have dimensions defined thereby. An encapsulation can be formed by flowing an encapsulant into a space between the joined first and second subassemblies.

公开(公告)号：US09263413B2

公开(公告)日：2016-02-16

申请号：US14486867

申请日：2014-09-15

Applicant: Invensas Corporation

Inventor： Ilyas Mohammed

IPC: H01L23/00 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H05K3/40 ,  H01L21/56

CPC classification number: H01L23/5226 ,  H01L21/563 ,  H01L21/568 ,  H01L21/76877 ,  H01L21/76892 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/45 ,  H01L24/49 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45101 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45565 ,  H01L2224/45624 ,  H01L2224/45655 ,  H01L2224/45664 ,  H01L2224/45669 ,  H01L2224/4569 ,  H01L2224/48 ,  H01L2224/49 ,  H01L2224/73267 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/182 ,  H01L2924/191 ,  H01L2924/19107 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/1461 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01049

Abstract: A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are uncovered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Abstract translation: 制造微电子单元的方法包括在包括可图案化的金属元件的结构的导电接合表面的形式的第一表面上形成多个引线接合。 线接合形成有与第一表面和远离第一表面的端表面接合的基底。 线接合具有在基部和端面之间延伸的边缘表面。 该方法还包括在导电层的第一表面的一部分上方并且在引线接合部分之上形成电介质封装层，使得引线接合的未封装部分由未被所述边缘表面覆盖的端面或边缘表面的部分限定 封装层。 金属元件被图案化以在引线键合下形成第一导电元件，并且通过封装层的一部分彼此绝缘。

公开(公告)号：US20150295151A1

公开(公告)日：2015-10-15

申请号：US14466993

申请日：2014-08-23

Applicant: Invensas Corporation

Inventor： Ilyas Mohammed ,  Liang Wang

IPC: H01L33/62 ,  H01L33/50 ,  H01L33/64 ,  H01L33/06 ,  H01L33/42 ,  H01L33/58

CPC classification number: H01L33/62 ,  H01L33/06 ,  H01L33/382 ,  H01L33/42 ,  H01L33/502 ,  H01L33/58 ,  H01L33/60 ,  H01L33/644 ,  H01L33/647 ,  H01L2924/0002 ,  H01L2933/0066 ,  H01L2924/00

Abstract: High performance light emitting diode with vias. In accordance with a first embodiment of the present invention, an article of manufacture includes a light emitting diode. The light emitting diode includes a plurality of filled vias configured to connect a doped region on one side of the light emitting diode to a plurality of contacts on the other side of the light emitting diode. The filled vias may comprise less that 10% of a surface area of the light emitting diode.

Abstract translation: 具有通孔的高性能发光二极管。 根据本发明的第一实施例，制品包括发光二极管。 发光二极管包括多个填充的通孔，其被配置为将发光二极管的一侧上的掺杂区域连接到发光二极管的另一侧上的多个触点。 填充的通孔可以包含少于发光二极管表面积的10％。

公开(公告)号：US20150228633A1

公开(公告)日：2015-08-13

申请号：US14570570

申请日：2014-12-15

Applicant: Invensas Corporation

Inventor： Ilyas Mohammed ,  Masud Beroz ,  Liang Wang

IPC: H01L25/16 ,  H01L33/64 ,  H01L33/62

CPC classification number: H01L25/162 ,  F21K9/23 ,  F21Y2115/10 ,  H01L21/6835 ,  H01L21/78 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/97 ,  H01L25/167 ,  H01L33/0079 ,  H01L33/62 ,  H01L33/644 ,  H01L2221/6835 ,  H01L2224/05567 ,  H01L2224/05686 ,  H01L2224/06102 ,  H01L2224/24105 ,  H01L2224/24226 ,  H01L2224/29186 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83896 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1461 ,  Y02B20/42 ,  H01L2924/01031 ,  H01L2924/0503 ,  H01L2924/053 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552

Abstract: Front facing piggyback wafer assembly. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. The plurality of integrated circuit devices are singulated to form individual integrated circuit devices. The carrier wafer may be processed to form integrated circuit structures prior to the attaching.

Abstract translation: 前面的背负式晶圆组件。 根据本发明的一个实施例，多个搭载基板被附着在载体晶片上。 多个背负衬底的组成与载体晶片不同。 在附着于载体晶片的同时处理多个搭载基板以产生多个集成电路装置。 多个集成电路器件被单个化以形成单独的集成电路器件。 载体晶片可以在连接之前被处理以形成集成电路结构。

公开(公告)号：US09095074B2

公开(公告)日：2015-07-28

申请号：US14517268

申请日：2014-10-17

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Terrence Caskey ,  Reynaldo Co ,  Ellis Chau

IPC: H01L23/48 ,  H01L21/00 ,  H05K1/18 ,  H01L23/528 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/03 ,  H01L21/56 ,  H01L23/00

CPC classification number: H05K1/11 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/528 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1191 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13101 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14135 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/32225 ,  H01L2224/45012 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45101 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45624 ,  H01L2224/45655 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H05K1/0298 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/10515 ,  H05K2201/10977 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/014

Abstract: A structure may include bond elements having bases joined to conductive elements at a first portion of a first surface and end surfaces remote from the substrate. A dielectric encapsulation element may overlie and extend from the first portion and fill spaces between the bond elements to separate the bond elements from one another. The encapsulation element has a third surface facing away from the first surface. Unencapsulated portions of the bond elements are defined by at least portions of the end surfaces uncovered by the encapsulation element at the third surface. The encapsulation element at least partially defines a second portion of the first surface that is other than the first portion and has an area sized to accommodate an entire area of a microelectronic element. Some conductive elements are at the second portion and configured for connection with such microelectronic element.

Abstract translation: 结构可以包括在第一表面的第一部分和远离基底的端表面处具有连接到导电元件的基底的结合元件。 电介质封装元件可以从第一部分覆盖并延伸并填充接合元件之间的空间，以将接合元件彼此分开。 封装元件具有背离第一表面的第三表面。 粘合元件的未封装部分由在第三表面处被封装元件未覆盖的至少部分端面限定。 封装元件至少部分地限定除了第一部分之外的第一表面的第二部分，并且具有尺寸适于容纳微电子元件的整个区域的区域。 一些导电元件位于第二部分并被配置为与这种微电子元件连接。