公开(公告)号：US20150017802A1

公开(公告)日：2015-01-15

申请号：US14329975

申请日：2014-07-13

申请人： Bandgap Engineering, Inc.

发明人： Joanne Yim ,  Jeff Miller ,  Michael Jura ,  Marcie R. Black ,  Joanne Forziati ,  Brian Murphy ,  Adam Standley

IPC分类号： H01L21/324 ,  H01L21/48

CPC分类号： C23F1/30 ,  C30B29/06 ,  C30B29/60 ,  H01L21/02603 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/4885 ,  H01L29/0669 ,  H01L29/0676 ,  H01L29/413 ,  H01L35/10 ,  H01L2924/0002 ,  H01M4/0426 ,  H01M4/134 ,  H01M4/386 ,  H01M10/0525 ,  H01M2004/027

摘要： In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.

摘要翻译： 在本公开的一方面，提供了一种方法，包括以下步骤：（a）提供含硅衬底，（b）在衬底上沉积第一金属，（c）使用步骤（b）制备的衬底 第一蚀刻，和（d）使用第二蚀刻蚀刻由步骤（c）制备的衬底，其中所述第二蚀刻比所述第一蚀刻对所沉积的金属更具侵蚀性，其中步骤（d）的结果包括硅纳米线。 该方法还可以包括例如步骤（b1）使第一金属经受使其凝聚的处理和（b2）沉积第二金属。

公开(公告)号：US20140227462A1

公开(公告)日：2014-08-14

申请号：US14241600

申请日：2012-09-03

申请人： Hiroyuki Okuno ,  Toshihiro Kugimiya

发明人： Hiroyuki Okuno ,  Toshihiro Kugimiya

IPC分类号： H01L23/532 ,  H01L21/48 ,  G02F1/1343

CPC分类号： G02F1/13439 ,  B32B15/016 ,  B32B15/017 ,  C22C14/00 ,  C22C21/00 ,  C22C27/02 ,  C22C27/04 ,  C23C14/0036 ,  C23C14/025 ,  C23C14/0641 ,  G02F1/136286 ,  G02F2001/136295 ,  H01J11/46 ,  H01J31/127 ,  H01L21/4885 ,  H01L23/53219 ,  H01L23/53223 ,  H01L27/124 ,  H01L2924/0002 ,  Y10T428/10 ,  Y10T428/1095 ,  Y10T428/265 ,  Y10T428/31678 ,  H01L2924/00

摘要： Provided is a wiring structure for display device which does not generate hillocks even when exposed to high temperatures at levels around 450 to 600° C., has excellent high-temperature heat resistance, keeps electrical resistance (wiring resistance) of the entire wiring structure low, and further has excellent resistance to hydrofluoric acid. This wiring structure for a display device comprises a structure in which are laminated, in order from the substrate side, a first layer of an Al alloy that contains at least one chemical element selected from the group (group X) consisting of Ta, Nb, Re, Zr, W, Mo, V, Hf, Ti, Cr, and Pt and contains at least one rare earth element, and a second layer of an Al alloy nitride, or a nitride of at least one chemical element selected from the group Y consisted of Ti, Mo, Al, Ta, Nb, Re, Zr, W, V, Hf, and Cr.

摘要翻译： 提供一种显示装置的布线结构，即使暴露于高于450〜600℃左右的高温也不会产生小丘，具有优异的耐高温性，使整个布线结构的电阻（布线电阻）保持较低 ，并且还具有优异的耐氢氟酸性。 该显示装置的布线结构包括从基板侧依次层叠由Al，Al的第一层构成的结构，该Al合金含有选自由Ta，Nb，Nb组成的组（X组）中的至少一种化学元素， Re，Zr，W，Mo，V，Hf，Ti，Cr和Pt，并且含有至少一种稀土元素和Al合金氮化物的第二层或选自组中的至少一种化学元素的氮化物 Y由Ti，Mo，Al，Ta，Nb，Re，Zr，W，V，Hf和Cr组成。

公开(公告)号：US20130342986A1

公开(公告)日：2013-12-26

申请号：US13533681

申请日：2012-06-26

申请人： Tsung-Yu Chen ,  Rebecca Shia

发明人： Tsung-Yu Chen ,  Rebecca Shia

IPC分类号： H05K1/11 ,  H05K3/10 ,  H01L23/48

CPC分类号： H05K1/11 ,  H01L21/4853 ,  H01L21/4885 ,  H01L23/373 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01R13/04 ,  H05K3/103 ,  H05K3/3426 ,  H05K3/4015 ,  H05K5/0069 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10787 ,  H05K2201/10795 ,  H05K2201/1081 ,  H05K2203/1178 ,  H01L2924/014 ,  H01L2924/00

摘要： Embodiments pin connections, electronic devices, and methods are shown that include pin configurations to reduce voids and pin tilting and other concerns during pin attach operations, such as attachment to a chip package pin grid array. Pin head are shown that include features such as convex surfaces, a number of legs, and channels in pin head surfaces.

摘要翻译： 示出了引脚连接，电子设备和方法的实施例，其包括引脚配置以减少引脚连接操作期间的空隙和引脚倾斜以及其它问题，诸如附接到芯片封装引脚网格阵列。 引脚头被显示为包括诸如凸表面，多个腿和销头表面中的通道的特征。

公开(公告)号：US08581312B2

公开(公告)日：2013-11-12

申请号：US13159317

申请日：2011-06-13

申请人： Hyun-Young Kim ,  Sung-In Ro ,  Cheoll-Hee Jeon

发明人： Hyun-Young Kim ,  Sung-In Ro ,  Cheoll-Hee Jeon

IPC分类号： H01L31/062

CPC分类号： H01L27/1259 ,  G02F1/13458 ,  G02F1/136227 ,  G02F2001/136236 ,  H01L21/28008 ,  H01L21/283 ,  H01L21/4885 ,  H01L27/124 ,  H01L27/1288

摘要： A thin film transistor array panel includes: a substrate including a display area and a drive region in which a driving chip for transmitting a driving signal to the pixels is located; a gate line in the display area; a storage electrode line; a gate driving pad coupled to the driving chip; a gate insulating layer; a first semiconductor layer on the gate insulating layer and overlapped with a gate electrode protruding from the gate line; a second semiconductor layer formed on the gate insulating layer and overlapped with a sustain electrode protruding from the storage electrode line; a data line crossing the gate line in an insulated manner and a drain electrode separated from the data line; and a pixel electrode coupled to the drain electrode, and the drain electrode comprises a drain bar facing the source electrode, and a drain extender overlapped with the second semiconductor layer.

公开(公告)号：US20130199767A1

公开(公告)日：2013-08-08

申请号：US13364907

申请日：2012-02-02

申请人： John P. Karidis ,  Mark D. Schultz

发明人： John P. Karidis ,  Mark D. Schultz

IPC分类号： F28F7/00 ,  B23K37/00 ,  B23K31/02

CPC分类号： H01L23/473 ,  B23K1/0014 ,  B23K31/02 ,  B23K2101/14 ,  H01L21/4882 ,  H01L21/4885 ,  H01L23/3677 ,  H01L23/467 ,  H01L24/72 ,  H01L2924/01322 ,  H01L2924/00

摘要： A heat sink includes a plurality of layers being disposed substantially parallel with a surface of a heat source. The layers include a plurality of pin portions spaced apart from each other in a planar arrangement wherein the pin portions of the layers are stacked and bonded to form pin fins extending in a transverse direction relative to the heat source to sink heat. A compliant layer is disposed between the pin fins and a mechanical load. The compliant layer provides compliance such that the pin fins accommodate dimensional differences when interfacing with the heat source.

摘要翻译： 散热器包括与热源的表面基本平行的多个层。 这些层包括以平面布置彼此间隔开的多个销部分，其中层的销部分被堆叠并结合以形成相对于热源在横向方向上延伸以散热的销散热片。 柔性层设置在销散热片和机械负载之间。 顺应层提供顺应性，使得当与热源接合时，销翅片适应尺寸差异。

公开(公告)号：US07951702B2

公开(公告)日：2011-05-31

申请号：US12703520

申请日：2010-02-10

申请人： Alan G. Wood ,  William M. Hiatt ,  David R. Hembree

发明人： Alan G. Wood ,  William M. Hiatt ,  David R. Hembree

IPC分类号： H01L21/00 ,  H01L21/44

CPC分类号： H01L21/76898 ,  H01L21/4885 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/4951 ,  H01L23/4985 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L24/78 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/86 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06102 ,  H01L2224/06136 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/2518 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/4845 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85001 ,  H01L2224/851 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19042 ,  Y10T29/53187 ,  Y10T29/53209 ,  H01L2924/00 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2224/83851 ,  H01L2224/05552

摘要： A backside method for fabricating a semiconductor component with a conductive interconnect includes the step of providing a semiconductor substrate having a circuit side, a backside, and a substrate contact on the circuit side. The method also includes the steps of forming a substrate opening from the backside to the substrate contact, and then bonding the conductive interconnect to an inner surface of the substrate contact.

摘要翻译： 用于制造具有导电互连的半导体部件的背面方法包括在电路侧提供具有电路侧，背面和基板接触的半导体衬底的步骤。 该方法还包括以下步骤：从背面形成衬底开口到衬底触点，然后将导电互连件接合到衬底触点的内表面。

公开(公告)号：US07727872B2

公开(公告)日：2010-06-01

申请号：US12117919

申请日：2008-05-09

申请人： Alan G. Wood ,  William M. Hiatt ,  David R. Hembree

发明人： Alan G. Wood ,  William M. Hiatt ,  David R. Hembree

IPC分类号： H01L21/00 ,  H01L21/76 ,  H01L21/44

CPC分类号： H01L21/76898 ,  H01L21/4885 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/4951 ,  H01L23/4985 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L24/78 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/86 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06102 ,  H01L2224/06136 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/2518 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/4845 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85001 ,  H01L2224/851 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19042 ,  Y10T29/53187 ,  Y10T29/53209 ,  H01L2924/00 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2224/83851 ,  H01L2224/05552

摘要： A system for fabricating semiconductor components includes a semiconductor substrate, a thinning system for thinning the semiconductor substrate, an etching system for forming the substrate opening, and a bonding system for bonding the conductive interconnect to the substrate contact. The semiconductor component can be used to form module components, underfilled components, stacked components, and image sensor semiconductor components.

摘要翻译： 一种用于制造半导体元件的系统包括半导体衬底，用于减薄半导体衬底的薄化系统，用于形成衬底开口的蚀刻系统，以及用于将导电互连件接合到衬底触点的接合系统。 半导体元件可用于形成模块组件，底部填充组件，堆叠组件和图像传感器半导体组件。

公开(公告)号：US06469260B2

公开(公告)日：2002-10-22

申请号：US09792991

申请日：2001-02-24

申请人： Michio Horiuchi ,  Takashi Kurihara

发明人： Michio Horiuchi ,  Takashi Kurihara

IPC分类号： H01R909

CPC分类号： H01L21/568 ,  H01L21/4832 ,  H01L21/4885 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49816 ,  H01L23/49861 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/48699 ,  H01L2224/49 ,  H01L2224/81801 ,  H01L2224/85444 ,  H01L2224/8592 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K3/20 ,  H05K2201/10287 ,  H05K2201/10977 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A wiring board comprising a substrate having applied on the same side surface thereof one or more terminals for connecting a semiconductor element and one or more terminals for external connection, in which the terminals for connecting the semiconductor element and the terminals for external connection are electrically connected, by a wire, with each other in the interior of the wiring board, and a semiconductor device comprising the wiring board having packaged thereon semiconductor elements. Processes for the production of the wiring board and the semiconductor device are also disclosed.

摘要翻译： 一种布线基板，其特征在于，具有与上述半导体元件连接的半导体元件的一个或多个端子和一个以上的外部连接端子连接的半导体元件用端子和外部连接端子电连接的同一侧面的基板 通过导线彼此连接在布线板的内部，以及半导体器件，包括其上封装有半导体元件的布线板。 还公开了用于制造布线板和半导体器件的工艺。

公开(公告)号：US20020014350A1

公开(公告)日：2002-02-07

申请号：US09535997

申请日：2000-03-28

发明人： Thomas H. Distefano ,  John W. Smith Jr.

IPC分类号： H01R004/58 ,  H01R012/30

CPC分类号： H01L24/10 ,  H01L21/486 ,  H01L21/4885 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/78301 ,  H01L2224/81801 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19042 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49208 ,  H01L2924/00

摘要： A component for mounting semiconductor chips or other microelectronic units includes a flexible top sheet with an array of terminals on it, and with flexible leads extending downwardly from the terminals. A compliant dielectric support layer surrounds the leads, holding the lead tips in precise locations. The leads are desirably formed from wire such as gold wire, and have eutectic bonding alloy on their tips. The component can be laminated to a chip or other unit under heat and pressure to form a complete subassembly with no need for individual bonding to the contacts of the chip. The subassembly can be tested readily and provides compensation for thermal expansion.

摘要翻译： 用于安装半导体芯片或其他微电子单元的部件包括其上具有端子阵列的柔性顶片以及从端子向下延伸的柔性引线。 柔性电介质支撑层围绕引线，将引线尖端保持在精确的位置。 引线优选由诸如金线的线形成，并且在其尖端上具有共晶接合合金。 该组件可以在加热和压力下层压到芯片或其他单元上以形成完整的子组件，而不需要单独地粘合到芯片的触点。 可以容易地对组件进行测试，并为热膨胀提供补偿。

公开(公告)号：US5166098A

公开(公告)日：1992-11-24

申请号：US652967

申请日：1991-03-11

申请人： Lyubomir Micic ,  Gunter Gartlein ,  Eberhard Schmitt ,  Axel Muller ,  Egon Seng ,  Siegfried Spindler

发明人： Lyubomir Micic ,  Gunter Gartlein ,  Eberhard Schmitt ,  Axel Muller ,  Egon Seng ,  Siegfried Spindler

IPC分类号： H01L21/48 ,  H01L23/04 ,  H01L23/24 ,  H01L23/49

CPC分类号： H01L24/01 ,  H01L21/4885 ,  H01L23/041 ,  H01L23/24 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  Y10T29/49171

摘要： This semiconductor device has two leads (3) lying in the same axis, a prefabricated plastic can (1) which is filled with a plastic compound and has one of the leads passed through its bottom (1a), and a prefabricated die (4) attached between those sides of the inner ends (60, 70) of the leads (3) facing each other, the leads being inserted into, and having an offset within, the can. The manufacture of the leads starts with a wire (30) which unwinds from a spool (39), passes through a major part of the manufacturing stages unseparated, and is separated into the individual semiconductor devices only after the mounting of the cans (1).

摘要翻译： 该半导体器件具有位于同一轴线上的两根引线（3），一个装有塑料化合物的预制塑料罐（1），其中一根引线通过其底部（1a），一个预制模具（4） 连接在彼此面对的引线（3）的内端（60,70）的两侧之间，引线插入并具有位于罐内的偏移。 引线的制造开始于从卷轴（39）展开的导线（30），其穿过未分离的制造阶段的主要部分，并且仅在安装罐（1）之后被分离成单独的半导体器件， 。