公开(公告)号：US3555375A

公开(公告)日：1971-01-12

申请号：US3555375D

申请日：1968-11-29

Applicant: PHILIPS CORP

Inventor： HILBERS ANTONIUS HUBERTUS

IPC: H01L21/60 ,  H01L23/488 ,  H01L23/495 ,  H01L23/66 ,  H05K1/02 ,  H05K1/11 ,  H05K3/34 ,  H01L1/02 ,  H01L1/14

CPC classification number: H01L24/80 ,  H01L23/488 ,  H01L23/49562 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/116 ,  H05K3/3447 ,  H05K2201/0792 ,  H05K2201/09772 ,  H05K2201/10166 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A HIGH FREQUENCY TRANSISTOR IS DESCRIBED HAVING INPUT, OUTPUT AND COMMON LEADS. IN ORDER TO REDUCE THE UNDESIRED FEEDBACK EFFECT OF A STRAY SERIES INDUCTANCE IN THE COMMON LEAD, THE OUTPUT LEADS ARE ARRANGED SO AS TO CROSS ONE ANOTHER IN SUCH CLOSE PROXIMITY AS TO INDUCTIVE-

LY COUPLE THEM TOGETHER PROVIDING A FEEDBACK OPPOSITE TO THAT OF THE STRAY INDUCTANCE IN ORDER TO COMPENSATE THE LATTER.

公开(公告)号：US20170040249A1

公开(公告)日：2017-02-09

申请号：US15228059

申请日：2016-08-04

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Hiroharu Yanagisawa ,  Kazuhiro Kobayashi

IPC: H01L23/498 ,  H01L23/31 ,  H05K1/02 ,  H01L21/56 ,  H05K1/11 ,  H05K1/18 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3178 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81395 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/83005 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1816 ,  H05K1/0213 ,  H05K1/111 ,  H05K1/181 ,  H05K3/205 ,  H05K2201/0769 ,  H05K2201/09472 ,  H05K2201/09772 ,  H05K2201/098 ,  H05K2201/10674 ,  H05K2201/2072 ,  H05K2203/0278 ,  H05K2203/1105 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A wiring board includes: an insulating layer; and a wiring layer including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the upper surface of the wiring layer is exposed from the insulating layer, and the side surface and the lower surface of the wiring layer are embedded in the insulating layer. A recess portion is formed in an outer edge portion of the upper surface of the wiring layer; and the recess portion is filled with the insulating layer.

Abstract translation: 布线板包括：绝缘层; 以及布线层，包括：上表面; 与上表面相对的下表面; 以及上表面和下表面之间的侧表面，其中布线层的上表面从绝缘层露出，并且布线层的侧表面和下表面嵌入在绝缘层中。 在布线层的上表面的外缘部形成有凹部， 并且凹部被绝缘层填充。

公开(公告)号：US09148948B2

公开(公告)日：2015-09-29

申请号：US13362327

申请日：2012-01-31

Applicant: Ryoichi Shiraishi ,  Toru Itabashi ,  Takahiko Furuta ,  Yuuki Mikami ,  Hiroaki Nakamura ,  Shigeki Nishiyama

Inventor： Ryoichi Shiraishi ,  Toru Itabashi ,  Takahiko Furuta ,  Yuuki Mikami ,  Hiroaki Nakamura ,  Shigeki Nishiyama

IPC: H02H5/04 ,  H05K1/02 ,  H01H85/046

CPC classification number: H05K1/0265 ,  H01H85/046 ,  H05K1/0293 ,  H05K2201/09263 ,  H05K2201/09727 ,  H05K2201/09772 ,  H05K2201/10181

Abstract: An electronic control device includes a substrate, component-mounted wires disposed on the substrate, electronic components mounted on the respective component-mounted wires, a common wire disposed on the substrate and coupled with each of the electronic components, and an interrupt wire coupled between one of the component-mounted wires and the common wire. The interrupt wire melts in accordance with heat generated by an overcurrent. The interrupt wire includes a first wire section and a second wire section shorter than the first wire section. The first wire section and the second wire section is coupled with each other at a predetermined angle that is determined so that one of the wire sections is coupled with the common wire and the other is coupled with the one of the component-mounted wires.

Abstract translation: 电子控制装置包括基板，设置在基板上的部件安装的导线，安装在相应的部件安装导线上的电子部件，设置在基板上并与每个电子部件耦合的公共线，以及连接在 组件安装线和公共线之一。 中断线根据过电流产生的热量而熔化。 中断线包括第一线段和比第一线段短的第二线段。 第一线段和第二线段以预定角度相互耦合，该预定角度被确定为使得线段中的一个与公共线耦合，而另一个与部件安装线中的一个耦合。

公开(公告)号：US20150115469A1

公开(公告)日：2015-04-30

申请号：US14523733

申请日：2014-10-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Che LEE ,  Ming-Chiang LEE

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/007 ,  H05K3/4682 ,  H05K2201/09227 ,  H05K2201/09563 ,  H05K2201/09772 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Abstract translation: 提供半导体基板及其制造方法。 半导体衬底包括电介质层，电路层，第一保护层和多个导电柱。 电介质层具有彼此相对的第一表面和第二表面。 电路层嵌入电介质层并从第一表面露出。 第一保护层覆盖第一电路层的一部分并且限定暴露第一电路层的剩余部分的多个孔。 导电柱形成在孔中。

公开(公告)号：US08999760B2

公开(公告)日：2015-04-07

申请号：US13492687

申请日：2012-06-08

Applicant: Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

Inventor： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC: H01L21/56 ,  H01L23/538 ,  H01L23/31 ,  H01L23/36 ,  H01L23/498 ,  H01L23/552 ,  H01L23/00 ,  H05K1/02 ,  H05K1/18 ,  H01L23/29 ,  H01L23/367 ,  H01L23/544

CPC classification number: H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L23/552 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/24195 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/0203 ,  H05K1/186 ,  H05K2201/09772 ,  H01L2924/01014 ,  H01L2924/05432 ,  H01L2924/0542 ,  H01L2924/0503 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a thermally conductive layer with a plurality of openings formed over a temporary carrier. The thermally conductive layer includes electrically non-conductive material. A semiconductor die has a plurality of bumps formed over contact pads on the die. The semiconductor die is mounted over the thermally conductive layer so that the bumps are disposed at least partially within the openings in the thermally conductive layer. An encapsulant is deposited over the die and thermally conductive layer. The temporary carrier is removed to expose the bumps. A first interconnect structure is formed over the encapsulant, semiconductor die, and bumps. The bumps are electrically connected to the first interconnect structure. A heat sink or shielding layer can be formed over the semiconductor die. A second interconnect structure can be formed over the encapsulant and electrically connected to the first interconnect structure through conductive vias formed in the encapsulant.

Abstract translation: 半导体器件具有形成在临时载体上的多个开口的导热层。 导热层包括非导电材料。 半导体管芯具有形成在管芯上的接触焊盘上的多个凸块。 半导体管芯安装在导热层上，使得凸块至少部分地设置在导热层的开口内。 将密封剂沉积在管芯和导热层上。 移除临时载体以暴露凸块。 在密封剂，半导体管芯和凸块之上形成第一互连结构。 凸块电连接到第一互连结构。 可以在半导体管芯上形成散热器或屏蔽层。 第二互连结构可以形成在密封剂之上并且通过形成在密封剂中的导电通孔电连接到第一互连结构。

公开(公告)号：US08780518B2

公开(公告)日：2014-07-15

申请号：US13362251

申请日：2012-01-31

Applicant: Takahiko Furuta ,  Toru Itabashi ,  Yuuki Mikami ,  Naoki Tanimoto ,  Hiroaki Nakamura ,  Shigeki Nishiyama

Inventor： Takahiko Furuta ,  Toru Itabashi ,  Yuuki Mikami ,  Naoki Tanimoto ,  Hiroaki Nakamura ,  Shigeki Nishiyama

IPC: H02H5/00

CPC classification number: H05K1/0293 ,  H01H85/046 ,  H05K1/0206 ,  H05K1/0209 ,  H05K1/0265 ,  H05K2201/09727 ,  H05K2201/09772 ,  H05K2201/10181

Abstract: An electronic control device includes a substrate, a plurality of component-mounted wires disposed on the substrate, a plurality of electronic components mounted on the respective component-mounted wires, a common wire coupled with each of the electronic components, an interrupt wire coupled between one of the component-mounted wires and the common wire, and a heat release portion. The interrupt wire melts in accordance with heat generated by an overcurrent. The heat release portion is attached to the common wire and is disposed at a position where a wiring distance from the interrupt wire is shorter than a wiring distance between the interrupt wire and any of the electronic components except for one of the electronic components mounted on the one of the component-mounted wires.

Abstract translation: 电子控制装置包括基板，设置在基板上的多个部件安装导线，安装在各个部件安装导线上的多个电子部件，与每个电子部件连接的公共线，连接在 部件安装线和公共线之一以及放热部。 中断线根据过电流产生的热量而熔化。 散热部分附接到公共导线，并且设置在与中断线的布线距离短于中断线和任何电子部件之间的布线距离的位置，除了安装在其上的电子部件之一 其中一个组件安装的电线。

公开(公告)号：US08350158B2

公开(公告)日：2013-01-08

申请号：US12507551

申请日：2009-07-22

Applicant: Yechung Chung ,  Chulwoo Kim ,  Eunseok Song ,  Kyoungsei Choi

Inventor： Yechung Chung ,  Chulwoo Kim ,  Eunseok Song ,  Kyoungsei Choi

IPC: H05K1/00

CPC classification number: H05K1/0216 ,  H01L23/4985 ,  H01L24/17 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/114 ,  H05K1/189 ,  H05K2201/093 ,  H05K2201/09318 ,  H05K2201/09663 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: Example embodiments are directed to a tape wiring substrate including a film having an upper surface including a chip mounting area, the chip mounting area further including an inner area and a peripheral area, the film further including a lower surface, and vias penetrating the film, the vias being located in the inner area, an upper metal layer on the upper surface of the film and connected to electrode bumps of a semiconductor chip, and a lower metal layer on the lower surface of the film. Example embodiments are directed to a tape wiring substrate including a film having an upper surface including a chip mounting area, a lower surface, and vias penetrating the film, an upper metal layer on the upper surface of the film and connected to electrode bumps of a semiconductor chip, and a lower metal layer on the lower surface of the film, the vias being located outside of the chip mounting area. Example embodiments are directed to packages including tape wiring substrates.

Abstract translation: 示例性实施例涉及一种带状布线基板，其包括具有包括芯片安装区域的上表面的膜，所述芯片安装区域还包括内部区域和周边区域，所述膜还包括下表面，以及穿透所述膜的通孔， 所述通孔位于所述内部区域中，所述膜的上表面上的上金属层连接到半导体芯片的电极凸块，并且在所述膜的下表面上的下金属层。 示例性实施例涉及一种带状布线基板，其包括具有包括芯片安装区域，下表面和通孔的通孔的上表面的膜，在膜的上表面上的上金属层，并连接到膜的电极凸块 半导体芯片以及下部金属层，通孔位于芯片安装区域的外侧。 示例性实施例涉及包括带布线基板的封装。

公开(公告)号：US20120200973A1

公开(公告)日：2012-08-09

申请号：US13362327

申请日：2012-01-31

Applicant: Ryoichi SHIRAISHI ,  Toru Itabashi ,  Takahiko Furuta ,  Yuuki Mikami ,  Hiroaki Nakamura ,  Shigeki Nishiyama

Inventor： Ryoichi SHIRAISHI ,  Toru Itabashi ,  Takahiko Furuta ,  Yuuki Mikami ,  Hiroaki Nakamura ,  Shigeki Nishiyama

IPC: H02H5/04

CPC classification number: H05K1/0265 ,  H01H85/046 ,  H05K1/0293 ,  H05K2201/09263 ,  H05K2201/09727 ,  H05K2201/09772 ,  H05K2201/10181

Abstract: An electronic control device includes a substrate, component-mounted wires disposed on the substrate, electronic components mounted on the respective component-mounted wires, a common wire disposed on the substrate and coupled with each of the electronic components, and an interrupt wire coupled between one of the component-mounted wires and the common wire. The interrupt wire melts in accordance with heat generated by an overcurrent. The interrupt wire includes a first wire section and a second wire section shorter than the first wire section. The first wire section and the second wire section is coupled with each other at a predetermined angle that is determined so that one of the wire sections is coupled with the common wire and the other is coupled with the one of the component-mounted wires.

Abstract translation: 电子控制装置包括基板，设置在基板上的部件安装的导线，安装在相应的部件安装导线上的电子部件，设置在基板上并与每个电子部件耦合的公共线，以及连接在 组件安装线和公共线之一。 中断线根据过电流产生的热量而熔化。 中断线包括第一线段和比第一线段短的第二线段。 第一线段和第二线段以预定角度相互耦合，该预定角度被确定为使得线段中的一个与公共线耦合，而另一个与部件安装线中的一个耦合。

公开(公告)号：US20110298110A1

公开(公告)日：2011-12-08

申请号：US12794612

申请日：2010-06-04

Applicant: Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

Inventor： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC: H01L23/488 ,  H01L23/552 ,  H01L23/36 ,  H01L21/60

CPC classification number: H01L23/5389 ,  H01L21/561 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L23/552 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/48 ,  H01L24/97 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/24195 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/0203 ,  H05K1/186 ,  H05K2201/09772 ,  H01L2924/01014 ,  H01L2924/05432 ,  H01L2924/0542 ,  H01L2924/0503 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a thermally conductive layer with a plurality of openings formed over a temporary carrier. The thermally conductive layer includes electrically non-conductive material. A semiconductor die has a plurality of bumps formed over contact pads on the die. The semiconductor die is mounted over the thermally conductive layer so that the bumps are disposed at least partially within the openings in the thermally conductive layer. An encapsulant is deposited over the die and thermally conductive layer. The temporary carrier is removed to expose the bumps. A first interconnect structure is formed over the encapsulant, semiconductor die, and bumps. The bumps are electrically connected to the first interconnect structure. A heat sink or shielding layer can be formed over the semiconductor die. A second interconnect structure can be formed over the encapsulant and electrically connected to the first interconnect structure through conductive vias formed in the encapsulant.

Abstract translation: 半导体器件具有形成在临时载体上的多个开口的导热层。 导热层包括非导电材料。 半导体管芯具有形成在管芯上的接触焊盘上的多个凸块。 半导体管芯安装在导热层上，使得凸块至少部分地设置在导热层的开口内。 密封剂沉积在管芯和导热层上。 移除临时载体以暴露凸块。 在密封剂，半导体管芯和凸块之上形成第一互连结构。 凸块电连接到第一互连结构。 可以在半导体管芯上形成散热器或屏蔽层。 第二互连结构可以形成在密封剂之上并且通过形成在密封剂中的导电通孔电连接到第一互连结构。

公开(公告)号：US08063313B2

公开(公告)日：2011-11-22

申请号：US12263614

申请日：2008-11-03

Applicant: Yun-Jin Oh ,  Chang-Hoon Han ,  Kwang-Ryul Lee ,  Hyoung-Suk Kim

Inventor： Yun-Jin Oh ,  Chang-Hoon Han ,  Kwang-Ryul Lee ,  Hyoung-Suk Kim

IPC: H05K1/16 ,  H05K3/30

CPC classification number: H05K3/3452 ,  H01L24/73 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/15311 ,  H05K2201/09772 ,  H05K2201/09881 ,  H05K2203/0191 ,  H05K2203/049 ,  H05K2203/0577 ,  H05K2203/058 ,  H05K2203/0582 ,  H05K2203/0585 ,  H05K2203/1476 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.

Abstract translation: 配置为防止分层和空隙的印刷电路板（PCB）和半导体封装。 在一个示例性实施例中，半导体封装包括具有其上形成有导电图案的基底基板的PCB，其包括具有用于接收半导体芯片的管芯焊盘和设置在内部区域外部的外部区域的内部区域。 PCB还包括形成在对应于内部区域的基底基板的一部分上的第一阻焊剂和形成在对应于外部区域的基底基板的一部分上的第二阻焊剂。 第二阻焊剂也可以具有比第一阻焊剂的表面粗糙度更大的表面粗糙度。