公开(公告)号：US20070046313A1

公开(公告)日：2007-03-01

申请号：US11552856

申请日：2006-10-25

Applicant: Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Ga tan Mathieu

Inventor： Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Ga tan Mathieu

IPC: G01R31/26

CPC classification number: H05K7/1069 ,  B23K1/0008 ,  B23K20/004 ,  B23K2101/40 ,  C23C18/1605 ,  C23C18/165 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R31/2856 ,  G01R31/2863 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/49811 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/16 ,  H01L2223/54453 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45572 ,  H01L2224/45599 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48844 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/90 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10S977/712 ,  Y10S977/723 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/4922 ,  Y10T29/49812 ,  Y10T428/12396 ,  Y10T428/12528 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/29099 ,  H01L2224/29075 ,  H01L2224/85399 ,  H01L2924/206

Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150° C., and can be completed in less than 60 minutes.

Abstract translation: 弹性接触结构直接安装在半导体晶片上的接合焊盘上，在裸片与半导体晶片分离（分离）之前。 这使得半导体管芯能够通过具有设置在其表面上的多个端子的电路板等连接到半导体管芯来进行（例如，测试和/或烧入）。 接下来，半导体管芯可以从半导体晶片分离，因此可以使用相同的弹性接触结构来实现半导体管芯和其他电子部件（例如布线基板，半导体封装等）之间的互连。 使用本发明的全金属复合互连元件作为弹性接触结构，可以在至少150℃的温度下进行老化，并且可以在少于60分钟内完成。

公开(公告)号：US20070007977A1

公开(公告)日：2007-01-11

申请号：US11306270

申请日：2005-12-21

Applicant: Benjamin Eldridge ,  Carl Reynolds ,  Nobuhiro Kawamata ,  Takao Saeki

Inventor： Benjamin Eldridge ,  Carl Reynolds ,  Nobuhiro Kawamata ,  Takao Saeki

IPC: G01R31/02

CPC classification number: G01R31/2889 ,  G01R31/31905

Abstract: A probe card assembly can include an insert holder configured to hold a probe insert, which can include probes disposed in a particular configuration for probing a device to be tested. The probe card assembly can provide an electrical interface to a tester that can control testing of the device, and while attached to the probe card assembly, the insert holder can hold the probe insert such that the probe insert is electrically connected to electrical paths within the probe card assembly that are part of the interface to the tester. The insert holder can be detached from the probe card assembly. The probe insert of the probe card assembly can be replaced by detaching the insert holder, replacing the probe insert with a new probe insert, and then reattaching the insert holder to the probe card assembly. The probe insert and holder can be integrally formed and comprise a single structure that can be detached from a probe card assembly and replaced with a different probe insert and holder.

Abstract translation: 探针卡组件可以包括构造成保持探针插入件的插入物保持器，其可以包括设置在特定构造中的探针，用于探测要测试的装置。 探针卡组件可以向测试器提供电接口，该接口可以控制设备的测试，并且在附接到探针卡组件时，插入物保持器可以保持探针插入件，使得探针插件电连接到内部的电路径 探针卡组件是测试仪接口的一部分。 插入架可以从探针卡组件拆下。 探针卡组件的探针插入可以通过拆卸插入物夹持器，用新的探针插入物代替探针插入物，然后将插入物夹持器重新连接到探针卡组件来代替。 探针插入物和保持器可以一体地形成并且包括可以从探针卡组件分离并且用不同的探针插入物和保持器代替的单个结构。

公开(公告)号：US20060244470A1

公开(公告)日：2006-11-02

申请号：US11479068

申请日：2006-06-30

Applicant: Makarand Shinde ,  Richard Larder ,  Timothy Cooper ,  Ravindra Shenoy ,  Benjamin Eldridge

Inventor： Makarand Shinde ,  Richard Larder ,  Timothy Cooper ,  Ravindra Shenoy ,  Benjamin Eldridge

IPC: G01R31/02

CPC classification number: G01R31/2889 ,  G01R1/07378

Abstract: A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.

公开(公告)号：US20060211234A1

公开(公告)日：2006-09-21

申请号：US11420403

申请日：2006-05-25

Applicant: Benjamin Eldridge ,  Gaetan Mathieu

Inventor： Benjamin Eldridge ,  Gaetan Mathieu

IPC: H01L21/44

CPC classification number: B81C1/00214 ,  B81B7/04 ,  B81C3/002 ,  B81C2203/051 ,  G01R1/06711 ,  G01R1/06744 ,  G01R1/07314 ,  G01R1/07342 ,  G01R3/00 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/15174 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49151 ,  Y10T29/49204 ,  H01L2924/00

Abstract: Methods of fabricating an array of aligned microstructures on a substrate are disclosed. The microstructures may be spring contacts or other microelements. The methods disclosed include construction of an alignment substrate, alignment of die elements with the alignment substrate, and fixation of the aligned die elements to a backing substrate.

Abstract translation: 公开了在衬底上制造排列的微结构阵列的方法。 微结构可以是弹簧触点或其他微量元件。 所公开的方法包括对准基板的构造，模具元件与对准基板的对准以及将对准的模具元件固定到背衬基板上。

公开(公告)号：US20060132161A1

公开(公告)日：2006-06-22

申请号：US10905199

申请日：2004-12-21

Applicant: Igor Khandros ,  Benjamin Eldridge

Inventor： Igor Khandros ,  Benjamin Eldridge

IPC: G01R31/26

CPC classification number: G01R31/2884 ,  G01R31/3025 ,  G01R31/31907

Abstract: A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices were designed or a manufacturing facility where the electronic devices where manufactured. The central test facility may accept requests for test resources from any of a number of local test facilities, schedule test times corresponding to each test request, and at a scheduled test time, wirelessly transmits test data to a corresponding local test facility.

Abstract translation: 中央测试设备将无线测试数据传输到本地测试设备，该测试设备使用测试数据测试电子设备。 本地测试设备将由电子设备生成的无线响应数据发送回中央测试设备，分析响应数据以确定哪些电子设备通过测试。 中央测试设备可以向其他实体提供测试结果，例如设计电子设备的设计设施或其中制造的电子设备的制造设施。 中央测试设备可以接受来自任何本地测试设施的测试资源的请求，对应于每个测试请求的调度测试时间，并且在预定的测试时间，将测试数据无线地传输到相应的本地测试设施。

公开(公告)号：US20060057875A1

公开(公告)日：2006-03-16

申请号：US11264948

申请日：2005-11-01

Applicant: Benjamin Eldridge ,  Carl Reynolds

Inventor： Benjamin Eldridge ,  Carl Reynolds

IPC: H01R13/44

CPC classification number: G01R31/2851 ,  G01R31/2886

Abstract: The present invention discloses a cover over electrical contacts of a probe card used in testing die on a wafer. A testing machine is disclosed as having the covered probe card therein. Various mechanisms for uncovering the electrical contacts while it is located in the tester machine are disclosed.

公开(公告)号：US20050156165A1

公开(公告)日：2005-07-21

申请号：US11000586

申请日：2004-11-30

Applicant: Benjamin Eldridge ,  Igor Khandros ,  David Pedersen ,  Ralph Whitten

Inventor： Benjamin Eldridge ,  Igor Khandros ,  David Pedersen ,  Ralph Whitten

IPC: G01R1/067 ,  G01R1/073 ,  G01R31/28 ,  H01L23/48 ,  H01L23/485 ,  H01L23/498 ,  H01L23/544 ,  H05K3/20 ,  H05K3/34 ,  H01L23/58 ,  G01R31/02 ,  H01L29/10

CPC classification number: G01R1/07307 ,  G01R1/07342 ,  G01R1/07371 ,  G01R31/2884 ,  G01R31/2886 ,  H01L22/32 ,  H01L22/34 ,  H01L23/49811 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/13 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K3/20 ,  H05K3/3421 ,  H01L2924/00014 ,  H01L2924/00

Abstract: One embodiment of the present invention concerns a test assembly for testing product circuitry of a product die. In one embodiment, the test assembly includes at test die and an interconnection substrate for electrically coupling the test die to a host controller that communicates with the test die. The test die may be designed according to a design methodology that includes the step of concurrently designing test circuitry and a product circuitry in a unified design. The test circuitry can be designed to provide a high degree of fault coverage for the corresponding product circuitry generally without regard to the amount of silicon area that will be required by the test circuitry. The design methodology then partitions the unified design into the test die and the product die. The test die includes the test circuitry and the product die includes the product circuitry. The product and test die may then be fabricated on separate semiconductor wafers. By partitioning the product circuitry and test circuitry into separate die, embedded test circuitry can be either eliminated or minimized on the product die. This will tend to decrease the size of the product die and decrease the cost of manufacturing the product die while maintaining a high degree of test coverage of the product circuits within the product die. The test die can be used to test multiple product die on one or more wafers.

Abstract translation: 本发明的一个实施例涉及一种用于测试产品模具的产品电路的测试组件。 在一个实施例中，测试组件包括在测试模具和用于将测试模具电耦合到与测试模具通信的主机控制器的互连衬底。 测试模具可以根据设计方法设计，包括在统一设计中同时设计测试电路和产品电路的步骤。 测试电路可以设计成为相应的产品电路提供高度的故障覆盖，通常不考虑测试电路所需的硅面积的量。 然后，设计方法将统一设计分为测试模具和产品模具。 测试芯片包括测试电路，产品芯片包括产品电路。 然后可以在单独的半导体晶片上制造产品和测试裸片。 通过将产品电路和测试电路划分为单独的管芯，可以在产品管芯上消除或最小化嵌入式测试电路。 这将倾向于减小产品模具的尺寸并降低制造产品模具的成本，同时保持产品模具内的产品电路的高度测试覆盖。 测试模具可用于在一个或多个晶片上测试多个产品模具。

公开(公告)号：US20050148214A1

公开(公告)日：2005-07-07

申请号：US10933063

申请日：2004-09-02

Applicant: Gaetan Mathieu ,  Benjamin Eldridge ,  Gary Grube

Inventor： Gaetan Mathieu ,  Benjamin Eldridge ,  Gary Grube

IPC: G01R1/067 ,  G01R3/00 ,  H05K3/32 ,  H05K3/40 ,  H01R12/00

CPC classification number: G01R3/00 ,  G01R1/06711 ,  G01R1/06716 ,  G01R1/06727 ,  G01R1/06744 ,  G01R1/06761 ,  H01L21/6835 ,  H01L23/49811 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13012 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01055 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19041 ,  H05K3/326 ,  H05K3/4092 ,  Y10S438/977 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49222 ,  Y10T29/49224 ,  H01L2924/00

Abstract: A method of forming an interconnection, including a spring contact element, by lithographic techniques. In one embodiment, the method includes applying a masking material over a first portion of a substrate, the masking material having an opening which will define a first portion of a spring structure, depositing a structure material (e.g., conductive material) in the opening, and overfilling the opening with the structure material, removing a portion of the structure material, and removing a first portion of the masking material. In this embodiment, at least a portion of the first portion of the spring structure is freed of masking material. In one aspect of the invention, the method includes planarizing the masking material layer and structure material to remove a portion of the structure material. In another aspect, the spring structure formed includes one of a post portion, a beam portion, and a tip structure portion.

Abstract translation: 通过光刻技术形成包括弹簧接触元件的互连的方法。 在一个实施例中，该方法包括在衬底的第一部分上施加掩模材料，掩模材料具有将限定弹簧结构的第一部分的开口，在开口中沉积结构材料（例如导电材料） 并用结构材料过度填充开口，去除结构材料的一部分，以及去除掩模材料的第一部分。 在该实施例中，弹簧结构的第一部分的至少一部分没有掩蔽材料。 在本发明的一个方面，该方法包括平坦化掩模材料层和结构材料以去除结构材料的一部分。 另一方面，形成的弹簧结构包括柱部分，梁部分和尖端结构部分中的一个。

公开(公告)号：US20050086021A1

公开(公告)日：2005-04-21

申请号：US10690170

申请日：2003-10-21

Applicant: Igor Khandros ,  Benjamin Eldridge ,  A. Sporck ,  Charles Miller

Inventor： Igor Khandros ,  Benjamin Eldridge ,  A. Sporck ,  Charles Miller

IPC: G01R31/319 ,  G06F19/00 ,  G01R31/00

CPC classification number: G01R31/3025 ,  G01R31/31907 ,  G01R31/31908

Abstract: One or more testers wirelessly communicate with one or more test stations. The wireless communication may include transmission of test commands and/or test vectors to a test station, resulting in testing of one or more electronic devices at the test station. The wireless communication may also include transmission of test results to a tester. Messages may also be wirelessly exchanged.

Abstract translation: 一个或多个测试人员与一个或多个测试台无线通信。 无线通信可以包括将测试命令和/或测试向量发送到测试站，导致测试台上的一个或多个电子设备的测试。 无线通信还可以包括将测试结果传输给测试者。 消息也可以被无线地交换。

公开(公告)号：US20050035347A1

公开(公告)日：2005-02-17

申请号：US10889334

申请日：2004-07-12

Applicant: Igor Khandros ,  A. Sporck ,  Benjamin Eldridge

Inventor： Igor Khandros ,  A. Sporck ,  Benjamin Eldridge

IPC: B23K1/00 ,  B23K20/00 ,  C23C18/16 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R31/28 ,  H01L21/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L21/603 ,  H01L21/66 ,  H01L23/48 ,  H01L23/485 ,  H01L23/49 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16 ,  H05K1/14 ,  H05K3/20 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40 ,  H05K7/10 ,  H01L23/58

CPC classification number: H05K3/4015 ,  B23K1/0016 ,  B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D21/02 ,  G01R1/06711 ,  G01R1/07342 ,  G01R1/07364 ,  G01R1/07378 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/76897 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/45014 ,  H01L2224/45144 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4092 ,  H05K7/1069 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05599

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract translation: 在探针卡组件中，可以将一系列探针元件排列在硅空间变压器上。 硅空间变压器可以以与半导体器件的间距相当的非常紧密的间距的主要触点阵列制造。 一个优选的主要接触是弹性弹簧接触。 空间变压器中的导电元件以更放松的间距被路由到第二触点。 在一个优选实施例中，第二触点适于直接连接带状电缆，带状电缆又可连接以提供对每个主触点的选择性连接。 硅空间变压器安装在固定装置中，其提供与待测试的晶片或装置的弹性连接。 可以调整该夹具以使主触头与支撑探针卡板的平面平坦化。