公开(公告)号：US20130027113A1

公开(公告)日：2013-01-31

申请号：US13191891

申请日：2011-07-27

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl ,  Xaver Schloegel

IPC分类号： H03K17/56 ,  H01L25/07 ,  H01L21/98 ,  H01L23/538

CPC分类号： H01L24/73 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/02166 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/2732 ,  H01L2224/2745 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37147 ,  H01L2224/3716 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/4866 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48671 ,  H01L2224/48699 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/4876 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48771 ,  H01L2224/48799 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/4886 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48869 ,  H01L2224/48871 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/8382 ,  H01L2224/85439 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/8546 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/01028 ,  H01L2224/27 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/00012 ,  H01L2924/01023 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/01005

摘要： A semiconductor chip includes a power transistor circuit with a plurality of active transistor cells. A first load electrode and a control electrode are arranged on a first face of the semiconductor chip, wherein the first load electrode includes a first metal layer. A second load electrode is arranged on a second face of the semiconductor chip. A second metal layer is arranged over the first metal layer, wherein the second metal layer is electrically insulated from the power transistor circuit and the second metal layer is arranged over an area of the power transistor circuit that comprises at least one of the plurality of active transistor cells.

摘要翻译： 半导体芯片包括具有多个有源晶体管单元的功率晶体管电路。 第一负载电极和控制电极设置在半导体芯片的第一面上，其中第一负载电极包括第一金属层。 第二负载电极设置在半导体芯片的第二面上。 第二金属层布置在第一金属层上，其中第二金属层与功率晶体管电路电绝缘，并且第二金属层布置在功率晶体管电路的包括多个活性物质中的至少一个的区域 晶体管单元。

公开(公告)号：US08164173B2

公开(公告)日：2012-04-24

申请号：US12828327

申请日：2010-07-01

申请人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

发明人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

IPC分类号： H01L23/48

CPC分类号： H01L23/552 ,  H01L23/3114 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099

摘要： A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.

摘要翻译： 面板具有具有上部第一金属层和多个垂直半导体部件的基板。 每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。 半导体部件的第二面分别安装在基板的金属层上。 半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。 第二金属层布置在半导体部件之间的分离区域中。

公开(公告)号：US07879652B2

公开(公告)日：2011-02-01

申请号：US11828858

申请日：2007-07-26

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

IPC分类号： H01L21/00

CPC分类号： H01L23/3107 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L2221/68359 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/76155 ,  H01L2224/82005 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor module is disclosed. One embodiment provides a first semiconductor chip having a first contact pad on a first main surface and a second contact pad on a second main surface, a first electrically conductive layer applied to the first main surface, a second electrically conductive layer applied to the second main surface, and an electrically insulating material covering the first electrically conductive layer, wherein a surface of the second electrically conductive layer forms an external contact pad and the second electrically conductive layer has a thickness of less than 200 μm.

摘要翻译： 公开了一种半导体模块。 一个实施例提供了第一半导体芯片，其具有在第一主表面上的第一接触焊盘和在第二主表面上的第二接触焊盘，施加到第一主表面的第一导电层，施加到第二主表面的第二导电层 表面和覆盖第一导电层的电绝缘材料，其中第二导电层的表面形成外部接触焊盘，第二导电层具有小于200μm的厚度。

公开(公告)号：US20100001291A1

公开(公告)日：2010-01-07

申请号：US12168254

申请日：2008-07-07

申请人： Ralf Otremba ,  Josef Hoeglauer

发明人： Ralf Otremba ,  Josef Hoeglauer

IPC分类号： H01L23/02 ,  H01L21/52 ,  H01L29/16

CPC分类号： H01L23/49551 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/18 ,  H01L24/19 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/18 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48871 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/305 ,  H05K3/3442 ,  H05K3/3468 ,  H05K2201/10727 ,  H05K2203/0465 ,  Y02P70/613 ,  H01L2224/82 ,  H01L2924/01026 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2224/48744 ,  H01L2224/48771 ,  H01L2224/48671 ,  H01L2924/00012

摘要： An electronic device and manufacturing thereof. One embodiment provides a carrier and multiple contact elements. The carrier defines a first plane. A power semiconductor chip is attached to the carrier. A body is formed of an electrically insulating material covering the power semiconductor chip. The body defines a second plane parallel to the first plane and side faces extends from the first plane to the second plane. At least one of the multiple contact elements has a cross section in a direction orthogonal to the first plane that is longer than 60% of the distance between the first plane and the second plane.

摘要翻译： 电子设备及其制造。 一个实施例提供载体和多个接触元件。 载体定义第一平面。 功率半导体芯片附着在载体上。 主体由覆盖功率半导体芯片的电绝缘材料形成。 主体限定平行于第一平面的第二平面，侧面从第一平面延伸到第二平面。 多个接触元件中的至少一个在与第一平面正交的方向上具有长于第一平面和第二平面之间的距离的60％的横截面。

公开(公告)号：US20090230535A1

公开(公告)日：2009-09-17

申请号：US12046680

申请日：2008-03-12

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Xaver Schloegel

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Xaver Schloegel

IPC分类号： H01L23/522 ,  H01L21/50

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3157 ,  H01L24/25 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/2518 ,  H01L2224/73153 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1815 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor module. In one embodiment, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material. An exposed portion of the at least two semiconductor chips is provided. A first layer of conductive material is applied over the exposed portion of the at least two semiconductor chips to electrically connect to a contact pad on the exposed portion of the at least two semiconductor chips. The at least two semiconductor chips are singulated.

摘要翻译： 半导体模块。 在一个实施例中，至少两个半导体芯片放置在载体上。 然后用成型材料覆盖至少两个半导体芯片。 提供至少两个半导体芯片的暴露部分。 第一层导电材料施加在至少两个半导体芯片的暴露部分上，以电连接到至少两个半导体芯片的暴露部分上的接触焊盘。 将至少两个半导体芯片分割。

公开(公告)号：US20070138634A1

公开(公告)日：2007-06-21

申请号：US11611498

申请日：2006-12-15

申请人： Ralf Otremba ,  Xaver Schloegel ,  Josef Hoeglauer

发明人： Ralf Otremba ,  Xaver Schloegel ,  Josef Hoeglauer

IPC分类号： H01L23/34

CPC分类号： H01L23/3107 ,  H01L21/6835 ,  H01L23/4985 ,  H01L24/33 ,  H01L24/83 ,  H01L2221/68377 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32245 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/01049 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device (1; 25) has a vertical semiconductor component (2), a first metalization (8) and a second metalization (13). The second metalization (13) has an integral film with a first end (14) with a first contact area (17), an intermediate region (15) and a second end (16) with a second contact area (19). The first contact area (17) is arranged on the rear side (6) of the semiconductor component (2) and the second contact area (19) is essentially arranged in the plane of the external contact area (12) of the first metalization (8) and provides an external contact area (12). The first contact area (17) and the second contact area (19) are arranged on opposite surfaces of the film of the second metalization (13).

摘要翻译： 半导体器件（1; 25）具有垂直半导体部件（2），第一金属化（8）和第二金属化（13）。 第二金属化（13）具有整体膜，其具有带有第一接触区域（17）的第一端（14），具有第二接触区域（19）的中间区域（15）和第二端部（16）。 第一接触区域（17）布置在半导体部件（2）的后侧（6）上，并且第二接触区域（19）基本上布置在第一金属化的外部接触区域（12）的平面中 8）并提供外部接触区域（12）。 第一接触区域（17）和第二接触区域（19）布置在第二金属化（13）的膜的相对表面上。

公开(公告)号：US08815647B2

公开(公告)日：2014-08-26

申请号：US13602349

申请日：2012-09-04

申请人： Ralf Otremba ,  Bernd Roemer ,  Erich Griebl ,  Fabio Brucchi

发明人： Ralf Otremba ,  Bernd Roemer ,  Erich Griebl ,  Fabio Brucchi

IPC分类号： H01L21/00 ,  H01L23/34

CPC分类号： H01L23/13 ,  H01L23/142 ,  H01L23/36 ,  H01L23/492 ,  H01L23/49513 ,  H01L23/49562 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/80 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05556 ,  H01L2224/0556 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/29006 ,  H01L2224/29016 ,  H01L2224/29023 ,  H01L2224/29026 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2916 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/3201 ,  H01L2224/32057 ,  H01L2224/32106 ,  H01L2224/32225 ,  H01L2224/32237 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45111 ,  H01L2224/45118 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/4516 ,  H01L2224/45164 ,  H01L2224/45166 ,  H01L2224/48091 ,  H01L2224/48611 ,  H01L2224/48618 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/4866 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48711 ,  H01L2224/48718 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/4876 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48811 ,  H01L2224/48818 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/4886 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/80903 ,  H01L2224/821 ,  H01L2224/82101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83438 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/8382 ,  H01L2224/83902 ,  H01L2224/9202 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01015 ,  H01L2924/01079 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01082 ,  H01L2924/01051 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： A chip package is provided, the chip package including: a carrier including at least one cavity; a chip disposed at least partially within the at least one cavity; at least one intermediate layer disposed over at least one side wall of the chip; wherein the at least one intermediate layer is configured to thermally conduct heat from the chip to the carrier.

摘要翻译： 提供了芯片封装，芯片封装包括：包括至少一个腔的载体; 至少部分地设置在所述至少一个空腔内的芯片; 设置在所述芯片的至少一个侧壁上的至少一个中间层; 其中所述至少一个中间层构造成将热量从所述芯片热传导到所述载体。

公开(公告)号：US20140061669A1

公开(公告)日：2014-03-06

申请号：US13602349

申请日：2012-09-04

申请人： Ralf Otremba ,  Bernd Roemer ,  Erich Griebl ,  Fabio Brucchi

发明人： Ralf Otremba ,  Bernd Roemer ,  Erich Griebl ,  Fabio Brucchi

IPC分类号： H01L23/495 ,  H01L21/50 ,  H01L29/20

CPC分类号： H01L23/13 ,  H01L23/142 ,  H01L23/36 ,  H01L23/492 ,  H01L23/49513 ,  H01L23/49562 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/80 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05556 ,  H01L2224/0556 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/211 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/29006 ,  H01L2224/29016 ,  H01L2224/29023 ,  H01L2224/29026 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2916 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/3201 ,  H01L2224/32057 ,  H01L2224/32106 ,  H01L2224/32225 ,  H01L2224/32237 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45111 ,  H01L2224/45118 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/4516 ,  H01L2224/45164 ,  H01L2224/45166 ,  H01L2224/48091 ,  H01L2224/48611 ,  H01L2224/48618 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/4866 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48711 ,  H01L2224/48718 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/4876 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48811 ,  H01L2224/48818 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/4886 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/80903 ,  H01L2224/821 ,  H01L2224/82101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83438 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/8382 ,  H01L2224/83902 ,  H01L2224/9202 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01015 ,  H01L2924/01079 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01082 ,  H01L2924/01051 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： A chip package is provided, the chip package including: a carrier including at least one cavity; a chip disposed at least partially within the at least one cavity; at least one intermediate layer disposed over at least one side wall of the chip; wherein the at least one intermediate layer is configured to thermally conduct heat from the chip to the carrier.

摘要翻译： 提供了芯片封装，芯片封装包括：包括至少一个腔的载体; 至少部分地设置在所述至少一个空腔内的芯片; 设置在所述芯片的至少一个侧壁上的至少一个中间层; 其中所述至少一个中间层构造成将热量从所述芯片热传导到所述载体。

公开(公告)号：US20140001480A1

公开(公告)日：2014-01-02

申请号：US13540469

申请日：2012-07-02

申请人： Ralf Otremba ,  Klaus Schiess

发明人： Ralf Otremba ,  Klaus Schiess

IPC分类号： H01L23/495 ,  H01L21/28

CPC分类号： H01L23/3107 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/29078 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40247 ,  H01L2224/40499 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92157 ,  H01L2224/92246 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/06 ,  H01L2924/014 ,  H01L2224/05599 ,  H01L2924/00012

摘要： In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor chip disposed over a lead frame, and a clip disposed over the semiconductor chip. A major surface of the semiconductor chip includes a contact pad and a control contact pad. The contact pad has a first portion along a first side of the control contact pad and a second portion along an opposite second side of the control contact pad. The clip electrically couples the first portion and the second portion with a first lead of the lead frame. A wire bond electrically couples the control contact pad with a second lead of the lead frame.

摘要翻译： 根据本发明的实施例，半导体器件包括设置在引线框架上的半导体芯片和设置在半导体芯片上的夹子。 半导体芯片的主表面包括接触焊盘和控制接触焊盘。 接触焊盘具有沿着控制接触焊盘的第一侧的第一部分和沿着控制接触焊盘的相对的第二侧的第二部分。 夹子用引线框架的第一引线电耦合第一部分和第二部分。 引线接合将控制接触焊盘与引线框架的第二引线电连接。

公开(公告)号：US08618644B2

公开(公告)日：2013-12-31

申请号：US13594949

申请日：2012-08-27

申请人： Ralf Otremba ,  Marco Seibt ,  Uwe Kirchner ,  Wolfgang Peinhopf ,  Michael Treu ,  Andreas Schloegl ,  Mario Veldvoss

发明人： Ralf Otremba ,  Marco Seibt ,  Uwe Kirchner ,  Wolfgang Peinhopf ,  Michael Treu ,  Andreas Schloegl ,  Mario Veldvoss

IPC分类号： H01L23/02

CPC分类号： H01L23/4952 ,  H01L23/49562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/0603 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4917 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85

摘要： An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.

摘要翻译： 电子设备及其制造。 一个实施例提供了在第一表面上具有控制电极和第一负载电极的半导体芯片，在第二表面上提供第二负载电极。 第一引线电耦合到控制电极。 第二引线电耦合到第一负载电极。 第三引线电耦合到第一负载电极，第三引线与第二引线分离。 第四引线电耦合到第二负载电极，第二和第三引线布置在第一和第四引线之间。