公开(公告)号：US08415202B2

公开(公告)日：2013-04-09

申请号：US13050050

申请日：2011-03-17

Applicant: Takayuki Ohba

Inventor： Takayuki Ohba

IPC: H01L21/00

CPC classification number: H01L21/76898 ,  B81B2207/07 ,  B81C1/00238 ,  B81C2201/019 ,  B81C2203/0792 ,  H01L23/481 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/13009 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/83005 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device manufacturing method of stacking semiconductor chips in layers over a semiconductor substrate having, close to its main surface, semiconductor chips, connecting semiconductor chips in different layers to enable signal transmission, and singularizing the layered semiconductor chips into pieces. The method includes steps of forming an insulating layer on the main surface of the semiconductor substrate; stacking the semiconductor chips over the semiconductor chips of the semiconductor substrate in such a manner as to interpose the insulating layer between them and an opposite surface of each disposed semiconductor chip opposes the insulating layer, the opposite surface being opposite to the main surface; forming, in each of the disposed semiconductor chips, a via hole penetrating from the main to the opposite surface; and forming a connection which enables signal transmission between the disposed semiconductor chips and the corresponding semiconductor chips of the semiconductor substrate via the via holes.

Abstract translation: 一种在半导体衬底上层叠半导体芯片的半导体器件制造方法，该半导体衬底具有靠近其主表面的半导体芯片，将不同层中的半导体芯片连接起来以使信号传输，并将分层的半导体芯片单独化成块。 该方法包括在半导体衬底的主表面上形成绝缘层的步骤; 将半导体芯片堆叠在半导体衬底的半导体芯片上，以使绝缘层在它们之间插入，并且每个设置的半导体芯片的相对表面与绝缘层相对，相反表面与主表面相对; 在每个所设置的半导体芯片中形成从主要穿透到相对表面的通孔; 以及形成通过所述通孔使所述半导体芯片与所述半导体基板的对应的半导体芯片之间的信号传输的连接。

公开(公告)号：US20130069197A1

公开(公告)日：2013-03-21

申请号：US13678134

申请日：2012-11-15

Applicant: Stats ChipPac, Ltd.

Inventor： HyunTai Kim ,  YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn ,  Kai Liu

IPC: H01L27/06 ,  H01L27/08

CPC classification number: H01L27/0676 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L27/016 ,  H01L27/0805 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6677 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a substrate and RF FEM formed over the substrate. The RF FEM includes an LC low-pass filter having an input coupled for receiving a transmit signal. A Tx/Rx switch has a first terminal coupled to an output of the LC filter. A diplexer has a first terminal coupled to a second terminal of the Tx/Rx switch and a second terminal for providing an RF signal. An IPD band-pass filter has an input coupled to a third terminal of the Tx/Rx switch and an output providing a receive signal. The LC filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The IPD filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The RF FEM substrate can be stacked over a semiconductor package containing an RF transceiver.

Abstract translation: 半导体器件具有在衬底上形成的衬底和RF FEM。 RF FEM包括具有耦合用于接收发射信号的输入的LC低通滤波器。 Tx / Rx开关具有耦合到LC滤波器的输出的第一端子。 双工器具有耦合到Tx / Rx开关的第二端子的第一端子和用于提供RF信号的第二端子。 IPD带通滤波器具有耦合到Tx / Rx开关的第三端子的输入端和提供接收信号的输出端。 LC滤波器包括缠绕的导电迹线以显示感应和互感特性以及耦合到导电迹线的电容器。 IPD滤波器包括缠绕的导电迹线以显示感应和互感特性以及耦合到导电迹线的电容器。 RF FEM衬底可以堆叠在包含RF收发器的半导体封装上。

公开(公告)号：US08349648B2

公开(公告)日：2013-01-08

申请号：US12816225

申请日：2010-06-15

Applicant: HyunTai Kim ,  YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn ,  Kai Liu

Inventor： HyunTai Kim ,  YongTaek Lee ,  Gwang Kim ,  ByungHoon Ahn ,  Kai Liu

IPC: H01L21/98

CPC classification number: H01L27/0676 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/642 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L27/016 ,  H01L27/0805 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6677 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a substrate and RF FEM formed over the substrate. The RF FEM includes an LC low-pass filter having an input coupled for receiving a transmit signal. A Tx/Rx switch has a first terminal coupled to an output of the LC filter. A diplexer has a first terminal coupled to a second terminal of the Tx/Rx switch and a second terminal for providing an RF signal. An IPD band-pass filter has an input coupled to a third terminal of the Tx/Rx switch and an output providing a receive signal. The LC filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The IPD filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The RF FEM substrate can be stacked over a semiconductor package containing an RF transceiver.

Abstract translation: 半导体器件具有在衬底上形成的衬底和RF FEM。 RF FEM包括具有耦合用于接收发射信号的输入的LC低通滤波器。 Tx / Rx开关具有耦合到LC滤波器的输出的第一端子。 双工器具有耦合到Tx / Rx开关的第二端子的第一端子和用于提供RF信号的第二端子。 IPD带通滤波器具有耦合到Tx / Rx开关的第三端子的输入端和提供接收信号的输出端。 LC滤波器包括缠绕的导电迹线以显示感应和互感特性以及耦合到导电迹线的电容器。 IPD滤波器包括缠绕的导电迹线以显示感应和互感特性以及耦合到导电迹线的电容器。 RF FEM衬底可以堆叠在包含RF收发器的半导体封装上。

公开(公告)号：US20120326299A1

公开(公告)日：2012-12-27

申请号：US13168158

申请日：2011-06-24

Applicant: Roden R. Topacio ,  I-Tseng Lee

Inventor： Roden R. Topacio ,  I-Tseng Lee

IPC: H01L21/28 ,  H01L23/485 ,  H01L23/488 ,  H01L21/58

CPC classification number: H01L24/03 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05555 ,  H01L2224/05561 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/1132 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/81411 ,  H01L2224/81815 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: Various semiconductor chip input/output structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a first polymer film to a side of a semiconductor chip and forming a first underbump metallization structure with at least a portion on the first polymer film. A second polymer film is applied on the first polymer film with an opening exposing a portion of the first underbump metallization structure.

Abstract translation: 公开了各种半导体芯片输入/输出结构及其制造方法。 一方面，提供了一种制造方法，其包括将第一聚合物膜施加到半导体芯片的侧面，并且在第一聚合物膜上至少形成第一底部金属化结构。 将第二聚合物膜施加在第一聚合物膜上，其中开口露出第一底部金属化结构的一部分。

公开(公告)号：US20110222256A1

公开(公告)日：2011-09-15

申请号：US12721243

申请日：2010-03-10

Applicant: Roden R. Topacio

Inventor： Roden R. Topacio

IPC: H05K7/00 ,  H05K1/11 ,  H05K3/10 ,  H05K3/30

CPC classification number: H05K3/3452 ,  H01L21/563 ,  H01L23/28 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/13111 ,  H01L2224/16237 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81455 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01322 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H05K1/0271 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2201/2072 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01082 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Various circuit boards and methods of manufacturing using the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a solder mask to a side of a circuit board and forming at least one opening in the solder mask leading to the side. An underfill is placed on the solder mask so that a portion thereof projects into the at least one opening.

Abstract translation: 公开了各种电路板及其制造方法。 一方面，提供了一种制造方法，其包括将焊料掩模施加到电路板的一侧，并在通向侧面的焊料掩模中形成至少一个开口。 将底部填充物放置在焊接掩模上，使得其一部分突出到至少一个开口中。

公开(公告)号：US20090286382A1

公开(公告)日：2009-11-19

申请号：US12232657

申请日：2008-09-22

Applicant: Michael A. Huff

Inventor： Michael A. Huff

IPC: H01L21/30 ,  C23G1/00 ,  H01L21/44

CPC classification number: C23F4/00 ,  C23G1/103 ,  H01L21/187 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8389 ,  H01L2224/92247 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/3512

Abstract: A method of wafer or substrate bonding a substrate made of a semiconductor material with a substrate made from a metallic material is disclosed. The method allows the bonding of the two substrates together without the use of any intermediate joining gluing, or solder layer(s) between the two substrates. The method allows the moderate or low temperature bonding of the metal and semiconductor substrates, combined with methods to modify the materials so as to enable low electrical resistance interfaces to be realized between the bonded substrates, and also combined with methods to obtain a low thermal resistance interface between the bonded substrates, thereby enabling various useful improvements for fabrication, packaging and manufacturing of semiconductor devices and systems.

Abstract translation: 公开了一种将由半导体材料制成的衬底与由金属材料制成的衬底结合的晶片或衬底的方法。 该方法允许将两个基板结合在一起，而不需要在两个基板之间使用任何中间连接胶合或焊接层。 该方法允许金属和半导体衬底的中温或低温结合，以及改进材料的方法，以便在接合的衬底之间实现低电阻界面，并且还与获得低热阻的方法相结合 在接合的基板之间的界面，从而能够对半导体器件和系统的制造，封装和制造进行各种有用的改进。

公开(公告)号：US20060169992A1

公开(公告)日：2006-08-03

申请号：US10569166

申请日：2003-10-24

Applicant: Josuke Nakata

Inventor： Josuke Nakata

IPC: H01L31/12

CPC classification number: H01L25/0753 ,  F21K9/00 ,  H01L24/45 ,  H01L24/85 ,  H01L31/02008 ,  H01L31/035281 ,  H01L31/0508 ,  H01L31/068 ,  H01L31/1804 ,  H01L33/20 ,  H01L33/24 ,  H01L33/38 ,  H01L33/62 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/4516 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/01322 ,  H01L2924/10252 ,  H01L2924/10328 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/10337 ,  H01L2924/10338 ,  H01L2924/10346 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12043 ,  Y02E10/547 ,  Y02P70/521 ,  H01L2924/00 ,  H01L2224/45147 ,  H01L2924/01014 ,  H01L2924/01032 ,  H01L2924/0105 ,  H01L2224/48 ,  H01L2924/0002 ,  H01L2924/2076 ,  H01L2924/2075 ,  H01L2924/00015 ,  H01L2924/01028 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01049

Abstract: A light receiving or light emitting modular sheet having a plurality of spherical elements arranged in matrix. It is constituted only of acceptable spherical elements and photoelectric conversion efficiency therof is enhanced. The light receiving modular sheet (1) comprises a plurality of spherical solar cell elements (2) arranged in matrix, a meshed member (3), and a sheet member (4). Each solar cell element (2) comprises a spherical pn junction (13), and positive and negative electrodes (14, 15) formed oppositely while sandwiching the center of the solar cell element (2) and being connected with respective electrodes of the pn junction (13). The meshed member (3) has a plurality of conductive wires (20, 21) arranged in parallel in order to connect the plurality of spherical solar cell elements (2) in each column electrically in parallel, and insulating tensile wires (22) arranged between the rows of solar cell elements (2) to cross the conductive wires (20, 21) perpendicularly while being woven in a meshed form to secure the plurality of conductive wires (20, 21).

Abstract translation: 一种光接收或发光模块片，其具有排列成矩阵的多个球形元件。 它仅由可接受的球形元件构成，并且增强了光电转换效率。 光接收模块片（1）包括多个布置成矩阵的球形太阳能电池元件（2），网状构件（3）和片状构件（4）。 每个太阳能电池元件（2）包括球形pn结（13），并且正和负电极（14,15）相对地形成，同时夹着太阳能电池元件（2）的中心并与pn结的各个电极连接 （13）。 网状构件（3）具有平行布置的多个导线（20,21），以便将每个列中的多个球形太阳能电池元件（2）并联电连接，绝缘拉力线（22）布置在 太阳能电池元件（2）的行以垂直方式横切导电线（20,21），同时以网状形式编织以固定多根导线（20,21）。

公开(公告)号：US20030207566A1

公开(公告)日：2003-11-06

申请号：US10417222

申请日：2003-04-17

Inventor： Leonard Forbes ,  Kie Y. Ahn

IPC: H01L021/44 ,  H01L023/04

CPC classification number: H05K1/0222 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1435 ,  H01L2924/145 ,  H01L2924/15311 ,  H01L2924/157 ,  H05K1/115 ,  H05K2201/09036 ,  H05K2201/09809 ,  H05K2201/09845 ,  H01L2924/00

Abstract: The present invention provides a semiconductive substrate which includes front and back surfaces and a hole which extends through the substrate and between the front and back surfaces. The hole is defined in part by an interior wall portion and forms an outer conductive sheath. Conductive material is formed proximate at least some of the interior wall portion. Subsequently, a layer of dielectric material is formed within the hole, over and radially inwardly of the conductive material. A second conductive material is then formed within the hole over and radially inwardly of the dielectric material layer. The latter conductive material constitutes an inner conductive coaxial line component.

公开(公告)号：US20020105087A1

公开(公告)日：2002-08-08

申请号：US09778913

申请日：2001-02-08

Inventor： Leonard Forbes ,  Kie Y. Ahn

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40 ,  H01L023/053 ,  H01L023/12 ,  H01L021/4763 ,  H01L021/44

CPC classification number: H05K1/0222 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1435 ,  H01L2924/145 ,  H01L2924/15311 ,  H01L2924/157 ,  H05K1/115 ,  H05K2201/09036 ,  H05K2201/09809 ,  H05K2201/09845 ,  H01L2924/00

Abstract: The present invention provides a semiconductive substrate which includes front and back surfaces and a hole which extends through the substrate and between the front and back surfaces. The hole is defined in part by an interior wall portion and forms an outer conductive sheath. Conductive material is formed proximate at least some of the interior wall portion. Subsequently, a layer of dielectric material is formed within the hole, over and radially inwardly of the conductive material. A second conductive material is then formed within the hole over and radially inwardly of the dielectric material layer. The latter conductive material constitutes an inner conductive coaxial line component.

Abstract translation: 本发明提供一种半导体衬底，其包括前表面和后表面以及延伸穿过衬底并且在前表面和后表面之间的孔。 孔部分地由内壁部分限定并形成外导电护套。 导电材料靠近内壁部分的至少一部分形成。 随后，在孔内，导电材料的上部和内部形成介电材料层。 然后在电介质材料层的上方和径向向内的孔内形成第二导电材料。 后一导电材料构成内导电同轴线组件。

公开(公告)号：US12112992B2

公开(公告)日：2024-10-08

申请号：US18107800

申请日：2023-02-09

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31 ,  H01L21/683 ,  H01L23/29 ,  H01L23/00

CPC classification number: H01L23/3164 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L21/6836 ,  H01L23/295 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L2221/68327 ,  H01L2221/68368 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/05569 ,  H01L2224/13024 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10254 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335

Abstract: A package includes: an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer, the semiconductor die having an active area with monolithically integrated circuit elements; and an encapsulant encapsulating the dielectric layer and the semiconductor die. The encapsulant is a mold compound having different material properties than the dielectric layer. A method of manufacturing package is also described.