公开(公告)号：US20100264552A1

公开(公告)日：2010-10-21

申请号：US12673409

申请日：2008-08-08

申请人： Mayumi Nakasato ,  Ryosuke Usui ,  Yasunori Inoue ,  Kiyoshi Shibata

发明人： Mayumi Nakasato ,  Ryosuke Usui ,  Yasunori Inoue ,  Kiyoshi Shibata

IPC分类号： H01L23/488 ,  H01L21/60 ,  H01L21/56 ,  H05K1/00 ,  H05K1/11

CPC分类号： H01L23/145 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L29/0657 ,  H01L2221/68345 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13021 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81136 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K1/0366 ,  H05K1/0373 ,  H05K1/113 ,  H05K3/002 ,  H05K3/305 ,  H05K3/4007 ,  H05K2201/0209 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09563 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/1152 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2224/05599

摘要： A circuit device includes an insulating base provided with a resin layer mixed with a fibrous filler, bumps provided in the insulating base and functioning as electrodes for connection, a semiconductor device that is flip-chip mounted, and an underfill filling a gap between the semiconductor device and the insulating base. By allowing the fibrous filler projecting through the top surface of the resin layer to be in contact with the underfill, strength of adhesion between the underfill and the insulating base is improved.

摘要翻译： 电路装置包括：绝缘基体，设置有与纤维填料混合的树脂层，设置在绝缘基底中的凸起，用作连接用电极，倒装芯片安装的半导体器件，以及填充半导体之间的间隙的底部填充物 设备和绝缘基座。 通过使通过树脂层的上表面突出的纤维状填料与底部填充剂接触，提高了底部填充剂和绝缘基材之间的粘合强度。

公开(公告)号：US20100207270A1

公开(公告)日：2010-08-19

申请号：US12679595

申请日：2008-09-25

申请人： Yasuyuki Yanase ,  Yoshio Okayama ,  Ryosuke Usui

发明人： Yasuyuki Yanase ,  Yoshio Okayama ,  Ryosuke Usui

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/11 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02333 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2924/00

摘要： A semiconductor module is of a structure such that a wiring layer, an insulating resin layer and a semiconductor device are stacked in this order by bonding them together with compression. In the wiring layer, bump electrodes each having a base and a tip portion are provided in positions corresponding respectively to device electrodes of the semiconductor device. The bump electrodes penetrate the insulating resin layer and are electrically coupled to the corresponding device electrodes.

摘要翻译： 半导体模块具有这样的结构，使得布线层，绝缘树脂层和半导体器件通过将它们压缩在一起而依次堆叠。 在布线层中，各自具有基底和尖端部分的凸起电极设置在分别对应于半导体器件的器件电极的位置。 凸块电极穿透绝缘树脂层并电耦合到相应的器件电极。

公开(公告)号：US20090321119A1

公开(公告)日：2009-12-31

申请号：US12495028

申请日：2009-06-30

申请人： Yasuhiro Kohara ,  Ryosuke Usui ,  Yasunori Inoue

发明人： Yasuhiro Kohara ,  Ryosuke Usui ,  Yasunori Inoue

IPC分类号： H05K1/18 ,  H05K1/11

CPC分类号： H05K3/4652 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K1/0313 ,  H05K3/0029 ,  H05K3/0041 ,  H05K3/386 ,  H05K3/426 ,  H05K3/4655 ,  H05K3/4688 ,  H05K2201/0195 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2203/0554 ,  H01L2924/00014

摘要： A device mounting board is provided with: a substrate structural unit including a substrate made of a composition containing amorphous silicon, a first adhesive layer provided on one of the main surfaces of the substrate, and a second adhesive layer provided on the other main surface of the substrate; a first wiring layer provided on the main surface of the first adhesive layer on the opposite side from the substrate; a second wiring layer provided on the main surface of the second adhesive layer on the opposite side from the substrate; and a via conductor, which is provided in a via hole that penetrates the substrate, the first adhesive layer, and the second adhesive layer, which electrically connects the first wiring layer and the second wiring layer.

摘要翻译： 一种器件安装板设置有：衬底结构单元，包括由包含非晶硅的组合物制成的衬底，设置在衬底的一个主表面上的第一粘合层和设置在衬底的另一个主表面上的第二粘合层 基材; 第一布线层，设置在与基板相反一侧的第一粘合剂层的主表面上; 第二布线层，设置在所述第二粘合层的与所述基板相反的一侧的所述主表面上; 以及通孔导体，其设置在贯通基板的通孔中，第一粘合层和第二粘合层，其电连接第一布线层和第二布线层。

公开(公告)号：US20090304910A1

公开(公告)日：2009-12-10

申请号：US12541407

申请日：2009-08-14

申请人： Masayuki Nagamatsu ,  Ryosuke Usui

发明人： Masayuki Nagamatsu ,  Ryosuke Usui

IPC分类号： H05K3/00 ,  C25D5/02

CPC分类号： H05K1/111 ,  H01L23/295 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48464 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/181 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/383 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/0542 ,  Y02P70/611 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0401

摘要： An advantage of the present invention is to suppress moisture infiltrating from a pad electrode portion from spreading over the surface of a wiring pattern and improve the reliability of a packaging board. The wiring pattern of the packaging board is formed on an insulating substrate and includes a wiring region, an electrode region (pad electrode) connected with a semiconductor device, and a boundary region provided between the wiring region and the electrode region. A gold plating layer is provided on the surface of the electrode region of the wiring pattern. The top surface of the boundary region of the wiring pattern is so formed as to be dented from the top surface of the wiring region of the wiring pattern, and there is provided a stepped portion in the boundary region. A solder resist is formed in such a manner as to cover part of the gold plating layer and the wiring pattern corresponding to the boundary region and the wiring region, and the solder resist has a predetermined opening through which to connect to the semiconductor device. A conductive member is connected to the gold plating layer in the electrode region, and a molded resin layer seals the entire semiconductor module.

摘要翻译： 本发明的优点是抑制从焊盘电极部分渗透的湿气在布线图案的表面上扩散，并提高包装板的可靠性。 包装板的布线图案形成在绝缘基板上，并且包括布线区域，与半导体器件连接的电极区域（焊盘电极）以及设置在布线区域和电极区域之间的边界区域。 在布线图案的电极区域的表面上设置镀金层。 布线图案的边界区域的顶表面被形成为从布线图案的布线区域的顶表面凹陷，并且在边界区域中设置有台阶部分。 形成阻焊层，以覆盖与边界区域和布线区域相对应的金镀层和布线图案的一部分，阻焊剂具有与半导体器件连接的预定开口。 导电构件连接到电极区域中的镀金层，并且模制树脂层密封整个半导体模块。

公开(公告)号：US20090250251A1

公开(公告)日：2009-10-08

申请号：US12085822

申请日：2006-11-30

申请人： Kiyoshi Shibata ,  Ryosuke Usui ,  Yasunori Inoue

发明人： Kiyoshi Shibata ,  Ryosuke Usui ,  Yasunori Inoue

IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K3/32

CPC分类号： H01L23/3114 ,  H01L21/4832 ,  H01L21/563 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/544 ,  H01L24/11 ,  H01L24/12 ,  H01L24/29 ,  H01L2221/68377 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/02313 ,  H01L2224/02319 ,  H01L2224/02351 ,  H01L2224/0401 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/83101 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49144 ,  H01L2924/00

摘要： In a circuit device where a wiring layer, an insulating resin and a circuit element are stacked together in such a manner as to embed a bump structure into the insulating resin, the connection reliability between the bump structure and the circuit element is enhanced.A circuit device (10) has a structure where a wiring layer (20), an insulating resin layer (30) and a circuit element (40) are stacked in this order by a pressure bonding. The wiring layer (20) is provided with bump electrodes (22) in positions that correspond respectively to element electrodes of a circuit element (40). The insulating resin layer (30) is formed of a material that develops plastic flow when pressurized. The bump electrode (22) penetrates the insulating resin layer (30) and is electrically connected to a corresponding element electrode (42).

摘要翻译： 在布线层，绝缘树脂和电路元件以将凸块结构嵌入绝缘树脂的方式堆叠在一起的电路装置中，凸块结构和电路元件之间的连接可靠性提高。 电路装置（10）具有通过压接而依次堆叠布线层（20），绝缘树脂层（30）和电路元件（40）的结构。 布线层（20）在分别对应于电路元件（40）的元件电极的位置处设置有凸块电极（22）。 绝缘树脂层（30）由加压时产生塑性流动的材料形成。 突起电极（22）穿透绝缘树脂层（30）并与相应的元件电极（42）电连接。

公开(公告)号：US20070230078A1

公开(公告)日：2007-10-04

申请号：US11693316

申请日：2007-03-29

申请人： Shin-ya Nakano ,  Yoh Takano ,  Tetsuro Sawai ,  Ryosuke Usui

发明人： Shin-ya Nakano ,  Yoh Takano ,  Tetsuro Sawai ,  Ryosuke Usui

IPC分类号： H02H5/04

CPC分类号： H01L23/142 ,  H01L23/3737 ,  H01L23/467 ,  H01L23/498 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0203 ,  H05K1/0265 ,  H05K3/06 ,  H05K3/202 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/10969 ,  H05K2203/0369 ,  H05K2203/049 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A circuit device includes a metal substrate; and a plurality of circuit elements, mounted on the metal substrate, which electrically connects to the metal substrate. The metal substrate is made of a copper plate of high thermal conductivity. The metal substrate is demarcated into a plurality of sections by insulating films added with a filler for enhancing the thermal conductivity in resin. The circuit elements, which have respective independent operating potentials on a side of the metal substrate of the circuit elements, are respectively provided on separated copper plates.

摘要翻译： 电路装置包括金属基板; 以及多个电路元件，安装在与金属基板电连接的金属基板上。 金属基板由具有高导热性的铜板制成。 通过添加有填充剂的绝缘膜将金属基板划分为多个部分，以提高树脂中的导热性。 在电路元件的金属基板的一侧具有各自的独立工作电位的电路元件分别设置在分离的铜板上。

公开(公告)号：US20060043606A1

公开(公告)日：2006-03-02

申请号：US11215121

申请日：2005-08-31

申请人： Toshikazu Imaoka ,  Ryosuke Usui

发明人： Toshikazu Imaoka ,  Ryosuke Usui

IPC分类号： H01L23/48

CPC分类号： H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/82 ,  H01L25/0652 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24145 ,  H01L2224/24195 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H05K1/183 ,  H05K1/185 ,  H05K3/284 ,  H05K3/4644 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A technique for reducing the size of a semiconductor device is provided. A semiconductor device comprises a base, a semiconductor chip, a chip component, an insulating base, a wiring pattern, a via plug, an external lead-out electrode, a recess, and a resin. The insulating base has a multi-layer structure formed by laminating a plurality of insulator films. The semiconductor chip and the chip component are mounted on the base and embedded in the insulating base. A recess is formed on the surface of the semiconductor device and reaches down to any of wiring conductor layers. The semiconductor chip and the chip component are mounted on the recess.

摘要翻译： 提供了一种用于减小半导体器件的尺寸的技术。 半导体器件包括基底，半导体芯片，芯片部件，绝缘基底，布线图案，通孔塞，外部引出电极，凹部和树脂。 绝缘基底具有通过层叠多个绝缘膜形成的多层结构。 半导体芯片和芯片组件安装在基座上并嵌入绝缘基座中。 在半导体器件的表面上形成凹部，并且到达布线导体层中的任何一个。 半导体芯片和芯片组件安装在凹槽上。

公开(公告)号：US20050067712A1

公开(公告)日：2005-03-31

申请号：US10951214

申请日：2004-09-27

申请人： Toshikazu Imaoka ,  Ryosuke Usui ,  Atsushi Nakano ,  Atsushi Kato

发明人： Toshikazu Imaoka ,  Ryosuke Usui ,  Atsushi Nakano ,  Atsushi Kato

IPC分类号： H01L23/12 ,  H01L23/498 ,  H01L23/48

CPC分类号： H01L23/49827 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/48 ,  H01L2224/48237 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor apparatus includes a first conductive film and a second conductive film provided on respective sides of an insulating resin film. A circuit element is mounted on the second conductive film. The circuit element is electrically connected to the second conductive film. The second conductive film is provided to cover a via plug. The via plug is tapered with a progressively smaller diameter toward the second conductive film and away from the first conductive film.

摘要翻译： 半导体装置包括设置在绝缘树脂膜的两侧的第一导电膜和第二导电膜。 电路元件安装在第二导电膜上。 电路元件电连接到第二导电膜。 第二导电膜被设置成覆盖通孔塞。 通孔塞逐渐变细，朝向第二导电膜逐渐变小，并远离第一导电膜。

公开(公告)号：US08476776B2

公开(公告)日：2013-07-02

申请号：US12935854

申请日：2009-03-18

申请人： Ryosuke Usui ,  Yasunori Inoue ,  Mayumi Nakasato ,  Katsumi Ito

发明人： Ryosuke Usui ,  Yasunori Inoue ,  Mayumi Nakasato ,  Katsumi Ito

IPC分类号： H01L23/28 ,  H01L23/29

CPC分类号： H01L23/3107 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68336 ,  H01L2224/02379 ,  H01L2224/03436 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/215 ,  H01L2224/221 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor module manufacturing method includes a step of bonding a semiconductor wafer, which has a plurality of semiconductor elements each of which has an element electrode formed thereon, on an expansible first insulating resin layer; a step of dicing the semiconductor wafer; a step of expanding the first insulating resin layer to widen a gap between semiconductor elements; a pressure-bonding step of pressure-bonding a metal plate whereupon an electrode is arranged and the semiconductor elements with the widened gaps in between, by having a second insulating resin layer in between, and electrically connecting the electrode and the element electrodes; a step of forming a wiring layer which corresponds to each semiconductor element by selectively removing the metal plate and forming a plurality of semiconductor modules connected by the first insulating resin layer and the second insulating resin layer; and a step of separating the semiconductor modules by cutting the first insulating resin layer and the second insulating resin layer.

摘要翻译： 一种半导体模块的制造方法，其特征在于，在可扩展的第一绝缘树脂层上粘接具有形成有元件电极的多个半导体元件的半导体晶片的工序; 切割半导体晶片的步骤; 扩大第一绝缘树脂层以扩大半导体元件之间的间隙的步骤; 通过在其间具有第二绝缘树脂层，并且电连接所述电极和所述元件电极，对金属板进行压接，由此布置电极和其间具有加宽的间隙的半导体元件的压接步骤; 通过选择性地去除所述金属板并形成由所述第一绝缘树脂层和所述第二绝缘树脂层连接的多个半导体模块，形成对应于每个半导体元件的布线层的步骤; 以及通过切割第一绝缘树脂层和第二绝缘树脂层来分离半导体模块的步骤。

公开(公告)号：US08304289B2

公开(公告)日：2012-11-06

申请号：US12603122

申请日：2009-10-21

申请人： Ryosuke Usui ,  Yasunori Inoue

发明人： Ryosuke Usui ,  Yasunori Inoue

IPC分类号： H01L21/98

CPC分类号： H01L24/85 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/96 ,  H01L24/97 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/24195 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73267 ,  H01L2224/82001 ,  H01L2224/85001 ,  H01L2224/85203 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2224/85 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012

摘要： Multiple semiconductor device components and passive device components fixed to a substrate are embedded within an electroconductive-film/insulating-resin-film structure, and are thermally bonded to an insulating resin film.

摘要翻译： 固定在基板上的多个半导体器件部件和无源器件部件被嵌入到导电膜/绝缘树脂膜结构内，并且被热粘合到绝缘树脂膜上。