公开(公告)号：US08970032B2

公开(公告)日：2015-03-03

申请号：US13239059

申请日：2011-09-21

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Martin Standing

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Martin Standing

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/492

CPC分类号： H01L23/49562 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/492 ,  H01L23/49517 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00

摘要： The chip module includes a semiconductor chip having a first contact element on a first main face and a second contact element on a second main face. The semiconductor chip is arranged on a corner in such a way that the first main face of the semiconductor chip faces the carrier. One or more electrical connectors are connected to the carrier and include end faces located in a plane above a plane of the second main face of the semiconductor chip.

摘要翻译： 芯片模块包括半导体芯片，其具有在第一主面上的第一接触元件和第二主面上的第二接触元件。 半导体芯片布置在拐角处，使得半导体芯片的第一主面面向载体。 一个或多个电连接器连接到载体并且包括位于半导体芯片的第二主面的平面上方的平面中的端面。

公开(公告)号：US08871630B2

公开(公告)日：2014-10-28

申请号：US13555614

申请日：2012-07-23

申请人： Ralf Otremba ,  Josef Hoeglauer

发明人： Ralf Otremba ,  Josef Hoeglauer

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/495 ,  H01L23/31 ,  H05K3/34 ,  H01L21/56 ,  H01L23/00 ,  H05K3/30

CPC分类号： H01L23/49551 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/18 ,  H01L24/19 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/18 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48871 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/305 ,  H05K3/3442 ,  H05K3/3468 ,  H05K2201/10727 ,  H05K2203/0465 ,  Y02P70/613 ,  H01L2224/82 ,  H01L2924/01026 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2224/48744 ,  H01L2224/48771 ,  H01L2224/48671 ,  H01L2924/00012

摘要： An electronic device and manufacturing thereof. One embodiment provides a carrier and multiple contact elements. The carrier defines a first plane. A power semiconductor chip is attached to the carrier. A body is formed of an electrically insulating material covering the power semiconductor chip. The body defines a second plane parallel to the first plane and side faces extends from the first plane to the second plane. At least one of the multiple contact elements has a cross section in a direction orthogonal to the first plane that is longer than 60% of the distance between the first plane and the second plane.

摘要翻译： 电子设备及其制造。 一个实施例提供载体和多个接触元件。 载体定义第一平面。 功率半导体芯片附着在载体上。 主体由覆盖功率半导体芯片的电绝缘材料形成。 主体限定平行于第一平面的第二平面，侧面从第一平面延伸到第二平面。 多个接触元件中的至少一个在与第一平面正交的方向上具有长于第一平面和第二平面之间的距离的60％的横截面。

公开(公告)号：US20130313712A1

公开(公告)日：2013-11-28

申请号：US13481630

申请日：2012-05-25

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Juergen Schredl

IPC分类号： H01L25/065 ,  H01L21/60

CPC分类号： H01L23/49861 ,  H01L23/538 ,  H01L23/5385 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/115 ,  H01L25/18 ,  H01L2224/37147 ,  H01L2224/40137 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48464 ,  H01L2224/73253 ,  H01L2224/73255 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2924/01033

摘要： A multi-chip package comprises a first chip accommodated in a first housing and a second chip accommodated in a second housing. The first housing and the second housing are arranged in a laterally spaced-apart relationship defining a gap between the first housing and the second housing. An interconnecting structure is configured to span the gap and to electrically couple the first chip and the second chip.

摘要翻译： 多芯片封装包括容纳在第一壳体中的第一芯片和容纳在第二壳体中的第二芯片。 第一壳体和第二壳体以横向间隔开的关系布置，限定第一壳体和第二壳体之间的间隙。 互连结构被配置为跨越间隙并且电耦合第一芯片和第二芯片。

公开(公告)号：US20130200532A1

公开(公告)日：2013-08-08

申请号：US13369059

申请日：2012-02-08

申请人： Ralf Otremba ,  Fong Lim ,  Abdul Rahman Mohamed ,  Chooi Mei Chong ,  Ida Fischbach ,  Xaver Schloegel ,  Juergen Schredl ,  Josef Hoeglauer

发明人： Ralf Otremba ,  Fong Lim ,  Abdul Rahman Mohamed ,  Chooi Mei Chong ,  Ida Fischbach ,  Xaver Schloegel ,  Juergen Schredl ,  Josef Hoeglauer

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L23/49562 ,  H01L23/49524 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/95 ,  H01L2224/04026 ,  H01L2224/05553 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/0603 ,  H01L2224/2732 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/32058 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/33181 ,  H01L2224/3512 ,  H01L2224/352 ,  H01L2224/37099 ,  H01L2224/37111 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37155 ,  H01L2224/37164 ,  H01L2224/37169 ,  H01L2224/37572 ,  H01L2224/376 ,  H01L2224/37639 ,  H01L2224/37644 ,  H01L2224/37647 ,  H01L2224/37655 ,  H01L2224/37664 ,  H01L2224/37669 ,  H01L2224/40095 ,  H01L2224/40101 ,  H01L2224/40175 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/40491 ,  H01L2224/73253 ,  H01L2224/73263 ,  H01L2224/77272 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83801 ,  H01L2224/83825 ,  H01L2224/84439 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84455 ,  H01L2224/84464 ,  H01L2224/84469 ,  H01L2224/84801 ,  H01L2224/84825 ,  H01L2224/9221 ,  H01L2224/92246 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/00012 ,  H01L2224/37599

摘要： A method includes providing a semiconductor chip having a first main surface and a second main surface. A semiconductor chip is placed on a carrier with the first main surface of the semiconductor chip facing the carrier. A first layer of solder material is provided between the first main surface and the carrier. A contact clip including a first contact area is placed on the semiconductor chip with the first contact area facing the second main surface of the semiconductor chip. A second layer of solder material is provided between the first contact area and the second main surface. Thereafter, heat is applied to the first and second layers of solder material to form diffusion solder bonds between the carrier, the semiconductor chip and the contact clip.

摘要翻译： 一种方法包括提供具有第一主表面和第二主表面的半导体芯片。 将半导体芯片放置在载体上，其中半导体芯片的第一主表面面向载体。 第一层焊料材料设置在第一主表面和载体之间。 包括第一接触区域的接触夹子被放置在半导体芯片上，其中第一接触区域面对半导体芯片的第二主表面。 第二层焊料材料设置在第一接触区域和第二主表面之间。 此后，将热量施加到第一和第二层焊料材料，以在载体，半导体芯片和接触夹之间形成扩散焊料接合​​。

公开(公告)号：US20130146991A1

公开(公告)日：2013-06-13

申请号：US13314438

申请日：2011-12-08

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Joachim Mahler ,  Johannes Lodermeyer

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Joachim Mahler ,  Johannes Lodermeyer

IPC分类号： H01L25/07 ,  H01L21/60 ,  H01L23/538

CPC分类号： H01L25/50 ,  H01L21/4857 ,  H01L21/568 ,  H01L21/76897 ,  H01L23/3107 ,  H01L23/492 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L25/071 ,  H01L25/072 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/24105 ,  H01L2224/24135 ,  H01L2224/245 ,  H01L2224/40105 ,  H01L2224/40227 ,  H01L2224/73209 ,  H01L2224/73267 ,  H01L2224/82106 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2224/84 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/05552

摘要： A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.

公开(公告)号：US08334586B2

公开(公告)日：2012-12-18

申请号：US13110372

申请日：2011-05-18

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Xaver Schloegel ,  Soon Hock Tong ,  Kwai Hong Wong

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Xaver Schloegel ,  Soon Hock Tong ,  Kwai Hong Wong

IPC分类号： H01L23/02 ,  H01L23/495

CPC分类号： H01L24/19 ,  H01L21/561 ,  H01L23/3121 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L25/074 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/83851 ,  H01L2224/97 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/0781 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/29075

摘要： Stacked semiconductor chips. One embodiment provides a device having a first body. A first power semiconductor chip and first external contact elements is provides. A second body includes a second semiconductor chip and second external contact elements. The second body is placed over the first body. The first external contact elements and the second external contact elements define a first plane.

摘要翻译： 堆叠的半导体芯片。 一个实施例提供了具有第一主体的装置。 提供第一功率半导体芯片和第一外部接触元件。 第二主体包括第二半导体芯片和第二外部接触元件。 第二个身体放置在第一个身体上。 第一外部接触元件和第二外部接触元件限定第一平面。

公开(公告)号：US08084816B2

公开(公告)日：2011-12-27

申请号：US12403000

申请日：2009-03-12

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

IPC分类号： H01L23/48 ,  H01L29/78

CPC分类号： H01L23/3107 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L2221/68359 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/76155 ,  H01L2224/82005 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor module is disclosed. One embodiment provides a first semiconductor chip having a first contact pad on a first main surface and a second contact pad on a second main surface, a first electrically conductive layer applied to the first main surface, a second electrically conductive layer applied to the second main surface, and an electrically insulating material covering the first electrically conductive layer, wherein a surface of the second electrically conductive layer forms an external contact pad and the second electrically conductive layer has a thickness of less than 200 μm.

公开(公告)号：US07807504B2

公开(公告)日：2010-10-05

申请号：US12408129

申请日：2009-03-20

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Klaus Schiess

IPC分类号： H01L21/00

CPC分类号： H01L23/3107 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L2221/68359 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/76155 ,  H01L2224/82005 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor module is disclosed. One embodiment provides a first semiconductor chip having a first contact pad on a first main surface and a second contact pad on a second main surface, a first electrically conductive layer applied to the first main surface, a second electrically conductive layer applied to the second main surface, and an electrically insulating material covering the first electrically conductive layer, wherein a surface of the second electrically conductive layer forms an external contact pad and the second electrically conductive layer has a thickness of less than 200 μm.

摘要翻译： 公开了一种半导体模块。 一个实施例提供了第一半导体芯片，其具有在第一主表面上的第一接触焊盘和在第二主表面上的第二接触焊盘，施加到第一主表面的第一导电层，施加到第二主表面的第二导电层 表面和覆盖第一导电层的电绝缘材料，其中第二导电层的表面形成外部接触焊盘，第二导电层具有小于200μm的厚度。

公开(公告)号：US07772693B2

公开(公告)日：2010-08-10

申请号：US11677774

申请日：2007-02-22

申请人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

发明人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

IPC分类号： H01L23/34

CPC分类号： H01L23/552 ,  H01L23/3114 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099

摘要： A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.

摘要翻译： 面板具有具有上部第一金属层和多个垂直半导体部件的基板。 每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。 半导体部件的第二面分别安装在基板的金属层上。 半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。 第二金属层布置在半导体部件之间的分离区域中。

公开(公告)号：US20100013106A1

公开(公告)日：2010-01-21

申请号：US12173444

申请日：2008-07-15

申请人： Ralf Otremba ,  Josef Hoeglauer ,  Xaver Schloegel ,  Soon Hock Tong ,  Kwai Hong Wong

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Xaver Schloegel ,  Soon Hock Tong ,  Kwai Hong Wong

IPC分类号： H01L21/58 ,  H01L23/00 ,  H05K7/06

CPC分类号： H01L24/19 ,  H01L21/561 ,  H01L23/3121 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L25/074 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/83825 ,  H01L2224/83851 ,  H01L2224/97 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/0781 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/29075

摘要： Stacked semiconductor chips. One embodiment provides a device having a first body. A first power semiconductor chip and first external contact elements is provides. A second body includes a second semiconductor chip and second external contact elements. The second body is placed over the first body. The first external contact elements and the second external contact elements define a first plane.

摘要翻译： 堆叠的半导体芯片。 一个实施例提供了具有第一主体的装置。 提供第一功率半导体芯片和第一外部接触元件。 第二主体包括第二半导体芯片和第二外部接触元件。 第二个身体放置在第一个身体上。 第一外部接触元件和第二外部接触元件限定第一平面。