公开(公告)号：US09000600B2

公开(公告)日：2015-04-07

申请号：US14204860

申请日：2014-03-11

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Kishor V. Desai ,  Huailiang Wei ,  Craig Mitchell ,  Belgacem Haba

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L23/00 ,  H01L23/14 ,  H01L23/498

CPC classification number: H01L23/34 ,  H01L21/76841 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/32105 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/81805

Abstract: A component can include a substrate and a conductive via extending within an opening in the substrate. The substrate can have first and second opposing surfaces. The opening can extend from the first surface towards the second surface and can have an inner wall extending away from the first surface. A dielectric material can be exposed at the inner wall. The conductive via can define a relief channel within the opening adjacent the first surface. The relief channel can have an edge within a first distance from the inner wall in a direction of a plane parallel to and within five microns below the first surface, the first distance being the lesser of one micron and five percent of a maximum width of the opening in the plane. The edge can extend along the inner wall to span at least five percent of a circumference of the inner wall.

Abstract translation: 部件可以包括在基板的开口内延伸的基板和导电通孔。 基底可以具有第一和第二相对表面。 开口可以从第一表面延伸到第二表面，并且可以具有远离第一表面延伸的内壁。 电介质材料可以在内壁暴露。 导电通孔可以在邻近第一表面的开口内限定释放通道。 释放通道可以具有在与第一表面平行且在五微米以内的平面的方向上离内壁的第一距离内的边缘，第一距离是最小宽度的一微米和百分之五的最小宽度 在飞机上开了 边缘可以沿着内壁延伸以跨越内壁的圆周的至少百分之五。

公开(公告)号：US20140376200A1

公开(公告)日：2014-12-25

申请号：US13924002

申请日：2013-06-21

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman ,  Terrence Caskey

IPC: H05K3/30 ,  H05K1/18

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L23/564 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/10145 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/1319 ,  H01L2224/14517 ,  H01L2224/1601 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16104 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16503 ,  H01L2224/17505 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81007 ,  H01L2224/811 ,  H01L2224/81139 ,  H01L2224/8192 ,  H01L2224/83104 ,  H01L2224/9201 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00014 ,  H05K1/181 ,  H05K3/30 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2224/05552

Abstract: Microelectronic assemblies and methods for making the same are disclosed herein. In one embodiment, a method of forming a microelectronic assembly comprises assembling first and second components to have first major surfaces of the first and second components facing one another and spaced apart from one another by a predetermined spacing, the first component having first and second oppositely-facing major surfaces, a first thickness extending in a first direction between the first and second major surfaces, and a plurality of first metal connection elements at the first major surface, the second component having a plurality of second metal connection elements at the first major surface of the second component; and plating a plurality of metal connector regions each connecting and extending continuously between a respective first connection element and a corresponding second connection element opposite the respective first connection element in the first direction.

Abstract translation: 本文公开了微电子组件及其制造方法。 在一个实施例中，形成微电子组件的方法包括组装第一和第二部件以使第一和第二部件的第一主表面彼此面对并且彼此隔开预定间隔，第一部件具有第一和第二相对 主表面，在第一和第二主表面之间沿第一方向延伸的第一厚度和在第一主表面处的多个第一金属连接元件，第二部件在第一主要部分具有多个第二金属连接元件 第二部件的表面; 以及电镀多个金属连接器区域，每个金属连接器区域在第一方向上在相应的第一连接元件和与相应的第一连接元件相对的相应的第二连接元件之间连续延伸。

公开(公告)号：US20140339702A1

公开(公告)日：2014-11-20

申请号：US13897956

申请日：2013-05-20

Applicant: INVENSAS CORPORATION

Inventor： Charles G. Woychik ,  Cyprian Emeka Uzoh ,  Michael Newman ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L21/76877 ,  H01L21/32055 ,  H01L21/76802 ,  H01L21/76841 ,  H01L21/76858 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L23/525 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Structures and methods of forming the same are disclosed herein. In one embodiment, a structure can comprise a region having first and second oppositely facing surfaces. A barrier region can overlie the region. An alloy region can overlie the barrier region. The alloy region can include a first metal and one or more elements selected from the group consisting of silicon (Si), germanium (Ge), indium (Id), boron (B), arsenic (As), antimony (Sb), tellurium (Te), or cadmium (Cd).

Abstract translation: 本文公开了其形成的结构和方法。 在一个实施例中，结构可以包括具有第一和第二相对面的表面的区域。 屏障区域可以覆盖该区域。 合金区域可以覆盖阻挡区域。 合金区域可以包括第一金属和选自硅（Si），锗（Ge），铟（Id），硼（B），砷（As），锑（Sb），碲的一种或多种元素 （Te）或镉（Cd）。

公开(公告)号：US20140268491A1

公开(公告)日：2014-09-18

申请号：US13797540

申请日：2013-03-12

Applicant: INVENSAS CORPORATION

Inventor： Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC: H01G4/08

CPC classification number: H01G4/33 ,  H01G4/01 ,  H01G4/08 ,  H01G4/10 ,  H01G4/385 ,  H01L28/60 ,  H01L28/92 ,  H01M4/80

Abstract: Capacitors and methods of making the same are disclosed herein. In one embodiment, a capacitor comprises a structure having first and second oppositely facing surfaces and a plurality of pores each extending in a first direction from the first surface towards the second surface, and each having pore having insulating material extending along a wall of the pore; a first conductive portion comprising an electrically conductive material extending within at least some of the pores; and a second conductive portion comprising a region of the structure consisting essentially of aluminum surrounding individual pores of the plurality of pores, the second conductive portion electrically isolated from the first conductive portion by the insulating material extending along the walls of the pores.

Abstract translation: 电容器及其制造方法在此公开。 在一个实施例中，电容器包括具有第一和第二相对面的表面和多个孔，每个孔从第一表面朝向第二表面沿第一方向延伸，并且每个孔具有沿孔的壁延伸的绝缘材料 ; 第一导电部分，包括在至少一些孔内延伸的导电材料; 以及第二导电部分，其包括主要由围绕所述多个孔的单个孔的铝构成的结构的区域，所述第二导电部分通过沿着所述孔的壁延伸的绝缘材料与所述第一导电部分电隔离。

公开(公告)号：US20140217607A1

公开(公告)日：2014-08-07

申请号：US14204860

申请日：2014-03-11

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Kishor V. Desai ,  Huailiang Wei ,  Craig Mitchell ,  Belgacem Haba

IPC: H01L23/48

CPC classification number: H01L23/34 ,  H01L21/76841 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/32105 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/81805

Abstract: A component can include a substrate and a conductive via extending within an opening in the substrate. The substrate can have first and second opposing surfaces. The opening can extend from the first surface towards the second surface and can have an inner wall extending away from the first surface. A dielectric material can be exposed at the inner wall. The conductive via can define a relief channel within the opening adjacent the first surface. The relief channel can have an edge within a first distance from the inner wall in a direction of a plane parallel to and within five microns below the first surface, the first distance being the lesser of one micron and five percent of a maximum width of the opening in the plane. The edge can extend along the inner wall to span at least five percent of a circumference of the inner wall.

Abstract translation: 部件可以包括在基板的开口内延伸的基板和导电通孔。 基底可以具有第一和第二相对表面。 开口可以从第一表面延伸到第二表面，并且可以具有远离第一表面延伸的内壁。 电介质材料可以在内壁暴露。 导电通孔可以在邻近第一表面的开口内限定释放通道。 释放通道可以具有在与第一表面平行且在五微米以内的平面的方向上离内壁的第一距离内的边缘，第一距离是最小宽度的一微米和百分之五的最小宽度 在飞机上开了 边缘可以沿着内壁延伸以跨越内壁的圆周的至少百分之五。

公开(公告)号：US20140167267A1

公开(公告)日：2014-06-19

申请号：US13720346

申请日：2012-12-19

Applicant: INVENSAS CORPORATION

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Terrence Caskey ,  Fatima Lina Ayatollahi ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman

IPC: H01L23/532 ,  H01L23/488 ,  H01L21/768

CPC classification number: H01L23/49827 ,  H01L21/76829 ,  H01L21/76898 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/481 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2924/00 ,  H01L2924/0002

Abstract: A method for making an interconnect element includes depositing a thermally conductive layer on an in-process unit. The in-process unit includes a semiconductor material layer defining a surface and edges surrounding the surface, a plurality of conductive elements, each conductive element having a first portion extending through the semiconductor material layer and a second portion extending from the surface of the semiconductor material layer. Dielectric coatings extend over at least the second portion of each conductive element. The thermally conductive layer is deposited on the in-process unit at a thickness of at least 10 microns so as to overlie a portion of the surface of the semiconductor material layer between the second portions of the conductive elements with the dielectric coatings positioned between the conductive elements and the thermally conductive layer.

Abstract translation: 制造互连元件的方法包括将热传导层沉积在处理单元上。 处理单元包括限定表面和围绕表面的边缘的半导体材料层，多个导电元件，每个导电元件具有延伸穿过半导体材料层的第一部分和从半导体材料的表面延伸的第二部分 层。 电介质涂层至少延伸到每个导电元件的第二部分。 导热层以至少10微米的厚度沉积在处理单元上，以覆盖在导电元件的第二部分之间的半导体材料层的表面的一部分，其中介电涂层位于导电 元件和导热层。

公开(公告)号：US20140153210A1

公开(公告)日：2014-06-05

申请号：US13692148

申请日：2012-12-03

Applicant: INVENSAS CORPORATION

Inventor： Cyprian Emeka Uzoh

IPC: H05K1/14 ,  H05K13/04

CPC classification number: H05K13/046 ,  H01L21/4853 ,  H01L21/50 ,  H01L21/76898 ,  H01L23/10 ,  H01L23/481 ,  H01L23/49811 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H01L2224/02372 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05138 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13138 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1319 ,  H01L2224/14131 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/16501 ,  H01L2224/16505 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29138 ,  H01L2224/29147 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81075 ,  H01L2224/8112 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/83075 ,  H01L2224/8312 ,  H01L2224/83193 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2924/381 ,  H01L2924/04953 ,  H01L2924/01071 ,  H01L2924/01042 ,  H01L2924/01015 ,  H01L2924/04941 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/01031 ,  H01L2924/01034 ,  H01L2924/00012 ,  H01L2924/07025 ,  H01L2224/05552

Abstract: A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

Abstract translation: 微电子组件包括具有表面和第一导电元件的第一基板和具有表面和第二导电元件的第二基板。 组件还包括连接到第一和第二导电元件的导电合金块。 合金质量的第一和第二材料的熔点低于合金的熔点。 第一材料的浓度在朝向第一导电元件设置的位置处的相对较高的量的浓度变化到朝向第二导电元件的相对较低的量，并且第二材料的浓度在浓度上从相对较高的量在 朝向第二导电元件朝向第一导电元件朝向相对较小的量设置的位置。

公开(公告)号：US20140036454A1

公开(公告)日：2014-02-06

申请号：US13795756

申请日：2013-03-12

Applicant: INVENSAS CORPORATION

Inventor： Terrence Caskey ,  Ilyas Mohammed ,  Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Michael Newman ,  Pezhman Monadgemi ,  Reynaldo Co ,  Ellis Chau ,  Belgacem Haba

IPC: H05K1/02 ,  H05K3/46

CPC classification number: H01L25/105 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73257 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/381 ,  H05K1/0298 ,  H05K3/46 ,  Y10T29/49126 ,  Y10T29/49162 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.

Abstract translation: 制造插入件的方法包括形成结合到第一元件的一个或多个第一表面的多个引线键合。 形成电介质封装，其接触将引线接合部彼此分隔开的引线接合的边缘表面。 进一步的处理包括去除第一元件的至少一部分，其中插入件具有通过至少封装相互隔开的第一和第二相对侧，并且插入件分别在第一和第二相对侧具有第一接触和第二接触， 分别与第一和第二部件电连接，第一触点通过引线键与第二触点电连接。