公开(公告)号：US20160141218A1

公开(公告)日：2016-05-19

申请号：US14927989

申请日：2015-10-30

申请人： International Business Machines Corporation

发明人： Akihiro HORIBE ,  Sayuri HADA ,  Kuniaki SUEOKA

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/498

CPC分类号： H01L23/3157 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3178 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/94 ,  H01L29/0657 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/16227 ,  H01L2224/26145 ,  H01L2224/27002 ,  H01L2224/27013 ,  H01L2224/29082 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/83191 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/10156 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2924/00014

摘要： There is provided a circuit module where a sufficient amount of underfill resin may be supplied to corner portions of a semiconductor chip. A circuit module includes a circuit board provided with a plurality of electrode pads on a surface of the board, a semiconductor chip arranged on the board, the chip including a surface and a back surface, where each of a plurality of solder bumps and provided on the back surface is solder joined to a corresponding one of the plurality of electrode pads, and an underfill provided between the surface of the board and the back surface of the chip. Furthermore, the chip includes an eaves portion of a predetermined thickness at an outer periphery of the surface, and the underfill forms a fillet extending from a bottom surface of the eaves portion to the surface of the board along a side wall of the chip.

摘要翻译： 提供了一种电路模块，其中足够量的底部填充树脂可以被供应到半导体芯片的拐角部分。 电路模块包括电路板，该电路板在板的表面上设置有多个电极焊盘，布置在板上的半导体芯片，芯片包括表面和背面，其中多个焊料凸块中的每一个设置在 后表面是焊接到多个电极焊盘中相应的一个电极焊盘上的焊料，以及设置在板的表面和芯片的后表面之间的底部填充物。 此外，芯片包括在表面的外周具有预定厚度的檐部，底部填充物沿着芯片的侧壁形成从檐部的底面延伸到基板的表面的圆角。

公开(公告)号：US09305896B2

公开(公告)日：2016-04-05

申请号：US14525069

申请日：2014-10-27

申请人： International Business Machines Corporation

发明人： Claudius Ferger ,  Michael A. Gaynes ,  Jae-Woong Nah ,  Da-Yuan Shih

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56 ,  H01L23/544

CPC分类号： H01L24/81 ,  H01L21/463 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/743 ,  H01L24/83 ,  H01L24/92 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/1605 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2741 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/8113 ,  H01L2224/81132 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/814 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83

摘要： A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another

摘要翻译： 预组装半导体器件包括半导体芯片上的芯片焊接结构和对应于芯片焊接结构的衬底上的衬底焊接结构。 衬底焊接结构朝着芯片焊接结构延伸，以形成与芯片焊接结构的焊接连接。 芯片和衬底相对于彼此处于预组装位置。 基板焊接结构的高度大于芯片焊接结构的高度。 预先施加的底部填充物与基底相邻并且足够厚以便基本上不超过基底焊接结构的全高度延伸。 在另一个实施例中，芯片焊接结构的高度大于衬底焊接结构的高度，并且预先施加的底部填充物与半导体芯片邻接并且足够厚以便基本上不超过芯片焊接的全部高度 结构。 一种方法包括通过将芯片和衬底彼此焊接来从这些器件制造半导体组件

公开(公告)号：US20160071743A1

公开(公告)日：2016-03-10

申请号：US14941865

申请日：2015-11-16

申请人： Texas Instruments Incorporated

发明人： You Chye How ,  Maria Christina Bernardo Violante

IPC分类号： H01L21/48 ,  H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L25/18

CPC分类号： H01L21/4821 ,  H01L21/4828 ,  H01L21/565 ,  H01L21/6836 ,  H01L23/00 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/94 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/27003 ,  H01L2224/27436 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1515 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/0665 ,  H01L2224/45099 ,  H01L2224/27 ,  H01L2924/00 ,  H01L2924/0781

摘要： A method of making an integrated circuit package. A leadframe having a die attach paddle surrounded by lead portions is formed. Middle channels underlying in said die attach paddle portion in a region thereof adapted to receive a first die are formed

摘要翻译： 一种制造集成电路封装的方法。 形成具有由引线部分包围的管芯附着焊盘的引线框架。 形成在适于接收第一管芯的区域中的所述管芯附接叶片部分中的下部通道

公开(公告)号：US20160056116A1

公开(公告)日：2016-02-25

申请号：US14930984

申请日：2015-11-03

申请人： International Business Machines Corporation

发明人： Toyohiro Aoki ,  Hiroyuki Mori ,  Kazushige Toriyama

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  B23K3/0623 ,  H01L21/4867 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/34 ,  H01L23/345 ,  H01L23/481 ,  H01L23/488 ,  H01L23/49816 ,  H01L23/49894 ,  H01L23/5226 ,  H01L24/08 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/11013 ,  H01L2224/1131 ,  H01L2224/11312 ,  H01L2224/11416 ,  H01L2224/1148 ,  H01L2224/11618 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/14051 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/17519 ,  H01L2224/27 ,  H01L2224/27416 ,  H01L2224/27515 ,  H01L2224/27618 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29076 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81204 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83 ,  H01L2224/83203 ,  H01L2224/83204 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06568 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/06 ,  H01L2924/12042 ,  H01L2924/3512 ,  H01L2924/37001 ,  H01L2924/3841 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01028 ,  H01L2924/01027 ,  H01L2924/01032 ,  H01L2924/01026 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00013 ,  H01L2924/00012

摘要： A substrate bonding method is able to reliably bond substrates while avoiding a reduction in yield made worse by finer pitches. The substrate bonding method can include: forming an adhesive resin layer on a surface of a first substrate on which a pad has been formed; forming an opening on the adhesive resin layer above the pad; filling the opening with molten solder to form a pillar-shaped solder bump; and applying heat and pressure to the first substrate and a second substrate while a terminal formed on the second substrate is aligned with the solder bump.

摘要翻译： 基板接合方法能够可靠地接合基板，同时避免产率的降低，由较细的间距变差。 基板接合方法可以包括：在已经形成有焊盘的第一基板的表面上形成粘合树脂层; 在所述垫上方的所述粘合树脂层上形成开口; 用熔融焊料填充开口以形成柱状焊料凸块; 以及在形成在所述第二基板上的端子与所述焊料凸块对准的同时向所述第一基板和第二基板施加热和压力。

公开(公告)号：US09257382B2

公开(公告)日：2016-02-09

申请号：US13939044

申请日：2013-07-10

申请人： STATS ChipPAC, Ltd.

发明人： Duk Ju Na ,  Lai Yee Chia ,  Chang Beom Yong

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L21/768 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L23/49827 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/76801 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05015 ,  H01L2224/05555 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/06181 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/27002 ,  H01L2224/27005 ,  H01L2224/27312 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/01007 ,  H01L2924/0665 ,  H01L2224/81805

摘要： A semiconductor device has a plurality of conductive vias formed into a semiconductor wafer. An insulating lining is formed around the conductive vias and a conductive layer is formed over the insulating lining. A portion of the semiconductor wafer is removed so the conductive vias extend above a surface of the semiconductor wafer. A first insulating layer is formed over the surface of the semiconductor wafer and conductive vias. A first portion of the first insulating layer is removed and a second portion of the first insulating layer remains as guard rings around the conductive vias. A conductive layer is formed over the conductive vias. A second insulating layer is formed over the surface of the semiconductor wafer, guard rings, and conductive vias. A portion of the second insulating layer is removed to expose the conductive vias and a portion of the guard rings.

公开(公告)号：US20160035698A1

公开(公告)日：2016-02-04

申请号：US14719411

申请日：2015-05-22

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： CHEOL-WOO LEE ,  WAN-HO PARK

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L25/18

CPC分类号： H01L25/0652 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/24225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48476 ,  H01L2224/49113 ,  H01L2224/50 ,  H01L2224/73265 ,  H01L2224/83169 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/27

摘要： A stack package includes a substrate, a stack of semiconductor chips mounted to the substrate, a side semiconductor chip disposed on one side of the stack, and adhesive interposed between the lower surface of the side semiconductor chip and the stack of semiconductor chips and which attaches the side semiconductor chip to the stack.

摘要翻译： 堆叠封装包括衬底，安装到衬底的半导体芯片的堆叠，设置在堆叠的一侧的侧半导体芯片以及插入在侧半导体芯片的下表面和半导体芯片堆叠之间的粘合剂， 侧面半导体芯片到堆叠。

公开(公告)号：US20160035663A1

公开(公告)日：2016-02-04

申请号：US14447371

申请日：2014-07-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hui-Min Huang ,  Chih-Wei Lin ,  Tsai-Tsung Tsai ,  Ming-Da Cheng ,  Chung-Shi Liu ,  Chen-Hua Yu

IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L21/48

CPC分类号： H01L24/05 ,  H01L21/481 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/49866 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/18162 ,  H01L2224/03 ,  H01L2224/27

摘要： A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.

摘要翻译： 在第一模具和第二模具上形成第一保护层，并且在第一保护层内形成开口。 第一管芯和第二管芯被封装成使得密封剂比第一管芯和第二管芯更厚，并且通孔形成在开口内。 还可以形成再分布层以在密封剂上延伸，并且第一管芯可以与第二管芯分离。

公开(公告)号：US09252111B2

公开(公告)日：2016-02-02

申请号：US14625579

申请日：2015-02-18

申请人： Intel Corporation

发明人： Kevin J. Lee

IPC分类号： H01L23/00 ,  H01L23/538 ,  H01L25/065 ,  H01L21/768 ,  H01L21/683

CPC分类号： H01L24/11 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/6835 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/11001 ,  H01L2224/1183 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/27003 ,  H01L2224/271 ,  H01L2224/27436 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/81191 ,  H01L2224/81204 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/013 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/03 ,  H01L2224/05552 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/11848 ,  H01L21/304

摘要： A structure and method of handling a device wafer during through-silicon via (TSV) processing are described in which a device wafer is bonded to a temporary support substrate with a permanent thermosetting material. Upon removal of the temporary support substrate a planar frontside bonding surface including a reflowed solder bump and the permanent thermosetting material is exposed.

摘要翻译： 描述了在贯穿硅通孔（TSV）处理期间处理器件晶片的结构和方法，其中器件晶片通过永久性热固性材料结合到临时支撑衬底。 在移除临时支撑基板时，露出包括回流焊料凸块和永久性热固性材料的平面前沿接合表面。

公开(公告)号：US20160027694A1

公开(公告)日：2016-01-28

申请号：US14341454

申请日：2014-07-25

申请人： Semiconductor Components Industries, LLC

发明人： Darrel Truhitte ,  James P. Letterman, JR.

IPC分类号： H01L21/78 ,  H01L23/00 ,  H01L21/683 ,  H01L21/56

CPC分类号： H01L21/6835 ,  H01L21/4832 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/49537 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/95 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11418 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/116 ,  H01L2224/119 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/1319 ,  H01L2224/16245 ,  H01L2224/16258 ,  H01L2224/27003 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27418 ,  H01L2224/2746 ,  H01L2224/27462 ,  H01L2224/276 ,  H01L2224/279 ,  H01L2224/2908 ,  H01L2224/291 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/32258 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/4811 ,  H01L2224/48111 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75755 ,  H01L2224/75756 ,  H01L2224/81192 ,  H01L2224/8121 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/81856 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83805 ,  H01L2224/83815 ,  H01L2224/83856 ,  H01L2224/85005 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92147 ,  H01L2224/92227 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/27 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/207

摘要： Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.

摘要翻译： 制造半导体封装的方法。 实施方案可以包括：提供具有第一侧面，第二侧面和厚度的基底; 在所述基板的第一侧上形成多个焊盘; 以及将所述芯片附接材料施加到所述多个焊盘。 该方法可以包括在包括在每个管芯中的一个或多个管芯焊盘处将包括多个半导体管芯的晶片接合到衬底。 该方法还可以包括用多重半导体芯片分离多个半导体芯片，用包覆模塑材料包覆模制多个半导体芯片和基板的第一侧，以及移除基板以暴露多个焊盘并形成耦合在一起的多个半导体封装 通过包覆成型材料。 该方法还可以包括分离多个半导体封装以分离它们。

公开(公告)号：US20160017191A1

公开(公告)日：2016-01-21

申请号：US14423966

申请日：2014-09-10

申请人： DEXERIALS CORPORATION

发明人： Taichi KOYAMA

IPC分类号： C09J163/00 ,  H01L23/00 ,  H01L23/29 ,  C09J133/20 ,  H01L21/56

CPC分类号： C09J163/00 ,  C08G59/4215 ,  C08L63/00 ,  C09D133/066 ,  C09J133/20 ,  H01L21/563 ,  H01L21/6836 ,  H01L23/293 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68377 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/27003 ,  H01L2224/271 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29387 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81204 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83204 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/186 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/05442 ,  H01L2924/05341 ,  H01L2924/0549 ,  H01L2924/0532 ,  H01L2924/0102 ,  H01L2924/0544 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11 ,  H01L21/78 ,  C08L33/16

摘要： An underfill film material and a method for manufacturing a semiconductor device using the same which enables voidless mounting and favorable solder bonding properties are provided. An underfill material is used which contains an epoxy resin, an acid anhydride, an acrylic resin and an organic peroxide, the underfill material exhibits non-Bingham fluidity at a temperature ranging from 60° C. to 100° C., a storage modulus G′ measured by dynamic viscosity measurement has an inflection point in an angular frequency region below 10E+02 rad/s, and the storage modulus G′ in the angular frequency below the inflection point is 10E+05 Pa or more and 10E+06 Pa or less. This enables voidless packaging and excellent solder connection properties.

摘要翻译： 提供了一种底部填充膜材料及其制造方法，该半导体器件使用该半导体器件能够实现无孔安装和良好的焊接接合性能。 使用含有环氧树脂，酸酐，丙烯酸树脂和有机过氧化物的底部填充材料，底部填充材料在60℃至100℃的温度范围内显示非Bingham流动性，储能模量G 通过动态粘度测量测量，在低于10E + 02rad / s的角频率区域中具有拐点，并且在拐点以下的角频率中的储能模量G'为10E + 05Pa以上且10E + 06Pa或 减。 这使得无孔封装和优异的焊接连接性能。