公开(公告)号：US20180261467A1

公开(公告)日：2018-09-13

申请号：US15760905

申请日：2015-10-01

Applicant: Renesas Electronics Corporation

Inventor： Masahiro MATSUMOTO ,  Kazuhito ICHINOSE ,  Akira YAJIMA

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/00

Abstract: It is possible to prevent deterioration of a redistribution layer due to exposure of the redistribution layer from an upper insulating film and the resultant reaction with moisture, ions, or the like. As means thereof, in a semiconductor device having a plurality of wiring layers formed in an element formation region and having a redistribution layer connected with a pad electrode which is an uppermost wiring layer, a dummy pattern is arranged in a region closer to a scribe region than the redistribution layer.

公开(公告)号：US20170373031A1

公开(公告)日：2017-12-28

申请号：US15582277

申请日：2017-04-28

Applicant: Renesas Electronics Corporation

Inventor： Akira YAJIMA ,  Yoshiaki Yamada

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L21/311 ,  H01L21/321 ,  H01L21/56 ,  H01L23/293 ,  H01L23/3157 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/02333 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/06135 ,  H01L2224/10145 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/13021 ,  H01L2224/13024 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13163 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13686 ,  H01L2224/1369 ,  H01L2224/16112 ,  H01L2224/16237 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81411 ,  H01L2224/81815 ,  H01L2924/3512 ,  H01L2924/01029 ,  H01L2924/013 ,  H01L2924/01014 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/053

Abstract: The semiconductor device includes: a semiconductor substrate; a conductor layer formed over the semiconductor substrate and having an upper surface and a lower surface; a conductive pillar formed on the upper surface of the conductor layer and having an upper surface, a lower surface, and a sidewall; a protection film covering the upper surface of the conductor layer and having an opening which exposes the upper surface and the sidewall of the conductive pillar; and a protection film covering the sidewall of the conductive pillar. Then, in plan view, the opening of the protection film is wider than the upper surface of the conductive pillar and exposes an entire region of an upper surface of the conductive pillar.

公开(公告)号：US20160064344A1

公开(公告)日：2016-03-03

申请号：US14836688

申请日：2015-08-26

Applicant: Renesas Electronics Corporation

Inventor： Akira YAJIMA

IPC: H01L23/00

CPC classification number: H01L24/45 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/09 ,  H01L24/43 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/02317 ,  H01L2224/0235 ,  H01L2224/0237 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/04042 ,  H01L2224/05024 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/0519 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/43985 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2224/4941 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2924/01047 ,  H01L2924/13091 ,  H01L2924/00014

Abstract: The present invention makes it possible to: reduce the manufacturing cost of a semiconductor device having a redistribution layer; and further improve the reliability of a semiconductor device having a redistribution layer.A feature point of First Embodiment is that an opening and a redistribution layer gutter are formed integrally in a polyimide resin film of a single layer as shown in FIG. 5. It is thereby possible to: form a redistribution layer in the polyimide resin film of a single layer; and hence inhibit a wiring material (silver) including the redistribution layer from migrating.

Abstract translation: 本发明使得可以降低具有再分布层的半导体器件的制造成本; 进一步提高具有再分配层的半导体器件的可靠性。 第一实施例的特征在于，如图1所示，在单层的聚酰亚胺树脂膜中一体地形成开口和再分布层沟槽。 从而可以在单层的聚酰亚胺树脂膜中形成再分布层; 并且因此抑制包括再分布层的布线材料（银）的迁移。

公开(公告)号：US20130313708A1

公开(公告)日：2013-11-28

申请号：US13952596

申请日：2013-07-27

Applicant: Renesas Electronics Corporation

Inventor： Hiromi SHIGIHARA ,  Hiroshi TSUKAMOTO ,  Akira YAJIMA

IPC: H01L23/498 ,  H01L23/485

CPC classification number: H01L24/05 ,  H01L21/565 ,  H01L22/32 ,  H01L23/485 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/02205 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05173 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05558 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/06183 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29198 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/4502 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/46 ,  H01L2224/4807 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48158 ,  H01L2224/48247 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/4868 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/4878 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/4888 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85464 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01065 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/0665 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0002 ,  H01L2924/00015

Abstract: In semiconductor integrated circuit devices for vehicle use, an aluminum pad on a semiconductor chip and an external device are coupled to each other by wire bonding using a gold wire for the convenience of mounting. Such a semiconductor integrated circuit device, however, causes a connection failure due to the interaction between aluminum and gold in use for a long time at a relatively high temperature (about 150 degrees C.). A semiconductor integrated circuit device can include a semiconductor chip as a part of the device, an electrolytic gold plated surface film (gold-based metal plated film) provided over an aluminum-based bonding pad on a semiconductor chip via a barrier metal film, and a gold bonding wire (gold-based bonding wire) for interconnection between the plated surface film and an external lead provided over a wiring board (wiring substrate).

Abstract translation: 在用于车辆用途的半导体集成电路器件中，半导体芯片上的铝焊盘和外部器件通过使用金线的引线接合彼此耦合以便于安装。 然而，这样的半导体集成电路器件在相对较高的温度（约150℃）下长时间使用铝和金之间的相互作用导致连接故障。 半导体集成电路器件可以包括作为器件的一部分的半导体芯片，经由阻挡金属膜设置在半导体芯片上的铝基焊盘上的电解镀金表面膜（金基金属镀膜），以及 用于在电镀表面膜和设置在布线板（布线基板）上的外部引线之间互连的金接合线（金基接合线）。

公开(公告)号：US20180068910A1

公开(公告)日：2018-03-08

申请号：US15798369

申请日：2017-10-30

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira YAJIMA

IPC: H01L21/66 ,  G11C29/48 ,  H01L25/065 ,  H01L21/324 ,  H01L21/4763 ,  G11C29/06 ,  H01L23/00 ,  H01L23/31 ,  G11C29/56

CPC classification number: H01L22/32 ,  G11C29/06 ,  G11C29/48 ,  G11C2029/5602 ,  H01L21/324 ,  H01L21/47635 ,  H01L22/14 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/43 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/02377 ,  H01L2224/03009 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/05583 ,  H01L2224/05655 ,  H01L2224/05686 ,  H01L2224/06102 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48138 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/04941 ,  H01L2924/00014 ,  H01L2924/014

Abstract: To enhance reliability of a test by suppressing defective bonding of a solder in the test of a semiconductor device, a method of manufacturing the semiconductor device includes: preparing a semiconductor wafer that includes a first pad electrode provided with a first cap film and a second pad electrode provided with a second cap film. Further, a polyimide layer that includes a first opening on the first pad electrode and a second opening on the second pad electrode is formed, and then, a rearrangement wiring that is connected to the second pad electrode via the second opening is formed. Next, an opening is formed in the polyimide layer such that an organic reaction layer remains on each of the first pad electrode and a bump land of the rearrangement wiring, then heat processing is performed on the semiconductor wafer, and then, a bump is formed on the rearrangement wiring.

公开(公告)号：US20160163666A1

公开(公告)日：2016-06-09

申请号：US14952468

申请日：2015-11-25

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira YAJIMA ,  Seiji MURANAKA

IPC: H01L23/00

CPC classification number: H01L24/08 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/023 ,  H01L2224/02317 ,  H01L2224/024 ,  H01L2224/033 ,  H01L2224/05166 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/4807 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/49431 ,  H01L2224/85345 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/20753 ,  H01L2224/45157 ,  H01L2924/00

Abstract: To improve an integration degree of a semiconductor device.The semiconductor device includes a plurality of wiring layers formed on the semiconductor substrate, a pad electrode formed on an uppermost wiring layer among the plurality of wiring layers, a base insulating film having a pad opening above the pad electrode, and a rewiring electrically connected to the pad electrode and extending over the base insulating film. Further, the semiconductor device includes a protective film covering an upper surface of the rewiring and having an external pad opening exposing part of the upper surface of the rewiring, an external pad electrode electrically connected to the rewiring through the external pad opening and extending over the protective film, and a wire connected to the external pad electrode. Part of the external pad electrode is located in a region outside the rewiring.

Abstract translation: 提高半导体器件的集成度。 半导体器件包括形成在半导体衬底上的多个布线层，形成在多个布线层中的最上布线层上的焊盘电极，在焊盘电极上方具有焊盘开口的基底绝缘膜，以及电连接到 焊盘电极并在基底绝缘膜上延伸。 此外，半导体器件包括覆盖重新布线的上表面的保护膜，并且具有暴露重新布线的上表面的一部分的外部焊盘开口，外部焊盘电极通过外部焊盘开口电连接到重新布线并且延伸越过 保护膜和连接到外部焊盘电极的电线。 外部焊盘电极的一部分位于重新布线之外的区域中。

公开(公告)号：US20160013142A1

公开(公告)日：2016-01-14

申请号：US14792461

申请日：2015-07-06

Applicant: Renesas Electronics Corporation

Inventor： Takehiko MAEDA ,  Akira YAJIMA ,  Satoshi ITOU ,  Fumiyoshi KAWASHIRO

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/06 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05684 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48799 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01008 ,  H01L2924/01074

Abstract: An improvement is achieved in the reliability of a semiconductor device. Over a semiconductor substrate, an interlayer insulating film is formed and, over the interlayer insulating film, a pad is formed. Over the interlayer insulating film, an insulating film is formed so as to cover the pad. In the insulating film, an opening is formed to expose a part of the pad. The pad is a pad to which a copper wire is to be electrically coupled and which includes an Al-containing conductive film containing aluminum as a main component. Over the Al-containing conductive film in a region overlapping the opening in plan view, a laminated film including a barrier conductor film, and a metal film over the barrier conductor film is formed. The metal film is in an uppermost layer. The barrier conductor film is a single-layer film or a laminated film including one or more layers of films selected from the group consisting of a Ti film, a TiN film, a Ta film, a TaN film, a W film, a WN film, a TiW film, and a TaW film. The metal film is made of one or more metals selected from the group consisting of Pd, Au, Ru, Rh, Pt, and Ir.

Abstract translation: 半导体器件的可靠性得到改善。 在半导体衬底上形成层间绝缘膜，并且在层间绝缘膜上形成衬垫。 在层间绝缘膜之上，形成绝缘膜以覆盖该焊盘。 在绝缘膜中形成开口以露出垫的一部分。 焊盘是铜导线电耦合的焊盘，其包括含有铝作为主要成分的含Al导电膜。 在平面图中与开口重叠的区域中的含Al导电膜上形成包含阻挡导体膜的层叠膜和阻挡导体膜上的金属膜。 金属膜位于最上层。 阻挡导电膜是单层膜或包含选自Ti膜，TiN膜，Ta膜，TaN膜，W膜，WN膜中的一层或多层膜的层压膜 ，TiW膜和TaW膜。 金属膜由选自Pd，Au，Ru，Rh，Pt和Ir中的一种或多种金属制成。

公开(公告)号：US20180005967A1

公开(公告)日：2018-01-04

申请号：US15704024

申请日：2017-09-14

Applicant: Renesas Electronics Corporation

Inventor： Akira YAJIMA

IPC: H01L23/00

CPC classification number: H01L24/02 ,  H01L23/293 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/02315 ,  H01L2224/02331 ,  H01L2224/0236 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/04042 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05644 ,  H01L2224/4502 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2924/01029 ,  H01L2924/07025 ,  H01L2924/364 ,  H01L2924/365 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01007 ,  H01L2924/01074 ,  H01L2924/01014 ,  H01L2924/013 ,  H01L2924/00013

Abstract: Reliability of a semiconductor device is improved. A slope is provided on a side face of an interconnection trench in sectional view in an interconnection width direction of a redistribution layer. The maximum opening width of the interconnection trench in the interconnection width direction is larger than the maximum interconnection width of the redistribution layer in the interconnection width direction, and the interconnection trench is provided so as to encapsulate the redistribution layer in plan view.

公开(公告)号：US20170092609A1

公开(公告)日：2017-03-30

申请号：US15271405

申请日：2016-09-21

Applicant: Renesas Electronics Corporation

Inventor： Akira YAJIMA

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/5329 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/02331 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05664 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/13017 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14133 ,  H01L2224/14135 ,  H01L2224/14177 ,  H01L2224/14179 ,  H01L2224/14517 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/17051 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81139 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81411 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/07025 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/381 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/01022 ,  H01L2924/04941 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2924/01073 ,  H01L2924/0496 ,  H01L2924/01046 ,  H01L2924/01044 ,  H01L2924/01078 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In the semiconductor device, a bump electrode which connects a semiconductor chip and a wiring board is made up of a first part surrounded by an insulating film and a second part exposed from the insulating film. Since it is possible to reduce a width of the bump electrode while increasing a height of the bump electrode, a distance between the neighboring bump electrodes can be increased, and a filling property of a sealing material can be improved.

公开(公告)号：US20180315722A1

公开(公告)日：2018-11-01

申请号：US15937028

申请日：2018-03-27

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira YAJIMA ,  Yoshiaki YAMADA

IPC: H01L23/00 ,  H01L21/66 ,  G11C29/50

Abstract: A barrier layer BAL is formed so as to be in contact with an aluminum pad ALP. A titanium alloy layer including a titanium film and a titanium nitride film is formed as barrier layer BAL. A seed layer SED is formed so as to be in contact with barrier layer BAL. A copper film is formed as seed layer SED. A silver bump AGBP is formed so as to be in contact with seed layer SED. Silver bump AGBP is constructed with a silver film AGPL formed by an electrolytic plating method. A tin alloy ball SNB is bonded to silver bump AGBP.