公开(公告)号：US20100289127A1

公开(公告)日：2010-11-18

申请号：US12776376

申请日：2010-05-08

申请人： Takamitsu Kanazawa ,  Toshiyuki Hata

发明人： Takamitsu Kanazawa ,  Toshiyuki Hata

IPC分类号： H01L23/495

CPC分类号： H01L23/49562 ,  H01L21/4842 ,  H01L23/4006 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40137 ,  H01L2224/40245 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/85375 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18301 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01026 ,  H01L2224/05552 ,  H01L2924/00015

摘要： A semiconductor device in which the wiring resistance and parasitic inductance of a semiconductor package configuring a power semiconductor module is reduced. In the semiconductor device, a semiconductor chip with an IGBT formed therein and a diode chip are mounted over the upper surface of a die pad. An emitter pad of the semiconductor chip and an anode pad of the diode chip are coupled with a lead by an Al wire. One end of the lead is located in a higher position than the upper surface of the die pad in order to shorten the length of the Al wire for coupling the emitter pad and the lead.

摘要翻译： 其中减少了构成功率半导体模块的半导体封装的布线电阻和寄生电感的半导体器件。 在半导体器件中，其上形成有IGBT的半导体芯片和二极管芯片安装在管芯焊盘的上表面上。 半导体芯片的发射极焊盘和二极管芯片的阳极焊盘通过Al线与引线耦合。 引线的一端位于比管芯焊盘的上表面更高的位置，以缩短用于耦合发射极焊盘和引线的Al线的长度。

公开(公告)号：US07755176B1

公开(公告)日：2010-07-13

申请号：US11111316

申请日：2005-04-21

申请人： Roger D. St. Amand ,  Chang Suk Han ,  Alexander W. Copia ,  Wan Wook Ko

发明人： Roger D. St. Amand ,  Chang Suk Han ,  Alexander W. Copia ,  Wan Wook Ko

IPC分类号： H01L23/02

CPC分类号： H01L23/49838 ,  H01L23/3128 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/32057 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48699 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A die-mounting substrate and method incorporating dummy traces for improving mounting film planarity makes the use of film attach possible with a simplified manufacturing process and in applications where film-attach was not previously practical. The die-mounting substrate includes dummy traces that are generated along with signal traces extending into the die mounting area of the substrate. The dummy traces are designed according to the same design rules as the signal traces and are disposed in otherwise empty regions between signal traces and vias within the die mounting area. The result is die mounting area without regions empty of signal traces that previously either lack conductor or are filled completely with conductor, either of which will result in surface variation that compromises the film bond.

摘要翻译： 具有用于改善安装膜平面性的虚设轨迹的芯片安装基板和方法使得可以利用简化的制造工艺和薄膜附着在以前不可行的应用中使用膜附着。 管芯安装衬底包括与延伸到衬底的管芯安装区域中的信号迹线一起产生的虚拟迹线。 虚设轨迹根据与信号迹线相同的设计规则设计，并且设置在信号迹线和管芯安装区域内的通孔之间的空白区域中。 结果是裸片安装区域没有空的信号迹线，以前没有导体或完全填充导体，其中任何一个将导致表面变化，从而影响膜结合。

公开(公告)号：US20100133688A1

公开(公告)日：2010-06-03

申请号：US12628869

申请日：2009-12-01

申请人： Hiromi Shigihara ,  Hiroshi Tsukamoto ,  Akira Yajima

发明人： Hiromi Shigihara ,  Hiroshi Tsukamoto ,  Akira Yajima

IPC分类号： H01L23/488

CPC分类号： H01L24/05 ,  H01L21/565 ,  H01L22/32 ,  H01L23/485 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/12 ,  H01L24/16 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/02205 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05173 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05558 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/06183 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29198 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/4502 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/46 ,  H01L2224/4807 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48158 ,  H01L2224/48247 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/4868 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/4878 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/4888 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/85181 ,  H01L2224/85186 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85464 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/00011 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01065 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/078 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/0665 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0002 ,  H01L2924/00015

摘要： In semiconductor integrated circuit devices for vehicle use or the like, in general, an aluminum pad on a semiconductor chip and an external device are coupled to each other by wire bonding or the like using a gold wire and the like for the convenience of mounting. Such a semiconductor integrated circuit device, however, causes a connection failure due to the interaction between aluminum and gold in use for a long time at a relatively high temperature (about 150 degrees C.). The invention of the present application provides a semiconductor integrated circuit device (semiconductor device or electron circuit device) which includes a semiconductor chip as a part of the device, an electrolytic gold plated surface film (gold-based metal plated film) provided over an aluminum-based bonding pad on a semiconductor chip via a barrier metal film, and a gold bonding wire (gold-based bonding wire) for interconnection between the plated surface film and an external lead provided over a wiring board or the like (wiring substrate).

摘要翻译： 在用于车辆用途的半导体集成电路装置等中，为了便于安装，通常使用金线等通过引线接合等将半导体芯片上的铝焊盘和外部装置彼此耦合。 然而，这样的半导体集成电路器件在相对较高的温度（约150℃）下长时间使用铝和金之间的相互作用导致连接故障。 本申请的发明提供了一种半导体集成电路器件（半导体器件或电子电路器件），其包括作为器件的一部分的半导体芯片，设置在铝上的电解镀金表面膜（金基金属镀膜） 通过阻挡金属膜在半导体芯片上的金焊接焊盘和用于在电镀表面膜和设置在布线基板等上的外部引线之间互连的金键合线（金基接合线）。

公开(公告)号：US20100123246A1

公开(公告)日：2010-05-20

申请号：US12272501

申请日：2008-11-17

申请人： Hsien-Wei Chen ,  Yu-Wen Liu ,  Hao-Yi Tsai ,  Shin-Puu Jeng ,  Ying-Ju Chen

发明人： Hsien-Wei Chen ,  Yu-Wen Liu ,  Hao-Yi Tsai ,  Shin-Puu Jeng ,  Ying-Ju Chen

IPC分类号： H01L23/488

CPC分类号： H01L24/03 ,  H01L23/3192 ,  H01L23/585 ,  H01L24/05 ,  H01L24/08 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02126 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05095 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48684 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48784 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/48744

摘要： An integrated circuit structure includes a bond pad; an Mtop pad located directly underlying the bond pad; an Mtop-1 pad having at least a portion directly underlying the Mtop pad, wherein at least one of the Mtop pad and the Mtop-1 pad has a horizontal dimension smaller than a horizontal dimension of the bond pad; a plurality of vias interconnecting the Mtop pad and the Mtop-1 pad; and a bond ball on the bond pad. Each of the Mtop pad and the Mtop-1 pad has positive enclosures to the bond ball in all horizontal directions.

摘要翻译： 集成电路结构包括接合焊盘; 直接位于接合垫下面的Mtop垫; Mtop-1垫具有直接位于Mtop垫下方的至少一部分，其中Mtop垫和Mtop-1垫中的至少一个具有小于接合垫的水平尺寸的水平尺寸; 将Mtop焊盘和Mtop-1焊盘互连的多个通孔; 和粘结垫上的粘结球。 每个Mtop垫和Mtop-1垫在所有水平方向上都具有粘结球的正面外壳。

公开(公告)号：US07709946B2

公开(公告)日：2010-05-04

申请号：US11580495

申请日：2006-10-13

申请人： Ki Tae Ryu ,  Nam Young Cho ,  Yong An Kwon ,  Hee Bong Lee

发明人： Ki Tae Ryu ,  Nam Young Cho ,  Yong An Kwon ,  Hee Bong Lee

IPC分类号： H01L23/52 ,  H01L23/48

CPC分类号： H01L24/83 ,  G06K19/07732 ,  G06K19/07743 ,  H01L23/544 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/97 ,  H01L25/075 ,  H01L25/16 ,  H01L25/18 ,  H01L2223/54486 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48499 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/85013 ,  H01L2224/85051 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2224/85986 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/85186 ,  H01L2224/92247 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554

摘要： A micro USB memory package and method for manufacturing the same, which can meet the USB standard specification, can have a light, thin, short and small configuration, can have various applications, and can simply expand the memory capacity thereof. The micro USB memory package comprises a substrate with a plurality of circuit patterns formed on the top surface thereof, at least one of passive elements connected with the circuit patterns of the substrate, at least one of controllers connected with the circuit patterns of the substrate, at least one of flash memories connected with the circuit patterns of the substrate, and an encapsulation part encapsulating the passive elements, the controllers and the flash memories on the substrate, and at least one of USB lands connected with the circuit patterns by a conducting via are formed on the under surface of one side of the substrate.

摘要翻译： 可以满足USB标准规格的微型USB存储器封装及其制造方法可以具有轻，薄，短和小配置，可以具有各种应用，并且可以简单地扩展其存储器容量。 该微型USB存储器包括：一个具有形成在其顶表面上的多个电路图案的衬底，与衬底的电路图形连接的至少一个无源元件，与衬底的电路图案相连的至少一个控制器， 与衬底的电路图案连接的闪存中的至少一个以及封装在衬底上的无源元件，控制器和闪速存储器的封装部分以及通过导电通孔连接到电路图案的USB焊盘中的至少一个 形成在基板的一侧的下表面上。

公开(公告)号：US07632759B2

公开(公告)日：2009-12-15

申请号：US11532270

申请日：2006-09-15

申请人： Josef Hoeglauer ,  Ralf Otremba

发明人： Josef Hoeglauer ,  Ralf Otremba

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L24/40 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/37 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05556 ,  H01L2224/05639 ,  H01L2224/05655 ,  H01L2224/37147 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4847 ,  H01L2224/48639 ,  H01L2224/48655 ,  H01L2224/48739 ,  H01L2224/48755 ,  H01L2224/48839 ,  H01L2224/48855 ,  H01L2224/85011 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/2076 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device (2) has a semiconductor chip (16) the front side (1) of which has integrated circuit elements and an electrically conductive metallization structure (3) with chip contact areas (9). The metallization structure (3) has an electrically conductive patterned adhesion layer (6), which provides a low-resistance contact with silicon, and an electrically conductive patterned intermediate layer (7), which provides a connectable surface. Furthermore, a passivation layer (8) is provided, which covers the top side and the edge sides of the intermediate layer (7) whilst leaving the chip contact area (9) free. The intermediate layer (7) comprises Ni and is free of noble metals. The intermediate layer (7) is at least 10 times thicker than the adhesion layer (6).

摘要翻译： 半导体器件（2）具有其前侧（1）具有集成电路元件的半导体芯片（16）和具有芯片接触区域（9）的导电金属化结构（3）。 金属化结构（3）具有提供与硅的低电阻接触的导电图案化粘附层（6）和提供可连接表面的导电图案化中间层（7）。 此外，提供钝化层（8），其覆盖中间层（7）的顶侧和边缘侧，同时使芯片接触区域（9）离开。 中间层（7）包含Ni并且不含贵金属。 中间层（7）比粘合层（6）厚至少10倍。

公开(公告)号：US20090291554A1

公开(公告)日：2009-11-26

申请号：US12534885

申请日：2009-08-04

申请人： Mou-Shiung Lin ,  Chiu-Ming Chou

发明人： Mou-Shiung Lin ,  Chiu-Ming Chou

IPC分类号： H01L21/768

CPC分类号： H01L21/563 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/86 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05166 ,  H01L2224/05553 ,  H01L2224/05568 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/0603 ,  H01L2224/06505 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/13023 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/13583 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13669 ,  H01L2224/13673 ,  H01L2224/13676 ,  H01L2224/13683 ,  H01L2224/14 ,  H01L2224/1403 ,  H01L2224/14505 ,  H01L2224/16145 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48673 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48773 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48873 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06586 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/48869 ,  H01L2224/48744 ,  H01L2224/05552 ,  H01L2924/00012

摘要： A semiconductor chip includes a silicon substrate, a first dielectric layer over said silicon substrate, a metallization structure over said first dielectric layer, wherein said metallization structure comprises a first metal layer and a second metal layer over said first metal layer, a second dielectric layer between said first and second metal layers, a passivation layer over said metallization structure and over said first and second dielectric layers, an opening in said passivation layer exposing a pad of said metallization structure, a polymer bump over said passivation layer, wherein said polymer bump has a thickness of between 5 and 25 micrometers, an adhesion/barrier layer on said pad exposed by said opening, over said passivation layer and on a top surface and a portion of sidewall(s) of said polymer bump, a seed layer on said adhesion/barrier layer; and a third metal layer on said seed layer.

摘要翻译： 半导体芯片包括硅衬底，在所述硅衬底上的第一电介质层，在所述第一介电层上的金属化结构，其中所述金属化结构包括在所述第一金属层上的第一金属层和第二金属层，第二介电层 在所述第一和第二金属层之间的钝化层，在所述金属化结构之上并且在所述第一和第二介电层上方的钝化层，所述钝化层中的开口暴露所述金属化结构的焊盘，所述钝化层上的聚合物凸块，其中所述聚合物凸块 具有5至25微米的厚度，所述焊盘上的粘附/阻挡层，由所述开口暴露在所述钝化层上，所述聚合物凸块的顶表面和侧壁的一部分上，所述 粘合/阻隔层; 以及所述籽晶层上的第三金属层。

公开(公告)号：US07489041B2

公开(公告)日：2009-02-10

申请号：US11266842

申请日：2005-11-04

申请人： Salman Akram

发明人： Salman Akram

IPC分类号： H01L23/48

CPC分类号： H01L24/85 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L24/86 ,  H01L2224/02166 ,  H01L2224/03 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45669 ,  H01L2224/48091 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48881 ,  H01L2224/85375 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2224/48824 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2224/48781 ,  H01L2224/48681 ,  H01L2224/29099

摘要： An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond is described wherein the bond pad on a surface of the semiconductor device comprises a layer of copper and at least one layer of metal and/or at least a barrier layer of material between the copper layer and one layer of metal on the copper layer to form a bond pad.

摘要翻译： 改进的引线键合设置有半导体器件的接合焊盘和引线框架的引线指，或者TAB带的改进的导电引线与半导体器件的焊盘焊接。 更具体地，描述了改进的引线键合，其中半导体器件的表面上的接合焊盘包括铜层和至少一层金属和/或至少在铜层和一层之间的材料阻挡层 铜层上的金属形成接合垫。

公开(公告)号：US20090032975A1

公开(公告)日：2009-02-05

申请号：US12182283

申请日：2008-07-30

申请人： Byung Tai Do ,  Stephen A. Murphy ,  Yaojian Lin ,  Heap Hoe Kuan ,  Pandi Chelvam Marimuthu ,  Hin Hwa Goh

发明人： Byung Tai Do ,  Stephen A. Murphy ,  Yaojian Lin ,  Heap Hoe Kuan ,  Pandi Chelvam Marimuthu ,  Hin Hwa Goh

IPC分类号： H01L23/49 ,  H01L21/44

CPC分类号： H01L24/16 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05187 ,  H01L2224/05552 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13099 ,  H01L2224/1411 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48611 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48711 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/85 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2224/48811 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00012

摘要： A semiconductor wafer contains a plurality of semiconductor die. The wafer has contact pads formed over its surface. A passivation layer is formed over the wafer. A stress buffer layer is formed over the passivation layer. The stress buffer layer is patterned to expose the contact pads. A metal layer is deposited over the stress buffer layer. The metal layer is a common voltage bus for the semiconductor device in electrical contact with the contact pads. An adhesion layer, barrier layer, and seed layer is formed over the wafer in electrical contact with the contact pads. The metal layer is mounted to the seed layer. Solder bumps or other interconnect structures are formed over the metal layer. A second passivation layer is formed over the metal layer. In an alternate embodiment, a wirebondable layer can be deposited over the metal layer and wirebonds connected to the metal layer.

摘要翻译： 半导体晶片包含多个半导体管芯。 晶片具有在其表面上形成的接触垫。 在晶片上形成钝化层。 在钝化层上形成应力缓冲层。 将应力缓冲层图案化以暴露接触焊盘。 金属层沉积在应力缓冲层上。 金属层是用于与接触焊盘电接触的半导体器件的公共电压总线。 在与接触垫电接触的晶片之上形成粘合层，阻挡层和种子层。 金属层安装到种子层。 焊料凸块或其它互连结构形成在金属层上。 在金属层上形成第二钝化层。 在替代实施例中，可以将金属层沉积在金属层上，并且连接到金属层的引线键。

公开(公告)号：US07485565B2

公开(公告)日：2009-02-03

申请号：US11505773

申请日：2006-08-17

申请人： Jeffery N. Gleason ,  Joseph T. Lindgren

发明人： Jeffery N. Gleason ,  Joseph T. Lindgren

IPC分类号： H01L21/44

CPC分类号： H01L24/49 ,  H01L21/288 ,  H01L21/4846 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32506 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/484 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48755 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85207 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15747 ,  H05K3/244 ,  H05K2203/072 ,  H05K2203/1105 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2224/48744

摘要： A method for forming a nickel cap layer over copper metalized bond pad is disclosed in which the phosphorous content of the nickel cap, and particularly the surface of the nickel cap, may be controlled. The phosphorous content of the surface of the nickel cap is suitably determined such that oxidation is inhibited. The resulting nickel cap may be wire-bonded directly, without the deposition of a gold cap layer.

摘要翻译： 公开了一种在铜金属化接合焊盘上形成镍覆盖层的方法，其中镍帽的磷含量，特别是镍帽的表面可以被控制。 适当地确定镍帽表面的磷含量，使得氧化被抑制。 所得的镍帽可以直接线接合，而不会沉积金盖层。