公开(公告)号：US20150325542A1

公开(公告)日：2015-11-12

申请号：US14804617

申请日：2015-07-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yen-Liang Lin ,  Yu-Jen Tseng ,  Chang-Chia Huang ,  Tin-Hao Kuo ,  Chen-Shien Chen

IPC分类号： H01L23/00

CPC分类号： H01L24/02 ,  H01L21/4853 ,  H01L21/76885 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02125 ,  H01L2224/02141 ,  H01L2224/02145 ,  H01L2224/0215 ,  H01L2224/0401 ,  H01L2224/05114 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05647 ,  H01L2224/10125 ,  H01L2224/11013 ,  H01L2224/11019 ,  H01L2224/1112 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/13012 ,  H01L2224/13015 ,  H01L2224/13017 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13551 ,  H01L2224/13564 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13686 ,  H01L2224/1369 ,  H01L2224/14051 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/81007 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/8181 ,  H01L2224/81895 ,  H01L2224/8192 ,  H01L2224/81948 ,  H01L2225/06513 ,  H01L2924/04941 ,  H01L2924/07025 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/35 ,  Y10T29/49144 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/05432 ,  H01L2924/053 ,  H01L2924/00 ,  H01L2924/00012

摘要： A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a polyimide opening exposing the contact element, and the under bump metallurgy feature has a UBM width. The bump structure further includes a copper pillar on the under bump metallurgy feature. A distal end of the copper pillar has a pillar width, and the UBM width is greater than the pillar width.

摘要翻译： 凸块结构包括形成在衬底上的接触元件和覆盖衬底的钝化层。 钝化层包括暴露接触元件的钝化开口。 凸块结构还包括覆盖钝化层的聚酰亚胺层和电耦合到接触元件的凸块下冶金（UBM）特征。 聚酰亚胺层具有暴露接触元件的聚酰亚胺开口，凸起下的金属特征具有UBM宽度。 凸起结构还包括在凸起下金属冶金特征上的铜柱。 铜柱的前端具有柱宽，UBM宽度大于柱宽。

公开(公告)号：US09105530B2

公开(公告)日：2015-08-11

申请号：US13904885

申请日：2013-05-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yen-Liang Lin ,  Yu-Jen Tseng ,  Chang-Chia Huang ,  Tin-Hao Kuo ,  Chen-Shien Chen

IPC分类号： H01L23/498 ,  H01L21/768 ,  H01L23/00 ,  H01L21/48

CPC分类号： H01L24/02 ,  H01L21/4853 ,  H01L21/76885 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02125 ,  H01L2224/02141 ,  H01L2224/02145 ,  H01L2224/0215 ,  H01L2224/0401 ,  H01L2224/05114 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05647 ,  H01L2224/10125 ,  H01L2224/11013 ,  H01L2224/11019 ,  H01L2224/1112 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/13012 ,  H01L2224/13015 ,  H01L2224/13017 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13551 ,  H01L2224/13564 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13686 ,  H01L2224/1369 ,  H01L2224/14051 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/81007 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/8181 ,  H01L2224/81895 ,  H01L2224/8192 ,  H01L2224/81948 ,  H01L2225/06513 ,  H01L2924/04941 ,  H01L2924/07025 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/35 ,  Y10T29/49144 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/05432 ,  H01L2924/053 ,  H01L2924/00 ,  H01L2924/00012

摘要： A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a polyimide opening exposing the contact element, and the under bump metallurgy feature has a UBM width. The bump structure further includes a copper pillar on the under bump metallurgy feature. A distal end of the copper pillar width, and the UBM width is greater than the pillar width.

摘要翻译： 凸块结构包括形成在衬底上的接触元件和覆盖衬底的钝化层。 钝化层包括暴露接触元件的钝化开口。 凸起结构还包括覆盖钝化层的聚酰亚胺层和电耦合到接触元件的凸块下金属（UBM）特征。 聚酰亚胺层具有暴露接触元件的聚酰亚胺开口，凸起下的金属特征具有UBM宽度。 凸起结构还包括在凸起下金属冶金特征上的铜柱。 铜柱宽度的远端，UBM宽度大于柱宽。

公开(公告)号：US08841767B2

公开(公告)日：2014-09-23

申请号：US13852663

申请日：2013-03-28

申请人： Chipbond Technology Corporation

发明人： Chin-Tang Hsieh ,  Chih-Ming Kuo

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H05K1/11 ,  H01L23/498 ,  H01L21/48

CPC分类号： H05K1/111 ,  H01L21/4846 ,  H01L23/3192 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05541 ,  H01L2224/05547 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05565 ,  H01L2224/05567 ,  H01L2224/05578 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05687 ,  H01L2224/1147 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13565 ,  H01L2224/13687 ,  H01L2924/00014 ,  H01L2924/301 ,  H01L2924/384 ,  Y10T428/12396 ,  H01L2924/00012 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/058 ,  H01L2224/05552

摘要： A bumping process comprises steps of forming a metal layer with copper on a substrate, and the metal layer with copper comprises a plurality of first zones and second zones; forming a photoresist layer on the metal layer with copper; patterning the photoresist layer to form a plurality of openings; forming a plurality of copper bumps within the openings, each of the copper bumps covers the first zones and comprises a first top surface; forming a connection layer on the first top surface; removing the photoresist layer; removing the second zones and enabling each of the first zones to form an under bump metallurgy layer, wherein the under bump metallurgy layer, the copper bump, and the connection layer possess their corresponded peripheral walls, and covering sections of a first protective layer formed on the connection layer may cover those peripheral walls to prevent ionization phenomenon.

摘要翻译： 凸起工艺包括在基底上形成具有铜的金属层的步骤，并且具有铜的金属层包括多个第一区域和第二区域; 用铜在金属层上形成光致抗蚀剂层; 图案化光致抗蚀剂层以形成多个开口; 在所述开口内形成多个铜凸块，每个所述铜凸块覆盖所述第一区域并且包括第一顶表面; 在所述第一顶表面上形成连接层; 去除光致抗蚀剂层; 去除所述第二区域并且使得所述第一区域中的每一个形成凸起下冶金层，其中所述凸起下的冶金层，所述铜凸块和所述连接层具有其对应的周壁，以及覆盖在第一区上形成的第一保护层的覆盖部分 连接层可以覆盖那些外围壁以防止电离现象。

公开(公告)号：US20130140691A1

公开(公告)日：2013-06-06

申请号：US13312730

申请日：2011-12-06

申请人： Xusheng Bao ,  Ma Phoo Pwint Hlaing ,  Jian Zuo

发明人： Xusheng Bao ,  Ma Phoo Pwint Hlaing ,  Jian Zuo

IPC分类号： H01L23/498 ,  H01L21/28

CPC分类号： H01L24/11 ,  H01L23/3114 ,  H01L23/525 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/94 ,  H01L2224/02313 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0332 ,  H01L2224/034 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/035 ,  H01L2224/03505 ,  H01L2224/0361 ,  H01L2224/03632 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05012 ,  H01L2224/05024 ,  H01L2224/05073 ,  H01L2224/05086 ,  H01L2224/05088 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05095 ,  H01L2224/05096 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05687 ,  H01L2224/1111 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11466 ,  H01L2224/118 ,  H01L2224/11849 ,  H01L2224/11916 ,  H01L2224/13006 ,  H01L2224/13011 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13078 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13553 ,  H01L2224/1357 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/01013 ,  H01L2924/0105 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2924/00013 ,  H01L2924/01074 ,  H01L2924/01007 ,  H01L2924/01023 ,  H01L2924/04941 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2224/11 ,  H01L2924/00

摘要： A semiconductor device has a semiconductor wafer with a first conductive layer formed over a surface of the semiconductor wafer. A first insulating layer is formed over the surface of the semiconductor wafer and first conductive layer. A second conductive layer is formed over the first insulating layer and first conductive layer. A second insulating layer is formed over the first insulating layer and second conductive layer. A plurality of openings is formed in the second insulating layer in a bump formation area of the semiconductor wafer to expose the second conductive layer and reduce adverse effects of electro-migration. The openings are separated by portions of the second insulating layer. A UBM layer is formed over the openings in the second insulating layer in the bump formation area electrically connected to the second conductive layer. A bump is formed over the UBM layer.

公开(公告)号：US08455991B2

公开(公告)日：2013-06-04

申请号：US12890338

申请日：2010-09-24

申请人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

发明人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

IPC分类号： H01L21/56

CPC分类号： H01L23/4334 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/93 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/8101 ,  H01L2224/81095 ,  H01L2224/81815 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92242 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11 ,  H01L21/78 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit device having chip interconnects; applying an attachment layer directly on the integrated circuit device; attaching a device stiffener to the integrated circuit device with the attachment layer; attaching a chip carrier to the chip interconnects with the device stiffener attached to the integrated circuit device for controlling warpage of the integrated circuit device to prevent the warpage from causing some of the chip interconnects to separate from the chip carrier during attachment of the chip interconnects to the chip carrier; and applying an underfill between the chip carrier and the integrated circuit device for controlling connectivity of all the chip interconnects to the chip carrier.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有芯片互连的集成电路器件; 将附着层直接施加在集成电路装置上; 将装置加强件附接到具有附接层的集成电路装置; 将芯片载体附接到与集成电路器件连接的器件加强件的芯片互连件，用于控制集成电路器件的翘曲，以防止翘曲导致芯片互连在将芯片互连连接到芯片互连期间与芯片载体分离 芯片载体; 以及在芯片载体和集成电路器件之间施加底部填充物，以控制所有芯片互连件与芯片载体的连接性。

公开(公告)号：US20130022830A1

公开(公告)日：2013-01-24

申请号：US13187353

申请日：2011-07-20

申请人： Chin-Tang Hsieh ,  Chih-Ming Kuo

发明人： Chin-Tang Hsieh ,  Chih-Ming Kuo

IPC分类号： B32B3/30 ,  G03F7/20

CPC分类号： H05K1/111 ,  H01L21/4846 ,  H01L23/3192 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05541 ,  H01L2224/05547 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05565 ,  H01L2224/05567 ,  H01L2224/05578 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05687 ,  H01L2224/1147 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13565 ,  H01L2224/13687 ,  H01L2924/00014 ,  H01L2924/301 ,  H01L2924/384 ,  Y10T428/12396 ,  H01L2924/00012 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/058 ,  H01L2224/05552

摘要： A bumping process comprises steps of forming a metal layer with copper on a substrate, and the metal layer with copper comprises a plurality of first zones and second zones; forming a photoresist layer on the metal layer with copper; patterning the photoresist layer to form a plurality of openings; forming a plurality of copper bumps within the openings, each of the copper bumps covers the first zones and comprises a first top surface; forming a connection layer on the first top surface; removing the photoresist layer; removing the second zones and enabling each of the first zones to form an under bump metallurgy layer, wherein the under bump metallurgy layer, the copper bump, and the connection layer possess their corresponded peripheral walls, and covering sections of a first protective layer formed on the connection layer may cover those peripheral walls to prevent ionization phenomenon.

公开(公告)号：US20130015590A1

公开(公告)日：2013-01-17

申请号：US13346185

申请日：2012-01-09

申请人： Belgacem Haba ,  Wael Zohni ,  Richard Dewitt Crisp ,  Ilyas Mohammed

发明人： Belgacem Haba ,  Wael Zohni ,  Richard Dewitt Crisp ,  Ilyas Mohammed

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  G11C5/04 ,  H01L23/12 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49838 ,  H01L23/538 ,  H01L23/5386 ,  H01L24/06 ,  H01L24/09 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/108 ,  H01L2224/0401 ,  H01L2224/061 ,  H01L2224/091 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1203 ,  H01L2924/1205 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15786 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/301 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A microelectronic package can include a substrate having first and second opposed surfaces, at least two pairs of microelectronic elements, and a plurality of terminals exposed at the second surface. Each pair of microelectronic elements can include an upper microelectronic element and a lower microelectronic element. The pairs of microelectronic elements can be fully spaced apart from one another in a horizontal direction parallel to the first surface of the substrate. Each lower microelectronic element can have a front surface facing the first surface of the substrate and a plurality of contacts at the front surface. A surface of each of the upper microelectronic elements can at least partially overlie a rear surface of the lower microelectronic element in its pair. The microelectronic package can also include electrical connections extending from at least some of the contacts of each lower microelectronic element to at least some of the terminals.

摘要翻译： 微电子封装可以包括具有第一和第二相对表面的衬底，至少两对微电子元件和在第二表面处暴露的多个端子。 每对微电子元件可以包括上微电子元件和下微电子元件。 这些微电子元件对可以在平行于衬底的第一表面的水平方向上彼此完全间隔开。 每个下部微电子元件可以具有面向基板的第一表面的前表面和在前表面处的多个触点。 每个上部微电子元件的表面可以至少部分地覆盖在其对中的下部微电子元件的后表面。 微电子封装还可以包括从每个下部微电子元件的至少一些触点延伸到至少一些端子的电连接。

公开(公告)号：US20120074588A1

公开(公告)日：2012-03-29

申请号：US12890338

申请日：2010-09-24

申请人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

发明人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H01L23/4334 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/93 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/8101 ,  H01L2224/81095 ,  H01L2224/81815 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92242 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11 ,  H01L21/78 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit device having chip interconnects; applying an attachment layer directly on the integrated circuit device; attaching a device stiffener to the integrated circuit device with the attachment layer; attaching a chip carrier to the chip interconnects with the device stiffener attached to the integrated circuit device for controlling warpage of the integrated circuit device to prevent the warpage from causing some of the chip interconnects to separate from the chip carrier during attachment of the chip interconnects to the chip carrier; and applying an underfill between the chip carrier and the integrated circuit device for controlling connectivity of all the chip interconnects to the chip carrier.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有芯片互连的集成电路器件; 将附着层直接施加在集成电路装置上; 将装置加强件附接到具有附接层的集成电路装置; 将芯片载体附接到与集成电路器件连接的器件加强件的芯片互连件，用于控制集成电路器件的翘曲，以防止翘曲导致芯片互连在将芯片互连连接到芯片互连期间与芯片载体分离 芯片载体; 以及在芯片载体和集成电路器件之间施加底部填充物，以控制所有芯片互连件与芯片载体的连接性。

公开(公告)号：US07638883B2

公开(公告)日：2009-12-29

申请号：US12149317

申请日：2008-04-30

申请人： Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

发明人： Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K3/3484 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/742 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/11849 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/1601 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/16505 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/29347 ,  H01L2224/294 ,  H01L2224/29411 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/742 ,  H01L2224/75 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83204 ,  H01L2224/83211 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/301 ,  H01L2924/30105 ,  H01L2924/381 ,  H05K3/323 ,  H05K2201/10977 ,  H05K2203/0425 ,  H05K2203/087 ,  H05K2203/1178 ,  Y10T156/1744 ,  H01L2924/00011 ,  H01L2924/0103 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/066 ,  H01L2924/00 ,  H01L2224/05599

摘要： A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to a space between a circuit board 21 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 12, the resin 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 14. The resin 14 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof and self-assembled between the connecting terminals 11 and the electrode terminals 12. By further heating the resin 14 and melting the solder powder 16 contained in the resin 14 self-assembled between the terminals, connectors 22 are formed between the terminals to complete a flip chip mounting body.

摘要翻译： 提供一种适用于下一代LSI的倒装芯片安装以及高生产率和可靠性以及凸块形成方法的倒装芯片安装方法。 在包含焊料粉末16和气泡生成剂的树脂14被供给到具有多个连接端子11的电路板21和具有多个电极端子12的半导体芯片20之间的空间的情况下，加热树脂14 从包含在树脂14中的气泡发生剂产生气泡30.树脂14通过其生长被推向产生的气泡30的外部，并且在连接端子11和电极端子12之间自组装。 通过进一步加热树脂14并熔化包含在树脂14中的自组装在端子之间的焊料粉末16，在端子之间形成连接器22以完成倒装芯片安装体。

公开(公告)号：US20080284046A1

公开(公告)日：2008-11-20

申请号：US12149317

申请日：2008-04-30

申请人： Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

发明人： Seiji Karashima ,  Takashi Kitae ,  Seiichi Nakatani

IPC分类号： H01L23/488 ,  B23K13/08

CPC分类号： H05K3/3484 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/742 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/11849 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/1601 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/16505 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/29347 ,  H01L2224/294 ,  H01L2224/29411 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/742 ,  H01L2224/75 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83204 ,  H01L2224/83211 ,  H01L2224/83855 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/301 ,  H01L2924/30105 ,  H01L2924/381 ,  H05K3/323 ,  H05K2201/10977 ,  H05K2203/0425 ,  H05K2203/087 ,  H05K2203/1178 ,  Y10T156/1744 ,  H01L2924/00011 ,  H01L2924/0103 ,  H01L2924/01051 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/066 ,  H01L2924/00 ,  H01L2224/05599

摘要： A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to a space between a circuit board 21 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 12, the resin 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 14. The resin 14 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof and self-assembled between the connecting terminals 11 and the electrode terminals 12. By further heating the resin 14 and melting the solder powder 16 contained in the resin 14 self-assembled between the terminals, connectors 22 are formed between the terminals to complete a flip chip mounting body.

摘要翻译： 提供一种适用于下一代LSI的倒装芯片安装以及高生产率和可靠性以及凸块形成方法的倒装芯片安装方法。 在包含焊料粉末16和气泡生成剂的树脂14被供给到具有多个连接端子11的电路板21和具有多个电极端子12的半导体芯片20之间的空间的情况下，加热树脂14 从包含在树脂14中的气泡发生剂产生气泡30.树脂14通过其生长被推向产生的气泡30的外部，并且在连接端子11和电极端子12之间自组装。 通过进一步加热树脂14并熔化包含在树脂14中的自组装在端子之间的焊料粉末16，在端子之间形成连接器22以完成倒装芯片安装体。