公开(公告)号：US06717277B2

公开(公告)日：2004-04-06

申请号：US10371827

申请日：2003-02-21

Applicant: Chee-Yee Chung ,  David G. Figueroa ,  Robert L. Sankman

Inventor： Chee-Yee Chung ,  David G. Figueroa ,  Robert L. Sankman

IPC: H01L2348

CPC classification number: H05K1/141 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0231 ,  H05K1/0298 ,  H05K3/3436 ,  H05K3/366 ,  H05K2201/0919 ,  H05K2201/10446 ,  H05K2201/10454 ,  H05K2201/10674 ,  H05K2201/10719 ,  H01L2224/05599

Abstract: An electronic circuit package includes a vertical package section (304, FIG. 3) electrically connected to a horizontal package section (306, FIG. 3). The vertical package section includes multiple conductive layers (512, 514, 516, FIG. 5) oriented in parallel with a vertical plane. A first set of bond pads (606, FIG. 6) on the vertical section's horizontal top surface (608, FIG. 6) can be connected to the bond pads (602, FIG. 6) of an integrated circuit (302, FIG. 3). A second set of bond pads (612, FIG. 6) on the vertical section's horizontal bottom surface (614, FIG. 6) can be connected to bond pads (616, FIG. 6) on the horizontal package section. The conductive layers of the vertical section perform a bond pad pitch conversion in a first direction, and conductive structures (906, 908, 910, FIG. 9) within the horizontal package section perform a bond pad pitch conversion in a second direction.

Abstract translation: 电子电路封装包括电连接到水平封装部分（图3的306）的垂直封装部分（304，图3）。 垂直封装部分包括与垂直平面平行取向的多个导电层（512,514,516，图5）。 垂直部分的水平顶面（图6）上的第一组接合焊盘（606，图6）可以连接到集成电路（图6的302）的接合焊盘（602，图6）。 3）。 垂直部分的水平底面（图6中的614）上的第二组接合焊盘（612，图6））可以连接到水平封装部分上的接合焊盘（616，图6）。 垂直部分的导电层在第一方向上进行接合焊盘间距转换，并且水平封装部分内的导电结构（906,908,910，图9）在第二方向上执行接合焊盘间距转换。

公开(公告)号：US06711026B2

公开(公告)日：2004-03-23

申请号：US10007986

申请日：2001-11-13

Applicant: Mark Kenneth Hoffmeyer

Inventor： Mark Kenneth Hoffmeyer

IPC: H05K118

CPC classification number: H05K7/1061 ,  H01L2924/0002 ,  H05K1/0218 ,  H05K1/0263 ,  H05K1/111 ,  H05K3/244 ,  H05K2201/09781 ,  H05K2201/10719 ,  Y02P70/611 ,  H01L2924/00

Abstract: A conductive sash is etched around the periphery of a land grid array interconnection on a carrier for dense integrated circuit connections. If the array comprises more than one module or module chip domain, the conductive sash is also positioned between the modules. The dimensions of the sash are such that it is slightly larger than a frame of an interposer or other electrical connector which is placed upon the array. In this fashion, the interposer or other electrical connector rests upon the sash and provides protection against particulate and gaseous contamination of the array. Preferably, the sash is manufactured along with the array of electrical interconnections of the carrier, and during the manufacture the sash provides more homogeneous current density to the outer interconnections of the array during component processing which in turn provides more predictable and consistent surface topography of the carrier and permits more uniform mechanical loading of the interposer or other connector onto the array when assembled.

Abstract translation: 在载体上的栅格阵列互连的周围蚀刻导电的窗扇，用于密集的集成电路连接。 如果阵列包括多个模块或模块芯片域，则导电窗扇也位于模块之间。 窗扇的尺寸使得其稍微大于放置在阵列上的中介层或其它电连接器的框架。 以这种方式，插入器或其他电连接器搁置在窗框上并提供防止阵列的颗粒和气体污染的保护。 优选地，窗框与载体的电互连阵列一起制造，并且在制造期间，窗扇在组件处理期间向阵列的外部互连提供更均匀的电流密度，这又提供了更可预测和一致的表面形貌 并且当组装时允许将插入件或其它连接器更均匀地机械加载到阵列上。

公开(公告)号：US06677668B1

公开(公告)日：2004-01-13

申请号：US09727913

申请日：2000-11-28

Applicant: Paul T. Lin

Inventor： Paul T. Lin

IPC: H01L2348

CPC classification number: H01L24/81 ,  B23K3/0607 ,  B23K3/0623 ,  B23K2101/40 ,  H01L23/49816 ,  H01L2224/11334 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3457 ,  H05K3/3473 ,  H05K2201/10674 ,  H05K2201/10719 ,  H05K2203/041 ,  Y02P70/613 ,  Y10T428/24917 ,  H01L2224/0401

Abstract: The present invention discloses a method for mounting multiple integrated circuit (IC) chips on a top surface of a substrate. The method includes a step forming a first footprint to include a plurality of electrical contacts on the top surface for mounting a first IC chip thereon. The method further includes a step of forming a set of substrate testing footprints to include a plurality of package mounting and testing electrical contacts for temporarily mounting a plurality of testing packages to conduct a functional MCM test. The functional MCM test is to test the substrate mounted with the first IC chip and the testing packages.

Abstract translation: 本发明公开了一种在基板的顶面安装多个集成电路（IC）芯片的方法。 该方法包括形成第一覆盖区以在顶表面上包括多个电触点的步骤，用于在其上安装第一IC芯片。 该方法还包括形成一组衬底测试足迹以包括多个封装安装和测试电触点的步骤，用于临时安装多个测试封装以进行功能MCM测试。 功能MCM测试是测试安装有第一个IC芯片的基板和测试包。

公开(公告)号：US06655023B1

公开(公告)日：2003-12-02

申请号：US09468620

申请日：1999-12-21

Applicant: Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

IPC: H01R900

CPC classification number: H05K7/1069 ,  B23K1/0008 ,  B23K20/004 ,  B23K2101/40 ,  C23C18/1605 ,  C23C18/165 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/07342 ,  G01R31/2856 ,  G01R31/2863 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/49811 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/16 ,  H01L2223/54453 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45572 ,  H01L2224/45599 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48844 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/90 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10S977/712 ,  Y10S977/723 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T29/49171 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/4922 ,  Y10T29/49812 ,  Y10T428/12396 ,  Y10T428/12528 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2224/48744 ,  H01L2224/29099 ,  H01L2224/29075 ,  H01L2224/85399

Abstract: Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g., tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such as wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150° C., and can be comprised in less than 60 minutes.

Abstract translation: 弹性接触结构直接安装在半导体晶片上的接合焊盘上，在裸片与半导体晶片分离（分离）之前。 这使得半导体管芯能够通过具有设置在其表面上的多个端子的电路板等连接到半导体管芯来进行（例如，测试和/或烧入）。 接下来，半导体管芯可以从半导体晶片分离，因此可以使用相同的弹性接触结构来实现半导体管芯和其他电子部件（例如布线基板，半导体封装等）之间的互连。 使用本发明的全金属复合互连元件作为弹性接触结构，可以在至少150℃的温度下进行老化，并且可以在少于60分钟内包含。

公开(公告)号：US20030142460A1

公开(公告)日：2003-07-31

申请号：US09983187

申请日：2001-10-23

Applicant: Murata Manufacturing Co. Ltd.

Inventor： Yasuyuki Naito ,  Masaaki Taniguchi ,  Yoichi Kuroda ,  Haruo Hori ,  Takanori Kondo

IPC: H01G004/228

CPC classification number: H01L23/66 ,  H01G4/30 ,  H01L23/49822 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01068 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19106 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/10719 ,  H05K2201/10734 ,  H01L2924/00014

Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.

公开(公告)号：US06475822B2

公开(公告)日：2002-11-05

申请号：US09752853

申请日：2000-12-29

Applicant: Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

Inventor： Benjamin N. Eldridge ,  Gary W. Grube ,  Igor Y. Khandros ,  Gaetan L. Mathieu

IPC: H01L2144

CPC classification number: G01R3/00 ,  B23K20/004 ,  B23K2101/38 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D7/123 ,  C25D21/02 ,  G01R1/06727 ,  G01R1/06744 ,  G01R31/2884 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/4951 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/16 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05548 ,  H01L2224/1134 ,  H01L2224/16145 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/4554 ,  H01L2224/456 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/78301 ,  H01L2224/81801 ,  H01L2224/85043 ,  H01L2224/851 ,  H01L2224/85201 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H01R12/57 ,  H05K1/141 ,  H05K3/24 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/4015 ,  H05K3/4092 ,  H05K7/1069 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined on a sacrificial substrate. The openings may be within the surface of the substrate, or in one or more layers deposited on the surface of the sacrificial substrate. Each spring contact element has a base end portion, a contact end portion, and a central body portion. The contact end portion is offset in the z-axis (at a different height) than the central body portion. The base end portion is preferably offset in an opposite direction along the z-axis from the central body portion. In this manner, a plurality of spring contact elements are fabricated in a prescribed spatial relationship with one another on the sacrificial substrate. The spring contact elements are suitably mounted by their base end portions to corresponding terminals on an electronic component, such as a space transformer or a semiconductor device, whereupon the sacrificial substrate is removed so that the contact ends of the spring contact elements extend above the surface of the electronic component. In an exemplary use, the spring contact elements are thereby disposed on a space transformer component of a probe card assembly so that their contact ends effect pressure connections to corresponding terminals on another electronic component, for the purpose of probing the electronic component.

Abstract translation: 通过将至少一层金属材料沉积到限定在牺牲衬底上的开口中来制造弹簧接触元件。 开口可以在衬底的表面内，或者在沉积在牺牲衬底的表面上的一个或多个层中。 每个弹簧接触元件具有基端部分，接触端部分和中心体部分。 接触端部在与中心体部分相同的z轴（不同高度）偏移。 基端部优选地沿着与中心主体部分的z轴相反的方向偏移。 以这种方式，在牺牲基板上以规定的空间关系制造多个弹簧接触元件。 弹簧接触元件通过它们的基端部适当地安装在诸如空间变压器或半导体器件的电子部件上的对应端子上，从而去除牺牲基板，使得弹簧接触元件的接触端部在表面上方延伸 的电子元件。 在示例性用途中，弹簧接触元件因此被布置在探针卡组件的空间变换器部件上，使得它们的接触端在另一电子部件上实现与相应端子的压力连接，以便探测电子部件。

公开(公告)号：US20020139257A1

公开(公告)日：2002-10-03

申请号：US10155654

申请日：2002-05-23

Inventor： Chad Cobbley ,  Ford B. Grigg

IPC: B41L013/00 ,  B05C017/06

CPC classification number: B41F15/0818 ,  B41M1/12 ,  B41N1/24 ,  B41N1/248 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/1132 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/1225 ,  H05K3/321 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/10719 ,  H01L2224/0401

Abstract: A stencil for use in fabricating semiconductor devices is disclosed that has an aperture having a first portion extending from a first side thereof and a second portion extending from a second side thereof to minimize the shear stress between the material extruded therethrough and the stencil. The stencil allows for material to be extruded through the top of the stencil to the surface of the substrate and not contact the wall of the second portion of the aperture of the stencil. Since the material only contacts a small area of the first portion of the aperture near the top of the stencil, the material remains on the substrate and not in the aperture of the stencil.

公开(公告)号：US20020127894A1

公开(公告)日：2002-09-12

申请号：US10059985

申请日：2002-01-29

Applicant: International Business Machines Corporation

Inventor： William Louis Brodsky

IPC: H05K001/00

CPC classification number: H01L23/4006 ,  H01L23/562 ,  H01L2023/405 ,  H01L2023/4062 ,  H01L2023/4081 ,  H01L2224/72 ,  H01R12/714 ,  H01R13/6315 ,  H01R33/7664 ,  H01R33/975 ,  H05K3/325 ,  H05K2201/10378 ,  H05K2201/10719 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913

Abstract: An electronic subassembly comprises a printed circuit board and an electronic module, particularly a ceramic module, electrically connected to one another through a planar interposer. The interposer comprises an insulator sheet and electrical spring elements joining contact sites on the module with contact pads on the PCB. The invention includes modifications that improve the integrity of electrical connections between the printed circuit board and the electronic module. This is achieved by compensating for non-planarity between the surfaces of the interposer and the module, particularly resulting from a convex curvature of the module, by minimizing relative movement, such as rocking in the x-z and y-z planes. It also includes modifications to the suspension of the module within the interposer housing to reduce the effects caused by any sliding that may occur between the interposer and the module in the x-y plane.

Abstract translation: 电子组件包括印刷电路板和通过平面插入件彼此电连接的电子模块，特别是陶瓷模块。 插入器包括绝缘片和将弹性元件连接在模块上的接触点与PCB上的接触垫。 本发明包括改善印刷电路板和电子模块之间电连接的完整性的改进。 这通过最小化诸如x-z和y-z平面中的摆动的相对运动来补偿中介层和模块的表面之间的非平面性，特别是由模块的凸曲率产生。 它还包括对插入器外壳内的模块悬挂的修改，以减少由X-y平面中插入件与模块之间可能发生的任何滑动引起的影响。

公开(公告)号：US20020117330A1

公开(公告)日：2002-08-29

申请号：US10035633

申请日：2001-12-28

Applicant: FormFactor, Inc.

Inventor： Benjamin Niles Eldridge ,  Gary William Grube ,  Igor Yan Khandros ,  Gaetan L. Mathieu

IPC: H05K007/02 ,  H01L021/44

CPC classification number: H05K7/1069 ,  B23K20/004 ,  B23K2101/40 ,  C23C18/31 ,  C23C18/32 ,  C23C18/38 ,  C25D5/08 ,  C25D5/22 ,  C25D21/02 ,  G01R1/0483 ,  G01R1/06711 ,  G01R1/07314 ,  G01R1/07342 ,  G01R1/07357 ,  G01R1/07378 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6715 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/67288 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13082 ,  H01L2224/13099 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/16145 ,  H01L2224/45015 ,  H01L2224/45109 ,  H01L2224/45111 ,  H01L2224/45116 ,  H01L2224/4512 ,  H01L2224/45123 ,  H01L2224/45124 ,  H01L2224/45138 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45163 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/45173 ,  H01L2224/45176 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48599 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/78301 ,  H01L2224/81801 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/851 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49174 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2924/00012 ,  H01L2924/20752 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/00015 ,  H01L2924/2075 ,  H01L2924/01204 ,  H01L2924/013 ,  H01L2924/01004 ,  H01L2924/01048

Abstract: Contact structures exhibiting resilience or compliance for a variety of electronic components are formed by bonding a free end of a wire to a substrate, configuring the wire into a wire stem having a springable shape, severing the wire stem, and overcoating the wire stem with at least one layer of a material chosen primarily for its structural (resiliency, compliance) characteristics. A variety of techniques for configuring, severing, and overcoating the wire stem are disclosed. In an exemplary embodiment, a free end of a wire stem is bonded to a contact area on a substrate, the wire stem is configured to have a springable shape, the wire stem is severed to be free-standing by an electrical discharge, and the free-standing wire stem is overcoated by plating. A variety of materials for the wire stem (which serves as a falsework) and for the overcoat (which serves as a superstructure over the falsework) are disclosed. Various techniques are described for mounting the contact structures to a variety of electronic components (e.g., semiconductor wafers and dies, semiconductor packages, interposers, interconnect substrates, etc.), and various process sequences are described. The resilient contact structures described herein are ideal for making a nulltemporarynull (probe) connections to an electronic component such as a semiconductor die, for burn-in and functional testing. The self-same resilient contact structures can be used for subsequent permanent mounting of the electronic component, such as by soldering to a printed circuit board (PCB). An irregular topography can be created on or imparted to the tip of the contact structure to enhance its ability to interconnect resiliently with another electronic component. Among the numerous advantages of the present invention is the great facility with which the tips of a plurality of contact structures can be made to be coplanar with one another. Other techniques and embodiments, such as wherein the falsework wirestem protrudes beyond an end of the superstructure, or is melted down, and wherein multiple free-standing resilient contact structures can be fabricated from loops, are described.

公开(公告)号：US06369451B2

公开(公告)日：2002-04-09

申请号：US09229139

申请日：1999-01-12

Applicant: Paul T. Lin

Inventor： Paul T. Lin

IPC: H01L2348

CPC classification number: B23K3/0607 ,  B23K3/0623 ,  B23K2101/40 ,  H01L23/49816 ,  H01L24/81 ,  H01L2224/02381 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/11334 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3457 ,  H05K3/3473 ,  H05K2201/10674 ,  H05K2201/10719 ,  H05K2203/041 ,  Y02P70/613 ,  Y10T428/12007 ,  Y10T428/24917

Abstract: The present invention discloses an improved method for carry out a flip chip packaging process for attaching a semiconductor integrated circuit (IC) wafer having a plurality of input/output terminals, to a substrate. The method includes the steps of: 1) securely placing a plurality of solder balls on the substrate with each of said solder balls corresponding to a location of one of the input/output terminals on the integrated circuit wafer; 2) flipping the integrated circuit wafer for aligning each of the input/output terminals of the IC wafer to one of the solder balls; and 3) mounting the IC wafer onto the substrate for placing the I/O terminals on a corresponding solder ball and applying a reflow temperature for soldering the IC wafer to the substrate.

Abstract translation: 本发明公开了一种用于进行用于将具有多个输入/输出端子的半导体集成电路（IC）晶片连接到基板的倒装芯片封装工艺的改进方法。 该方法包括以下步骤：1）将多个焊球牢固地放置在基板上，其中每个所述焊球对应于集成电路晶片上的一个输入/输出端子的位置; 2）翻转集成电路晶片，以将IC晶片的每个输入/输出端子与其中一个焊球对准; 以及3）将所述IC晶片安装到所述基板上，以将所述I / O端子放置在相应的焊球上，并且将所述IC晶片的回流温度施加到所述基板。