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公开(公告)号:US09443762B2
公开(公告)日:2016-09-13
申请号:US13933406
申请日:2013-07-02
申请人: STATS ChipPAC, Ltd.
IPC分类号: H01L23/48 , H01L21/768 , H01L21/56 , H01L23/31 , H01L23/00 , H01L25/10 , H01L23/498
CPC分类号: H01L21/76898 , H01L21/302 , H01L21/56 , H01L21/561 , H01L21/76885 , H01L23/3114 , H01L23/481 , H01L23/49811 , H01L24/02 , H01L24/04 , H01L24/05 , H01L24/06 , H01L24/10 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/48 , H01L25/0657 , H01L25/105 , H01L2224/02166 , H01L2224/02181 , H01L2224/0391 , H01L2224/0401 , H01L2224/05083 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/10125 , H01L2224/1184 , H01L2224/11901 , H01L2224/13009 , H01L2224/1301 , H01L2224/13025 , H01L2224/13027 , H01L2224/13082 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1403 , H01L2224/14104 , H01L2224/14181 , H01L2224/16145 , H01L2224/48 , H01L2224/73265 , H01L2225/06513 , H01L2225/06541 , H01L2225/1058 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/15174 , H01L2924/181 , H01L2924/1815 , H01L2924/182 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2224/13099 , H01L2924/00012 , H01L2924/00 , H01L2224/05552 , H01L2224/11849 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor device has a conductive via in a first surface of a substrate. A first interconnect structure is formed over the first surface of the substrate. A first bump is formed over the first interconnect structure. The first bump is formed over or offset from the conductive via. An encapsulant is deposited over the first bump and first interconnect structure. A portion of the encapsulant is removed to expose the first bump. A portion of a second surface of the substrate is removed to expose the conductive via. The encapsulant provides structural support and eliminates the need for a separate carrier wafer when thinning the substrate. A second interconnect structure is formed over the second surface of the substrate. A second bump is formed over the first bump. A plurality of semiconductor devices can be stacked and electrically connected through the conductive via.
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公开(公告)号:US20160260682A1
公开(公告)日:2016-09-08
申请号:US15151384
申请日:2016-05-10
CPC分类号: H01L21/486 , H01L21/4853 , H01L21/52 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L21/76838 , H01L21/78 , H01L23/3114 , H01L23/3128 , H01L23/48 , H01L23/49827 , H01L23/5389 , H01L23/562 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L24/92 , H01L24/94 , H01L24/96 , H01L24/97 , H01L25/105 , H01L2221/68331 , H01L2221/68345 , H01L2221/68359 , H01L2221/68372 , H01L2221/68381 , H01L2224/02311 , H01L2224/02313 , H01L2224/02331 , H01L2224/02377 , H01L2224/0239 , H01L2224/03002 , H01L2224/0332 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05008 , H01L2224/05024 , H01L2224/05073 , H01L2224/05082 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05187 , H01L2224/05548 , H01L2224/05568 , H01L2224/05569 , H01L2224/05571 , H01L2224/05572 , H01L2224/05573 , H01L2224/0558 , H01L2224/056 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05671 , H01L2224/05687 , H01L2224/0569 , H01L2224/1132 , H01L2224/11334 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11464 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1316 , H01L2224/13294 , H01L2224/133 , H01L2224/2101 , H01L2224/214 , H01L2224/215 , H01L2224/92 , H01L2224/94 , H01L2224/95001 , H01L2224/96 , H01L2225/1035 , H01L2924/12041 , H01L2924/12042 , H01L2924/13091 , H01L2924/181 , H01L2924/18161 , H01L2924/18162 , H01L2924/351 , H01L2924/3511 , H01L2224/11 , H01L2924/01029 , H01L2924/014 , H01L2924/01028 , H01L2924/0105 , H01L2924/00 , H01L2924/01082 , H01L2924/01074 , H01L2924/01023 , H01L2924/01013 , H01L2924/01079 , H01L2924/01047 , H01L2224/0231 , H01L2924/00014 , H01L2924/04941 , H01L21/304 , H01L23/3164 , H01L2224/03 , H01L2224/19 , H01L2924/00012 , H01L2221/68304
摘要: A method of making a semiconductor device can include providing a temporary carrier with a semiconductor die mounting site, and forming conductive interconnects over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted at the semiconductor die mounting site. The conductive interconnects and semiconductor die can be encapsulated with mold compound. First ends of the conductive interconnects can be exposed. The temporary carrier can be removed to expose second ends of the conductive interconnects opposite the first ends of the conductive interconnects. The conductive interconnects can be etched to recess the second ends of the conductive interconnects with respect to the mold compound. The conductive interconnects can comprise a first portion, a second portion, and an etch stop layer disposed between the first portion and the second portion.
摘要翻译: 制造半导体器件的方法可以包括提供具有半导体管芯安装位置的临时载体,并且在半导体管芯安装位置的周围在临时载体上形成导电互连。 半导体管芯可以安装在半导体管芯安装位置。 导电互连和半导体管芯可以用模具化合物封装。 可以暴露导电互连的第一端。 可以移除临时载体以暴露与导电互连的第一端相对的导电互连的第二端。 可以蚀刻导电互连以相对于模具化合物凹进导电互连的第二端。 导电互连可以包括设置在第一部分和第二部分之间的第一部分,第二部分和蚀刻停止层。
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公开(公告)号:US20160254238A1
公开(公告)日:2016-09-01
申请号:US15152376
申请日:2016-05-11
发明人: Hsien-Wei Chen , Tsung-Yuan Yu , Hao-Yi Tsai , Mirng-Ji Lii , Chen-Hua Yu
IPC分类号: H01L23/00
CPC分类号: H01L24/09 , H01L21/56 , H01L23/3171 , H01L23/3192 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L2224/0214 , H01L2224/02175 , H01L2224/0231 , H01L2224/02311 , H01L2224/02313 , H01L2224/02315 , H01L2224/02331 , H01L2224/02335 , H01L2224/0235 , H01L2224/02351 , H01L2224/02373 , H01L2224/0239 , H01L2224/03462 , H01L2224/03464 , H01L2224/0381 , H01L2224/0382 , H01L2224/03828 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05551 , H01L2224/05552 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/06131 , H01L2224/06136 , H01L2224/06179 , H01L2224/0912 , H01L2224/11013 , H01L2224/11334 , H01L2224/11849 , H01L2224/12105 , H01L2224/13 , H01L2224/13014 , H01L2224/13016 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/211 , H01L2224/215 , H01L2224/221 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01074 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/05042 , H01L2924/05442 , H01L2924/059 , H01L2924/06 , H01L2924/07025 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/2064 , H01L2924/20641 , H01L2924/3512 , H01L2924/00 , H01L2924/00014 , H01L2924/01082 , H01L2924/01051 , H01L2924/01047 , H01L2924/00012
摘要: Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad. A second portion of the contact pad is exposed. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to the second portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element includes a hollow region.
摘要翻译: 公开了用于半导体器件的封装装置及其制造方法。 在一些实施例中,包装装置包括设置在衬底上的接触焊盘以及设置在衬底上的钝化层和接触焊盘的第一部分。 接触垫的第二部分被暴露。 后钝化互连(PPI)线设置在钝化层上并且耦合到接触焊盘的第二部分。 PPI垫设置在钝化层上。 过渡元件设置在钝化层上并且耦合在PPI线和PPI衬垫之间。 过渡元件包括中空区域。
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公开(公告)号:US09431359B2
公开(公告)日:2016-08-30
申请号:US13962194
申请日:2013-08-08
发明人: Brian M. Erwin , Ian Melville , Ekta Misra , George J. Scott
CPC分类号: H01L24/13 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/02126 , H01L2224/02166 , H01L2224/03462 , H01L2224/03464 , H01L2224/03616 , H01L2224/03848 , H01L2224/03912 , H01L2224/0401 , H01L2224/05082 , H01L2224/05083 , H01L2224/05096 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05187 , H01L2224/05582 , H01L2224/05583 , H01L2224/05644 , H01L2224/05647 , H01L2224/1132 , H01L2224/11334 , H01L2224/11462 , H01L2224/1147 , H01L2224/11474 , H01L2224/1148 , H01L2224/11849 , H01L2224/119 , H01L2224/13111 , H01L2924/01322 , H01L2924/12042 , H01L2924/351 , H01L2924/3511 , H01L2924/3512 , H01L2924/00014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01082 , H01L2924/01047 , H01L2924/01083 , H01L2224/11912 , H01L2924/05042 , H01L2924/05442 , H01L2924/00
摘要: A solder bump support structure and method of manufacturing thereof is provided. The solder bump support structure includes an inter-level dielectric (ILD) layer formed over a silicon substrate. The ILD layer has a plurality of conductive vias. The structure further includes a first insulation layer formed on the ILD layer. The solder bump support structure further includes a pedestal member formed on the ILD layer which includes a conductive material formed above the plurality of conductive vias in the ILD layer coaxially surrounded by a second insulation layer. The second insulation layer is thicker than the first insulation layer. The structure further includes a capping under bump metal (UBM) layer formed over, and in electrical contact with, the conductive material and formed over at least a portion of the second insulation layer of the pedestal member.
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公开(公告)号:US09418952B2
公开(公告)日:2016-08-16
申请号:US14632896
申请日:2015-02-26
发明人: Hsien-Wei Chen , Jie Chen
IPC分类号: H01L21/00 , H01L23/00 , H01L23/498 , H01L23/538
CPC分类号: H01L24/09 , H01L21/56 , H01L23/3171 , H01L23/3192 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L2224/0214 , H01L2224/02175 , H01L2224/0231 , H01L2224/02311 , H01L2224/02313 , H01L2224/02315 , H01L2224/02331 , H01L2224/02335 , H01L2224/0235 , H01L2224/02351 , H01L2224/02373 , H01L2224/0239 , H01L2224/03462 , H01L2224/03464 , H01L2224/0381 , H01L2224/0382 , H01L2224/03828 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05551 , H01L2224/05552 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/06131 , H01L2224/06136 , H01L2224/06179 , H01L2224/0912 , H01L2224/11013 , H01L2224/11334 , H01L2224/11849 , H01L2224/12105 , H01L2224/13 , H01L2224/13014 , H01L2224/13016 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/211 , H01L2224/215 , H01L2224/221 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01074 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/05042 , H01L2924/05442 , H01L2924/059 , H01L2924/06 , H01L2924/07025 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/2064 , H01L2924/20641 , H01L2924/3512 , H01L2924/00 , H01L2924/00014 , H01L2924/01082 , H01L2924/01051 , H01L2924/01047 , H01L2924/00012
摘要: Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to a second portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element comprises a first side and a second side coupled to the first side. The first side and the second side of the transition element are non-tangential to the PPI pad.
摘要翻译: 公开了用于半导体器件的封装装置及其制造方法。 在一些实施例中,包装装置包括设置在衬底上的接触焊盘以及设置在衬底上的钝化层和接触焊盘的第一部分。 后钝化互连(PPI)线设置在钝化层上并且耦合到接触焊盘的第二部分。 PPI垫设置在钝化层上。 过渡元件设置在钝化层上并且耦合在PPI线和PPI衬垫之间。 过渡元件包括联接到第一侧的第一侧和第二侧。 过渡元件的第一面和第二面与PPI垫非切线。
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公开(公告)号:US09406591B2
公开(公告)日:2016-08-02
申请号:US14824297
申请日:2015-08-12
申请人: ROHM CO., LTD.
IPC分类号: H01L23/00 , H01L23/31 , H01L23/495
CPC分类号: H01L23/49513 , H01L23/3107 , H01L23/3135 , H01L23/49503 , H01L23/49541 , H01L23/49551 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2224/83385 , H01L2924/01004 , H01L2924/01005 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/07802 , H01L2924/14 , H01L2924/17738 , H01L2924/181 , H01L2924/19041 , H01L2924/351 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/01015 , H01L2924/01026 , H01L2924/01028 , H01L2924/3512
摘要: A semiconductor device 100 includes a first insulating material 110 attached to a second main surface 106b of a semiconductor chip 106, and a second insulating material 112 attached to side surfaces of the semiconductor chip 106, the first insulating material 110 and an island 102. The semiconductor chip 106 is fixed to the island 102 via the first insulating material 110 and the second insulating material 112. The first insulating material 110 ensures a high dielectric strength between the semiconductor chip 106 and the island 102. Though the second insulating material 112 having a modulus of elasticity greater than that of the first insulating material 110, the semiconductor chip 106 is firmly attached to the island 102.
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公开(公告)号:US09406588B2
公开(公告)日:2016-08-02
申请号:US14076381
申请日:2013-11-11
发明人: Jing-Cheng Lin , Po-Hao Tsai , Ying Ching Shih , Szu Wei Lu
IPC分类号: H01L23/48 , H01L25/10 , H01L23/538 , H01L23/00 , H01L21/683 , H01L21/56 , H01L23/498
CPC分类号: H01L23/5389 , H01L21/4853 , H01L21/486 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L23/3114 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5384 , H01L23/5386 , H01L24/19 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/92 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2221/68318 , H01L2221/68327 , H01L2221/68372 , H01L2221/68381 , H01L2224/04105 , H01L2224/05569 , H01L2224/05655 , H01L2224/05666 , H01L2224/12105 , H01L2224/13111 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/82 , H01L2224/83 , H01L2224/83005 , H01L2224/83385 , H01L2224/92244 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2924/01082 , H01L2924/01079 , H01L2924/01029 , H01L2924/01074 , H01L2924/01028 , H01L2924/01023 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: The present disclosure provides a semiconductor structure. The semiconductor structure includes a carrier, a first redistribution layer (RDL) over the carrier, a semiconductor die over the first RDL, an adhesive layer between the semiconductor die and the first RDL, and a molding compound encapsulating the first RDL, the semiconductor die, and the adhesive layer. The first RDL includes at least one pattern electrically isolated from any component of the semiconductor structure. The present disclosure provides a method for manufacturing a semiconductor structure discussed herein. The method includes forming an RDL on a carrier, defining an active portion and a dummy portion of the RDL, and placing a semiconductor die over the dummy portion of the RDL.
摘要翻译: 本公开提供了一种半导体结构。 半导体结构包括载体,载体上的第一再分配层(RDL),第一RDL上的半导体管芯,半导体管芯和第一RDL之间的粘合层,以及封装第一RDL,半导体管芯 ,和粘合剂层。 第一RDL包括与半导体结构的任何部件电隔离的至少一个图案。 本公开提供了一种制造本文所讨论的半导体结构的方法。 该方法包括在载体上形成RDL,限定RDL的有效部分和虚拟部分,以及将半导体管芯放置在RDL的虚拟部分上。
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公开(公告)号:US09397063B2
公开(公告)日:2016-07-19
申请号:US14707465
申请日:2015-05-08
申请人: Tessera, Inc.
发明人: Belgacem Haba
IPC分类号: H01L21/00 , H01L23/00 , H01L21/48 , H01L23/498 , H01L25/065 , H01L25/10 , H01L25/00 , H01L21/50 , H01L23/52 , B82Y40/00
CPC分类号: H01L24/17 , B82Y40/00 , H01L21/4853 , H01L21/50 , H01L23/49811 , H01L23/52 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/73 , H01L24/81 , H01L24/92 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/05644 , H01L2224/05647 , H01L2224/06181 , H01L2224/116 , H01L2224/1182 , H01L2224/11821 , H01L2224/13101 , H01L2224/13144 , H01L2224/13147 , H01L2224/13644 , H01L2224/13794 , H01L2224/13911 , H01L2224/13944 , H01L2224/13947 , H01L2224/16057 , H01L2224/16113 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/29111 , H01L2224/73104 , H01L2224/81026 , H01L2224/81099 , H01L2224/81143 , H01L2224/81192 , H01L2224/81193 , H01L2224/81444 , H01L2224/81447 , H01L2224/81801 , H01L2224/9211 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15321 , H01L2924/20102 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , Y10S977/773 , H01L2224/81 , H01L2924/00 , H01L2224/05552
摘要: A method of making an assembly includes the steps of applying metallic nanoparticles to exposed surfaces of conductive elements of either of or both of a first component and a second component, juxtaposing the conductive elements of the first component with the conductive elements of the second component with the metallic nanoparticles disposed therebetween, and elevating a temperature at least at interfaces of the juxtaposed conductive elements to a joining temperature at which the metallic nanoparticles cause metallurgical joints to form between the juxtaposed conductive elements. The conductive elements of either of or both of the first component and the second component can include substantially rigid posts having top surfaces projecting a height above the surface of the respective component and edge surfaces extending at substantial angles away from the top surfaces thereof.
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公开(公告)号:US09385024B2
公开(公告)日:2016-07-05
申请号:US14474476
申请日:2014-09-02
申请人: Ziptronix, Inc.
发明人: Qin-Yi Tong , Paul M. Enquist , Anthony Scot Rose
IPC分类号: H01L21/762 , B23K20/02 , H01L21/48 , H01L23/00 , H01L25/00
CPC分类号: H01L21/76251 , B23K20/02 , H01L21/481 , H01L24/09 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/89 , H01L24/90 , H01L25/50 , H01L2224/05568 , H01L2224/05573 , H01L2224/13011 , H01L2224/13099 , H01L2224/13109 , H01L2224/13144 , H01L2224/13147 , H01L2224/32145 , H01L2224/80801 , H01L2224/81011 , H01L2224/81013 , H01L2224/81014 , H01L2224/81136 , H01L2224/81143 , H01L2224/81193 , H01L2224/81208 , H01L2224/8121 , H01L2224/81801 , H01L2224/81815 , H01L2224/8183 , H01L2224/81894 , H01L2224/83095 , H01L2224/8319 , H01L2224/8334 , H01L2224/83801 , H01L2224/8383 , H01L2224/8384 , H01L2224/8385 , H01L2224/83894 , H01L2224/83895 , H01L2224/83907 , H01L2224/9202 , H01L2225/06513 , H01L2924/00013 , H01L2924/01003 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/0106 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/07802 , H01L2924/10329 , H01L2924/12042 , H01L2924/1305 , H01L2924/14 , H01L2924/1532 , H01L2924/351 , Y10T29/49126 , H01L2924/3512 , H01L2924/00 , H01L2224/29099 , H01L2224/05644 , H01L2924/00014 , H01L2224/05664 , H01L2224/05669 , H01L2224/05124 , H01L2224/05147
摘要: A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads formed by contact bonding of the first non-metallic region to the second non-metallic region. At least one of the first and second substrates may be elastically deformed.
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公开(公告)号:US20160190091A1
公开(公告)日:2016-06-30
申请号:US14879581
申请日:2015-10-09
发明人: Etienne Menard , Matthew Meitl , John A. Rogers
CPC分类号: H01L27/1266 , H01L21/6835 , H01L21/76898 , H01L21/7806 , H01L23/481 , H01L23/544 , H01L24/02 , H01L24/05 , H01L24/08 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/73 , H01L24/75 , H01L24/799 , H01L24/82 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/97 , H01L24/98 , H01L27/1214 , H01L27/14618 , H01L31/0203 , H01L31/043 , H01L31/048 , H01L31/1892 , H01L2221/68318 , H01L2221/68322 , H01L2221/6835 , H01L2221/68368 , H01L2221/68372 , H01L2221/68381 , H01L2223/5442 , H01L2223/54426 , H01L2223/54486 , H01L2224/02371 , H01L2224/02372 , H01L2224/0239 , H01L2224/04026 , H01L2224/05548 , H01L2224/056 , H01L2224/08238 , H01L2224/24011 , H01L2224/24137 , H01L2224/24147 , H01L2224/24226 , H01L2224/245 , H01L2224/24998 , H01L2224/2731 , H01L2224/29078 , H01L2224/291 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29344 , H01L2224/3012 , H01L2224/32104 , H01L2224/32146 , H01L2224/32227 , H01L2224/73267 , H01L2224/75263 , H01L2224/75314 , H01L2224/7598 , H01L2224/76155 , H01L2224/80203 , H01L2224/80224 , H01L2224/82007 , H01L2224/821 , H01L2224/82102 , H01L2224/82106 , H01L2224/83093 , H01L2224/83121 , H01L2224/83132 , H01L2224/83191 , H01L2224/83192 , H01L2224/83224 , H01L2224/83805 , H01L2224/83815 , H01L2224/8384 , H01L2224/83851 , H01L2224/83855 , H01L2224/83859 , H01L2224/83862 , H01L2224/83868 , H01L2224/83871 , H01L2224/83874 , H01L2224/92244 , H01L2224/9512 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/014 , H01L2924/10329 , H01L2924/12041 , H01L2924/12044 , H01L2924/14 , H01L2924/15787 , H01S5/02236 , H01S5/02276 , H05K1/18 , H05K13/04 , H05K13/046 , Y02E10/50 , Y10T29/49124 , Y10T29/51 , H01L2924/00014 , H01L2924/00 , H01L2224/13111
摘要: A method of printing transferable components includes pressing a stamp including at least one transferable semiconductor component thereon on a target substrate such that the at least one transferable component and a surface of the target substrate contact opposite surfaces of a conductive eutectic layer. During pressing of the stamp on the target substrate, the at least one transferable component is exposed to electromagnetic radiation that is directed through the transfer stamp to reflow the eutectic layer. The stamp is then separated from the target substrate to delaminate the at least one transferable component from the stamp and print the at least one transferable component onto the surface of the target substrate. Related systems and methods are also discussed.
摘要翻译: 打印可转移部件的方法包括在目标基板上按压包括至少一个可转移半导体部件的印模,使得至少一个可转印部件和目标基板的表面接触导电共晶层的相对表面。 在压印目标基板上的印模时,将至少一个可转印部件暴露于电磁辐射,该电磁辐射被引导通过传送印模以回流共晶层。 然后将印模与目标基材分离,以将印模中的至少一种可转移组分分层,并将该至少一种可转移组分印刷到目标基材的表面上。 还讨论了相关系统和方法。
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