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公开(公告)号：US08193636B2
公开(公告)日：2012-06-05
申请号：US12045029
申请日：2008-03-10
申请人： Jin-Yuan Lee , Hsin-Jung Lo
发明人： Jin-Yuan Lee , Hsin-Jung Lo
IPC分类号： H01L23/48
CPC分类号： H01L24/86 , H01L23/3107 , H01L23/3121 , H01L23/4985 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/29 , H01L24/81 , H01L24/83 , H01L24/90 , H01L2224/02311 , H01L2224/03462 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05181 , H01L2224/05558 , H01L2224/05559 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11462 , H01L2224/1147 , H01L2224/11912 , H01L2224/13147 , H01L2224/13644 , H01L2224/29111 , H01L2224/2919 , H01L2224/81191 , H01L2224/81203 , H01L2224/81801 , H01L2224/83192 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/04941 , H01L2924/04953 , H01L2924/0665 , H01L2924/0781 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2924/01014 , H01L2924/01032 , H01L2924/01031 , H01L2224/05552 , H01L2924/013
摘要： A chip assembly includes a semiconductor chip, a bump and an external circuit. The semiconductor chip includes a semiconductor substrate, a transistor in and on the semiconductor substrate, multiple dielectric layers over the semiconductor substrate, a metallization structure over the semiconductor substrate, wherein the metallization structure is connected to the transistor, and a passivation layer over the metallization structure, over the dielectric layers and over the transistor. The bump is connected to the metallization structure through an opening in the passivation layer, wherein the bump includes an adhesion/barrier layer and a gold layer over the adhesion/barrier layer. The external circuit can be connected to the bump using a tape carrier package (TCP), a chip-on-film (COF) package or a chip-on-glass (COG) assembly.
摘要翻译： 芯片组件包括半导体芯片，凸块和外部电路。 半导体芯片包括半导体衬底，半导体衬底中和晶体管，半导体衬底上的多个电介质层，半导体衬底上的金属化结构，其中金属化结构连接到晶体管，以及金属化之上的钝化层 结构，在电介质层和晶体管上方。 凸块通过钝化层中的开口连接到金属化结构，其中凸块包括粘合/阻挡层和粘附/阻挡层上的金层。 外部电路可以使用载带封装（TCP），片上芯片（COF）封装或玻璃（COG）组件连接到凸块。
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2.发明申请INTEGRATED CIRCUIT CHIP USING TOP POST-PASSIVATION TECHNOLOGY AND BOTTOM STRUCTURE TECHNOLOGY 有权使用顶尖后置技术和底部结构技术的集成电路芯片公开(公告)号：US20100246152A1
公开(公告)日：2010-09-30
申请号：US12722483
申请日：2010-03-11
申请人： Mou-Shiung Lin , Jin-Yuan Lee , Hsin-Jung Lo , Ping-Jung Yang , Te-Sheng Liu
发明人： Mou-Shiung Lin , Jin-Yuan Lee , Hsin-Jung Lo , Ping-Jung Yang , Te-Sheng Liu
IPC分类号： H05K7/00
CPC分类号： G06F1/16 , G11C5/147 , H01L21/563 , H01L23/3128 , H01L23/3171 , H01L23/3192 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L23/60 , H01L23/66 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/50 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L25/50 , H01L2223/6611 , H01L2223/6666 , H01L2224/02166 , H01L2224/02311 , H01L2224/02313 , H01L2224/02321 , H01L2224/0233 , H01L2224/02331 , H01L2224/0235 , H01L2224/0237 , H01L2224/02371 , H01L2224/02375 , H01L2224/02381 , H01L2224/0239 , H01L2224/024 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/03612 , H01L2224/03614 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05024 , H01L2224/05027 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05176 , H01L2224/05181 , H01L2224/05187 , H01L2224/05541 , H01L2224/05548 , H01L2224/05554 , H01L2224/0556 , H01L2224/05567 , H01L2224/05572 , H01L2224/056 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/11 , H01L2224/11009 , H01L2224/1132 , H01L2224/11334 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11849 , H01L2224/119 , H01L2224/1191 , H01L2224/13 , H01L2224/13006 , H01L2224/1302 , H01L2224/13022 , H01L2224/13024 , H01L2224/13082 , H01L2224/13083 , H01L2224/13084 , H01L2224/13099 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/13294 , H01L2224/133 , H01L2224/13311 , H01L2224/13609 , H01L2224/1403 , H01L2224/1411 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/16265 , H01L2224/17181 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/293 , H01L2224/29339 , H01L2224/32105 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48111 , H01L2224/48145 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2224/48664 , H01L2224/48669 , H01L2224/48764 , H01L2224/48769 , H01L2224/48824 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/4911 , H01L2224/49175 , H01L2224/4918 , H01L2224/73203 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/81191 , H01L2224/81411 , H01L2224/81444 , H01L2224/81801 , H01L2224/81815 , H01L2224/8185 , H01L2224/81895 , H01L2224/81903 , H01L2224/83101 , H01L2224/83104 , H01L2224/83851 , H01L2224/92 , H01L2224/9202 , H01L2224/92125 , H01L2224/92127 , H01L2224/92147 , H01L2224/92225 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06562 , H01L2225/06589 , H01L2225/1023 , H01L2225/1029 , H01L2225/1058 , H01L2225/107 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01056 , H01L2924/01059 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10253 , H01L2924/10329 , H01L2924/12041 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/1421 , H01L2924/1433 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/30105 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2224/48869 , H01L2224/48744 , H01L2924/00012 , H01L2224/03 , H01L2224/0361 , H01L2924/0665 , H01L2224/81 , H01L2224/83 , H01L24/78 , H01L2224/85 , H01L21/56 , H01L21/78 , H01L2924/0635 , H01L2924/07025 , H01L21/304 , H01L21/76898 , H01L2224/0231
摘要： Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.
摘要翻译： 公开了集成电路芯片和芯片封装，其包括在集成电路芯片的顶部处的过钝化方案，以及使用顶部后钝化技术和底部结构技术的集成电路芯片的底部的底部方案。 集成电路芯片可以通过过钝化方案或者通过钝化方案连接到外部电路或结构，例如球栅阵列（BGA）衬底，印刷电路板，半导体芯片，金属衬底，玻璃衬底或陶瓷衬底 底部方案。 描述了相关的制造技术。
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公开(公告)号：US07964961B2
公开(公告)日：2011-06-21
申请号：US12101127
申请日：2008-04-10
申请人： Jin-Yuan Lee , Hsin-Jung Lo
发明人： Jin-Yuan Lee , Hsin-Jung Lo
IPC分类号： H01L23/485
CPC分类号： H01L24/86 , H01L21/563 , H01L23/3128 , H01L23/49531 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L2224/0231 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05171 , H01L2224/05181 , H01L2224/05184 , H01L2224/05572 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/1147 , H01L2224/11912 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48644 , H01L2224/73204 , H01L2224/81203 , H01L2224/81205 , H01L2224/81801 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2224/05552 , H01L2924/00012 , H01L2924/013 , H01L2924/01014
摘要： A chip package includes a semiconductor chip, a flexible circuit film and a substrate. The substrate has a circuit structure in the substrate. The flexible circuit film is connected to the circuit structure of the substrate through metal joints, an anisotropic conductive film or wireboning wires. The semiconductor chip has fine-pitched metal bumps having a thickness of between 5 and 50 micrometers, and preferably of between 10 and 25 micrometers, and the semiconductor chip is joined with the flexible circuit film by the fine-pitched metal bumps using a chip-on-film (COF) technology or tape-automated-bonding (TAB) technology. A pitch of the neighboring metal bumps is less than 35 micrometers, such as between 10 and 30 micrometers.
摘要翻译： 芯片封装包括半导体芯片，柔性电路膜和基板。 衬底在衬底中具有电路结构。 柔性电路膜通过金属接头，各向异性导电膜或铁丝网连接到基板的电路结构。 半导体芯片具有厚度在5微米至50微米之间，优选10微米至25微米之间的微细金属凸块，并且半导体芯片通过微细凸起的金属凸块与柔性电路膜接合， （COF）技术或胶带自动键合（TAB）技术。 相邻金属凸块的间距小于35微米，例如在10和30微米之间。
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公开(公告)号：US20080284014A1
公开(公告)日：2008-11-20
申请号：US12045029
申请日：2008-03-10
申请人： Jin-Yuan Lee , Hsin-Jung Lo
发明人： Jin-Yuan Lee , Hsin-Jung Lo
IPC分类号： H01L23/52
CPC分类号： H01L24/86 , H01L23/3107 , H01L23/3121 , H01L23/4985 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/29 , H01L24/81 , H01L24/83 , H01L24/90 , H01L2224/02311 , H01L2224/03462 , H01L2224/0401 , H01L2224/05018 , H01L2224/05027 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05181 , H01L2224/05558 , H01L2224/05559 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11462 , H01L2224/1147 , H01L2224/11912 , H01L2224/13147 , H01L2224/13644 , H01L2224/29111 , H01L2224/2919 , H01L2224/81191 , H01L2224/81203 , H01L2224/81801 , H01L2224/83192 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/04941 , H01L2924/04953 , H01L2924/0665 , H01L2924/0781 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2924/01014 , H01L2924/01032 , H01L2924/01031 , H01L2224/05552 , H01L2924/013
摘要： A chip assembly includes a semiconductor chip, a bump and an external circuit. The semiconductor chip includes a semiconductor substrate, a transistor in and on the semiconductor substrate, multiple dielectric layers over the semiconductor substrate, a metallization structure over the semiconductor substrate, wherein the metallization structure is connected to the transistor, and a passivation layer over the metallization structure, over the dielectric layers and over the transistor. The bump is connected to the metallization structure through an opening in the passivation layer, wherein the bump includes an adhesion/barrier layer and a gold layer over the adhesion/barrier layer. The external circuit can be connected to the bump using a tape carrier package (TCP), a chip-on-film (COF) package or a chip-on-glass (COG) assembly.
摘要翻译： 芯片组件包括半导体芯片，凸块和外部电路。 半导体芯片包括半导体衬底，半导体衬底中和晶体管，半导体衬底上的多个电介质层，半导体衬底上的金属化结构，其中金属化结构连接到晶体管，以及金属化之上的钝化层 结构，在电介质层和晶体管上方。 凸块通过钝化层中的开口连接到金属化结构，其中凸块包括粘合/阻挡层和粘附/阻挡层上的金层。 外部电路可以使用载带封装（TCP），片上芯片（COF）封装或玻璃（COG）组件连接到凸块。
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5.发明授权Integrated circuit chip using top post-passivation technology and bottom structure technology 有权集成电路芯片采用顶级后钝化技术和底层结构技术公开(公告)号：US08456856B2
公开(公告)日：2013-06-04
申请号：US12722483
申请日：2010-03-11
申请人： Mou-Shiung Lin , Jin-Yuan Lee , Hsin-Jung Lo , Ping-Jung Yang , Te-Sheng Liu
发明人： Mou-Shiung Lin , Jin-Yuan Lee , Hsin-Jung Lo , Ping-Jung Yang , Te-Sheng Liu
CPC分类号： G06F1/16 , G11C5/147 , H01L21/563 , H01L23/3128 , H01L23/3171 , H01L23/3192 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L23/60 , H01L23/66 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/50 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L25/50 , H01L2223/6611 , H01L2223/6666 , H01L2224/02166 , H01L2224/02311 , H01L2224/02313 , H01L2224/02321 , H01L2224/0233 , H01L2224/02331 , H01L2224/0235 , H01L2224/0237 , H01L2224/02371 , H01L2224/02375 , H01L2224/02381 , H01L2224/0239 , H01L2224/024 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/03612 , H01L2224/03614 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/04042 , H01L2224/05024 , H01L2224/05027 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05176 , H01L2224/05181 , H01L2224/05187 , H01L2224/05541 , H01L2224/05548 , H01L2224/05554 , H01L2224/0556 , H01L2224/05567 , H01L2224/05572 , H01L2224/056 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/11 , H01L2224/11009 , H01L2224/1132 , H01L2224/11334 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11849 , H01L2224/119 , H01L2224/1191 , H01L2224/13 , H01L2224/13006 , H01L2224/1302 , H01L2224/13022 , H01L2224/13024 , H01L2224/13082 , H01L2224/13083 , H01L2224/13084 , H01L2224/13099 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/13294 , H01L2224/133 , H01L2224/13311 , H01L2224/13609 , H01L2224/1403 , H01L2224/1411 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/16265 , H01L2224/17181 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/293 , H01L2224/29339 , H01L2224/32105 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48111 , H01L2224/48145 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2224/48664 , H01L2224/48669 , H01L2224/48764 , H01L2224/48769 , H01L2224/48824 , H01L2224/48844 , H01L2224/48847 , H01L2224/48864 , H01L2224/4911 , H01L2224/49175 , H01L2224/4918 , H01L2224/73203 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/81191 , H01L2224/81411 , H01L2224/81444 , H01L2224/81801 , H01L2224/81815 , H01L2224/8185 , H01L2224/81895 , H01L2224/81903 , H01L2224/83101 , H01L2224/83104 , H01L2224/83851 , H01L2224/92 , H01L2224/9202 , H01L2224/92125 , H01L2224/92127 , H01L2224/92147 , H01L2224/92225 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06562 , H01L2225/06589 , H01L2225/1023 , H01L2225/1029 , H01L2225/1058 , H01L2225/107 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01032 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01056 , H01L2924/01059 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10253 , H01L2924/10329 , H01L2924/12041 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/1421 , H01L2924/1433 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/30105 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2224/48869 , H01L2224/48744 , H01L2924/00012 , H01L2224/03 , H01L2224/0361 , H01L2924/0665 , H01L2224/81 , H01L2224/83 , H01L24/78 , H01L2224/85 , H01L21/56 , H01L21/78 , H01L2924/0635 , H01L2924/07025 , H01L21/304 , H01L21/76898 , H01L2224/0231
摘要： Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.
摘要翻译： 公开了集成电路芯片和芯片封装，其包括在集成电路芯片的顶部处的过钝化方案，以及使用顶部后钝化技术和底部结构技术的集成电路芯片的底部的底部方案。 集成电路芯片可以通过过钝化方案或者通过钝化方案连接到外部电路或结构，例如球栅阵列（BGA）衬底，印刷电路板，半导体芯片，金属衬底，玻璃衬底或陶瓷衬底 底部方案。 描述了相关的制造技术。
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公开(公告)号：US20080251940A1
公开(公告)日：2008-10-16
申请号：US12101127
申请日：2008-04-10
申请人： Jin-Yuan Lee , Hsin-Jung Lo
发明人： Jin-Yuan Lee , Hsin-Jung Lo
IPC分类号： H01L23/52
CPC分类号： H01L24/86 , H01L21/563 , H01L23/3128 , H01L23/49531 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L2224/0231 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05171 , H01L2224/05181 , H01L2224/05184 , H01L2224/05572 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/1147 , H01L2224/11912 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48644 , H01L2224/73204 , H01L2224/81203 , H01L2224/81205 , H01L2224/81801 , H01L2924/00013 , H01L2924/0002 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10329 , H01L2924/12044 , H01L2924/1305 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/19107 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2224/05552 , H01L2924/00012 , H01L2924/013 , H01L2924/01014
摘要： A chip package includes a semiconductor chip, a flexible circuit film and a substrate. The substrate has a circuit structure in the substrate. The flexible circuit film is connected to the circuit structure of the substrate through metal joints, an anisotropic conductive film or wireboning wires. The semiconductor chip has fine-pitched metal bumps having a thickness of between 5 and 50 micrometers, and preferably of between 10 and 25 micrometers, and the semiconductor chip is joined with the flexible circuit film by the fine-pitched metal bumps using a chip-on-film (COF) technology or tape-automated-bonding (TAB) technology. A pitch of the neighboring metal bumps is less than 35 micrometers, such as between 10 and 30 micrometers.
摘要翻译： 芯片封装包括半导体芯片，柔性电路膜和基板。 衬底在衬底中具有电路结构。 柔性电路膜通过金属接头，各向异性导电膜或铁丝网连接到基板的电路结构。 半导体芯片具有厚度在5微米至50微米之间，优选10微米至25微米之间的微细金属凸块，并且半导体芯片通过微细凸起的金属凸块与柔性电路膜接合， （COF）技术或胶带自动键合（TAB）技术。 相邻金属凸块的间距小于35微米，例如在10和30微米之间。
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公开(公告)号：US20120193785A1
公开(公告)日：2012-08-02
申请号：US13358496
申请日：2012-01-25
申请人： Mou-Shiung Lin , Ping-Jung Yang , Hsin-Jung Lo , Te-Sheng Liu , Jin-Yuan Lee
发明人： Mou-Shiung Lin , Ping-Jung Yang , Hsin-Jung Lo , Te-Sheng Liu , Jin-Yuan Lee
IPC分类号： H01L23/498
CPC分类号： H01L25/0657 , H01L21/76229 , H01L21/76898 , H01L23/481 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/80 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/50 , H01L2221/6835 , H01L2221/68377 , H01L2223/54426 , H01L2224/0345 , H01L2224/03462 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05009 , H01L2224/05187 , H01L2224/05558 , H01L2224/05569 , H01L2224/0557 , H01L2224/05572 , H01L2224/05624 , H01L2224/05655 , H01L2224/08145 , H01L2224/13111 , H01L2224/16225 , H01L2224/29187 , H01L2224/2919 , H01L2224/32145 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/48463 , H01L2224/48599 , H01L2224/48624 , H01L2224/48655 , H01L2224/48724 , H01L2224/48755 , H01L2224/48799 , H01L2224/48824 , H01L2224/48855 , H01L2224/80896 , H01L2224/8385 , H01L2224/83896 , H01L2224/9202 , H01L2224/9212 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06541 , H01L2225/06544 , H01L2225/06562 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01057 , H01L2924/01058 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/10335 , H01L2924/12036 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/1436 , H01L2924/1437 , H01L2924/1438 , H01L2924/1441 , H01L2924/1451 , H01L2924/14511 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2224/80 , H01L2224/83 , H01L2924/01046 , H01L2924/00 , H01L2224/05552 , H01L2224/8203 , H01L2224/821 , H01L2224/80001 , H01L2224/82
摘要： Multichip packages or multichip modules may include stacked chips and through silicon/substrate vias (TSVs) formed using enclosure-first technology. Enclosure-first technology may include forming an isolation enclosure associated with a TSV early in the fabrication process, without actually forming the associated TSV. The TSV associated with the isolation enclosure is formed later in the fabrication process. The enclosure-first technology allows the isolation enclosures to be used as alignment marks for stacking additional chips. The stacked chips can be connected to each other or to an external circuit such that data input is provided through the bottom-most (or topmost) chip, data is output from the bottom-most (or topmost) chip. The multichip package may provide a serial data connection, and a parallel connection, to each of the stacked chips.
摘要翻译： 多芯片封装或多芯片模块可以包括堆叠芯片和通过使用封装第一技术形成的硅/衬底通孔（TSV）。 外壳首先技术可以包括在制造过程的早期形成与TSV相关联的隔离外壳，而不实际形成相关的TSV。 与隔离罩相关联的TSV在制造过程中稍后形成。 封装第一技术允许隔离外壳用作堆叠附加芯片的对准标记。 堆叠的芯片可以彼此连接或连接到外部电路，使得通过最底部（或最上面）芯片提供数据输入，数据从最底部（或最顶端）的芯片输出。 多芯片封装可以向每个堆叠的芯片提供串行数据连接和并联连接。
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8.发明申请公开(公告)号：US20110266669A1
公开(公告)日：2011-11-03
申请号：US13181255
申请日：2011-07-12
申请人： Chiu-Ming Chou , Chien-Kang Chou , Ching-San Lin , Mou-Shiung Lin , Hsin-Jung Lo
发明人： Chiu-Ming Chou , Chien-Kang Chou , Ching-San Lin , Mou-Shiung Lin , Hsin-Jung Lo
IPC分类号： H01L23/532
CPC分类号： H01L24/73 , H01L23/5329 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/48 , H01L24/49 , H01L2224/0231 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05155 , H01L2224/05173 , H01L2224/05176 , H01L2224/05553 , H01L2224/05572 , H01L2224/05599 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/1147 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/13173 , H01L2224/13176 , H01L2224/48463 , H01L2224/48477 , H01L2224/4943 , H01L2224/85051 , H01L2224/85399 , H01L2924/00013 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01059 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/10329 , H01L2924/14 , H01L2924/15788 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/13099 , H01L2224/45099 , H01L2924/00 , H01L2224/4554
摘要： The invention provides a semiconductor chip comprising an interconnecting structure over said passivation layer. The interconnecting structure comprises a first contact pad connected to a second contact pad exposed by an opening in a passivation layer. A metal bump is on the first contact pad and over multiple semiconductor devices, wherein the metal bump has more than 50 percent by weight of gold and has a height of between 8 and 50 microns
摘要翻译： 本发明提供一种包括在所述钝化层上的互连结构的半导体芯片。 互连结构包括连接到由钝化层中的开口暴露的第二接触焊盘的第一接触焊盘。 金属凸块位于第一接触焊盘上并且在多个半导体器件上，其中金属凸块具有超过50重量％的金并且具有在8和50微米之间的高度
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公开(公告)号：US20110215469A1
公开(公告)日：2011-09-08
申请号：US13108811
申请日：2011-05-16
申请人： Hsin-Jung Lo , Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
发明人： Hsin-Jung Lo , Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
IPC分类号： H01L23/498 , H01L23/48
CPC分类号： H01L24/11 , H01L21/2885 , H01L21/3144 , H01L21/31612 , H01L21/3185 , H01L21/76801 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/02166 , H01L2224/0231 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05083 , H01L2224/05556 , H01L2224/05567 , H01L2224/05568 , H01L2224/05571 , H01L2224/05644 , H01L2224/1147 , H01L2224/13021 , H01L2224/13023 , H01L2224/13099 , H01L2224/13144 , H01L2224/45144 , H01L2224/48463 , H01L2224/48644 , H01L2224/48844 , H01L2924/00011 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19043 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2224/05552 , H01L2924/01004
摘要： A method for fabricating a circuitry component comprises depositing a first metal layer over a substrate; forming a first pattern-defining layer over said first metal layer, a first opening in said first pattern-defining layer exposing said first metal layer; depositing a second metal layer over said first metal layer exposed by said first opening; removing said first pattern-defining layer; forming a second pattern-defining layer over said second metal layer, a second opening in said second pattern-defining layer exposing said second metal layer; depositing a third metal layer over said second metal layer exposed by said second opening; removing said second pattern-defining layer; removing said first metal layer not under said second metal layer; and forming a polymer layer over said second metal layer, wherein said third metal layer is used as a metal bump bonded to an external circuitry.
摘要翻译： 一种用于制造电路部件的方法，包括在衬底上沉积第一金属层; 在所述第一金属层上形成第一图案界定层，所述第一图案限定层中的第一开口露出所述第一金属层; 在由所述第一开口暴露的所述第一金属层上沉积第二金属层; 去除所述第一图案限定层; 在所述第二金属层上形成第二图案界定层，所述第二图案限定层中的第二开口暴露所述第二金属层; 在由所述第二开口露出的所述第二金属层上沉积第三金属层; 去除所述第二图案限定层; 去除不在所述第二金属层下方的所述第一金属层; 以及在所述第二金属层上形成聚合物层，其中所述第三金属层用作结合到外部电路的金属凸块。
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公开(公告)号：US07960269B2
公开(公告)日：2011-06-14
申请号：US11491117
申请日：2006-07-24
申请人： Hsin-Jung Lo , Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
发明人： Hsin-Jung Lo , Mou-Shiung Lin , Chiu-Ming Chou , Chien-Kang Chou
IPC分类号： H01L21/44
CPC分类号： H01L24/11 , H01L21/2885 , H01L21/3144 , H01L21/31612 , H01L21/3185 , H01L21/76801 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/02166 , H01L2224/0231 , H01L2224/0347 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05083 , H01L2224/05556 , H01L2224/05567 , H01L2224/05568 , H01L2224/05571 , H01L2224/05644 , H01L2224/1147 , H01L2224/13021 , H01L2224/13023 , H01L2224/13099 , H01L2224/13144 , H01L2224/45144 , H01L2224/48463 , H01L2224/48644 , H01L2224/48844 , H01L2924/00011 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/09701 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/19041 , H01L2924/19043 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2224/05552 , H01L2924/01004
摘要： A method for fabricating a circuitry component comprises depositing a first metal layer over a substrate; forming a first pattern-defining layer over said first metal layer, a first opening in said first pattern-defining layer exposing said first metal layer; depositing a second metal layer over said first metal layer exposed by said first opening; removing said first pattern-defining layer; forming a second pattern-defining layer over said second metal layer, a second opening in said second pattern-defining layer exposing said second metal layer; depositing a third metal layer over said second metal layer exposed by said second opening; removing said second pattern-defining layer; removing said first metal layer not under said second metal layer; and forming a polymer layer over said second metal layer, wherein said third metal layer is used as a metal bump bonded to an external circuitry.
摘要翻译： 一种用于制造电路部件的方法，包括在衬底上沉积第一金属层; 在所述第一金属层上形成第一图案界定层，所述第一图案限定层中的第一开口露出所述第一金属层; 在由所述第一开口暴露的所述第一金属层上沉积第二金属层; 去除所述第一图案限定层; 在所述第二金属层上形成第二图案限定层，在所述第二图案限定层中的第二开口暴露所述第二金属层; 在由所述第二开口暴露的所述第二金属层上沉积第三金属层; 去除所述第二图案限定层; 去除不在所述第二金属层下方的所述第一金属层; 以及在所述第二金属层上形成聚合物层，其中所述第三金属层用作结合到外部电路的金属凸块。
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