公开(公告)号：US09385083B1

公开(公告)日：2016-07-05

申请号：US14720619

申请日：2015-05-22

申请人： HRL Laboratories, LLC

发明人： Florian G. Herrault ,  Melanie S. Yajima ,  Alexandros Margomenos ,  Miroslav Micovic

IPC分类号： H01L21/00 ,  H01L23/10 ,  H01L23/528 ,  H01L23/36 ,  H01L21/768 ,  H01L23/532 ,  H05K7/20

CPC分类号： H01L24/70 ,  H01L21/0273 ,  H01L21/2885 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/3736 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/64 ,  H01L24/82 ,  H01L24/89 ,  H01L24/96 ,  H01L25/105 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13023 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/16227 ,  H01L2224/24137 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/01022 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/05432 ,  H01L2924/06 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H05K7/20154

摘要： An interconnect for electrically coupling pads formed on adjacent chips or on packaging material adjacent the chips, with an electrically conductive heat sink being disposed between the pads, the interconnect comprising a metallic membrane layer disposed between two adjacent pads and disposed or bridging over the electrically conductive heat sink so as to avoid making electrical contact with the electrically conductive heat sink. An electroplated metallic layer is disposed on the metallic membrane layer. Fabrication of interconnect permits multiple interconnects to be formed in parallel using fabrication techniques compatible with wafer level fabrication of the interconnects. The interconnects preferably follow a smooth curve to electrically connect adjacent pads and following that smooth curve they bridge over the intervening electrically conductive heat sink material in a predictable fashion.

摘要翻译： 用于电耦合形成在相邻芯片上或邻近芯片的封装材料上的焊盘的互连，其中导电散热器设置在焊盘之间，所述互连件包括设置在两个相邻焊盘之间的金属膜层，并且设置或桥接在导电 散热器，以避免与导电散热器电接触。 电镀金属层设置在金属膜层上。 互连的制造允许使用与互连的晶片级制造兼容的制造技术来并行形成多个互连。 互连优选地遵循平滑曲线以电连接相邻的焊盘，并且遵循那些平滑的曲线，它们以可预测的方式在介于中间的导电散热器材料之间桥接。

公开(公告)号：US09368458B2

公开(公告)日：2016-06-14

申请号：US13938821

申请日：2013-07-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Wei Wu ,  Szu Wei Lu ,  Jing-Cheng Lin

IPC分类号： H01L23/58 ,  H01L23/498 ,  H01L23/00 ,  H01L23/16 ,  H01L23/544 ,  H01L23/10 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/48 ,  H01L23/14 ,  H01L21/48 ,  H01L21/768

CPC分类号： H01L21/3205 ,  H01L21/283 ,  H01L21/3213 ,  H01L21/34 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/10 ,  H01L23/147 ,  H01L23/16 ,  H01L23/28 ,  H01L23/31 ,  H01L23/3157 ,  H01L23/4334 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2021/6024 ,  H01L2223/5446 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/0226 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/11318 ,  H01L2224/13026 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81139 ,  H01L2224/92124 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/06 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/2064 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00

摘要： A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a second corner edge of the interposer chip. A die is bonded to the frontside of the interposer chip. At least one dam structure is formed on the corner area of the backside of the interposer chip. The dam structure includes an edge aligned to at least one the first corner edge and the second corner edge of the interposer chip.

摘要翻译： 半导体封装包括具有前侧，后侧和背面上的角部区域的插入器芯片，其由插入器芯片的第一角边缘和第二拐角边缘限定。 芯片结合到插入器芯片的前侧。 在插入器芯片的背面的拐角区域上形成至少一个坝结构。 坝结构包括与插入器芯片的第一角边缘和第二拐角边缘中的至少一个对准的边缘。

公开(公告)号：US09343435B2

公开(公告)日：2016-05-17

申请号：US14459962

申请日：2014-08-14

申请人： Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Fucheng Chen ,  Yao Liu ,  Herb He Huang

IPC分类号： H01L21/44 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L24/09 ,  H01L24/89 ,  H01L25/50 ,  H01L2224/03614 ,  H01L2224/0382 ,  H01L2224/08145 ,  H01L2224/80355 ,  H01L2225/06513 ,  H01L2924/06 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device may include providing a first dielectric layer and a first set of conductive pads on a first substrate. Each conductive pad of the first set of conductive pads may be positioned between portions of the first dielectric layer. The method may further include providing a first insulating material layer to cover the first dielectric layer and the first set of conductive pads. The method may further include removing portions of the first insulating material layer to form a first insulating layer. Openings of the first insulating layer may expose the first set of conductive pads.

摘要翻译： 半导体器件的制造方法可以包括在第一衬底上提供第一电介质层和第一组导电焊盘。 第一组导电焊盘的每个导电焊盘可以位于第一介电层的部分之间。 该方法还可以包括提供第一绝缘材料层以覆盖第一介电层和第一组导电焊盘。 该方法还可以包括去除第一绝缘材料层的部分以形成第一绝缘层。 第一绝缘层的开口可露出第一组导电焊盘。

公开(公告)号：US09337165B2

公开(公告)日：2016-05-10

申请号：US14525462

申请日：2014-10-28

申请人： Tessera, Inc.

发明人： Hiroaki Sato ,  Kiyoaki Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L21/56 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L24/83 ,  H01L21/561 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/02 ,  H01L24/03 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/0231 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/215 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/245 ,  H01L2224/29008 ,  H01L2224/32225 ,  H01L2224/73217 ,  H01L2224/76155 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82104 ,  H01L2224/8284 ,  H01L2224/83053 ,  H01L2224/8309 ,  H01L2224/83091 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/06 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present disclosure is directed to a method for making a microelectronic package that includes assembling a microelectronic unit with a substrate, and electrically connecting redistribution contacts on the microelectronic unit and terminals on the substrate with a conductive matrix material extending within at least one opening extending through the substrate.

摘要翻译： 本公开涉及一种用于制造微电子封装的方法，其包括将微电子单元与衬底组装，并且将导电基体材料电连接到微电子单元上的微电子单元上的重新分布接触和在衬底上的端子之间延伸的至少一个开口 底物。

公开(公告)号：US20160118355A1

公开(公告)日：2016-04-28

申请号：US14525154

申请日：2014-10-27

申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

发明人： Benfu LIN ,  Wanbing YI ,  Wei LU ,  Alex SEE ,  Juan Boon TAN

IPC分类号： H01L23/00 ,  H01L23/522 ,  H01L21/3105 ,  H01L23/528 ,  H01L21/768

CPC分类号： H01L24/05 ,  H01L21/31051 ,  H01L21/76807 ,  H01L21/76877 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/53295 ,  H01L24/02 ,  H01L24/03 ,  H01L24/48 ,  H01L24/85 ,  H01L24/94 ,  H01L2224/02166 ,  H01L2224/023 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03614 ,  H01L2224/03616 ,  H01L2224/0391 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2224/05546 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/06 ,  H01L2924/07025 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Devices and methods for forming a device are presented. The method includes providing a substrate having circuit component and a dielectric layer over the substrate. The dielectric layer includes a plurality of inter level dielectric (ILD) layers and the uppermost dielectric layer includes at least one interconnect. A pad dielectric layer is provided over the uppermost ILD layer. A pad interconnect for receiving a wire bond is formed in the pad dielectric layer. The pad interconnect is coupled to the at least one interconnect of the uppermost ILD layer. A top surface of the pad dielectric layer is substantially coplanar with a top surface of the pad interconnect. A passivation layer is formed over the pad dielectric layer.

摘要翻译： 提出了用于形成装置的装置和方法。 该方法包括在衬底上提供具有电路部件和电介质层的衬底。 电介质层包括多个层间介电层（ILD）层，最上面的介电层包括至少一个互连。 衬垫介电层设置在最上面的ILD层之上。 在焊盘介电层中形成用于接收引线接合的焊盘互连。 焊盘互连耦合到最上面的ILD层的至少一个互连。 焊盘介电层的顶表面与焊盘互连的顶表面基本共面。 在焊盘介电层上形成钝化层。

公开(公告)号：US20160049351A1

公开(公告)日：2016-02-18

申请号：US14827946

申请日：2015-08-17

申请人： Board of Regents University of Oklahoma

发明人： Patrick J. McCann

IPC分类号： H01L23/367 ,  H01L23/00 ,  H01L21/02 ,  H01L23/492 ,  H01L21/683 ,  H01L23/373 ,  H01L23/48

CPC分类号： H01L21/02488 ,  H01L21/02485 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/6835 ,  H01L23/3732 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/3737 ,  H01L24/27 ,  H01L24/32 ,  H01L24/83 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/778 ,  H01L2221/6835 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32245 ,  H01L2224/32502 ,  H01L2224/83191 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/05032 ,  H01L2924/0532 ,  H01L2924/05432 ,  H01L2924/06 ,  H01L2924/07025 ,  H01L2924/1033 ,  H01L2924/1304 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/1423 ,  H01L2924/00

摘要： A high power electronic device package constructed to include a high power electronic device having an epitaxial surface attached to a thermally conductive submount by a thermally conductive interface layer having a eutectic metal contact therein. A gallium nitride high electron mobility transistor (GaN HEMT) having a transistor structure formed of a GaN thin film layer bonded to a thermally conductive host substrate via a thermally conductive interface layer disposed therebetween, and a method of forming the GaN HEMT. The GaN HEMTs can be used in such applications as, for example, power amplifiers with x-band radio frequency (RF) power outputs for micro-radar applications.

摘要翻译： 一种高功率电子器件封装，其被构造为包括具有通过其中具有共晶金属接触的导热界面层附接到导热基座的外延表面的高功率电子器件。 具有通过设置在其间的导热界面层与导热性主体基板结合的GaN薄膜层而形成的晶体管结构的氮化镓高电子迁移率晶体管（GaN HEMT）以及形成GaN HEMT的方法。 GaN HEMT可用于诸如具有用于微雷达应用的x波段射频（RF）功率输出的功率放大器。

公开(公告)号：US20160042976A1

公开(公告)日：2016-02-11

申请号：US14921026

申请日：2015-10-23

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Isabel DE SOUSA ,  Annique LAVOIE ,  Eric SALVAS ,  Michel TURGEON

IPC分类号： H01L21/48 ,  H01L21/3105 ,  H01L21/52 ,  H01L21/56

CPC分类号： H01L23/3675 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/324 ,  H01L21/481 ,  H01L21/4817 ,  H01L21/4882 ,  H01L21/50 ,  H01L21/52 ,  H01L21/563 ,  H01L21/565 ,  H01L22/10 ,  H01L22/12 ,  H01L22/20 ,  H01L23/04 ,  H01L23/367 ,  H01L23/3737 ,  H01L23/42 ,  H01L23/50 ,  H01L24/83 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83048 ,  H01L2224/83191 ,  H01L2224/832 ,  H01L2224/83201 ,  H01L2224/838 ,  H01L2224/83855 ,  H01L2224/83908 ,  H01L2224/83986 ,  H01L2924/06 ,  H01L2924/16251 ,  H01L2924/1659 ,  H01L2924/20102 ,  H01L2924/00 ,  H01L2924/00014

摘要： A packaged assembly is disclosed, including thermal interface material dispensed on an organic package and methods of manufacturing. The method includes dispensing a thermal interface material (TIM) on an electronic assembly. The method further includes removing volatile species of the TIM, prior to lid placement on the electronic assembly. The method further includes placing the lid on the TIM, over the electronic assembly. The method further includes pressing the lid onto the electronic assembly.

公开(公告)号：US20160035707A1

公开(公告)日：2016-02-04

申请号：US14883135

申请日：2015-10-14

申请人： WIN Semiconductors Corp.

发明人： Chang-Hwang HUA ,  Chih-Hsien LIN

IPC分类号： H01L25/065 ,  H01L23/528 ,  H01L23/532 ,  H01L23/31 ,  H01L23/29 ,  H01L23/48 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/4827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/06181 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/92127 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/06 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13051 ,  H01L2924/1306 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/0105 ,  H01L2924/014

摘要： A stacked structure comprises a semiconductor chip which includes a substrate having at least one substrate via hole penetrating through the substrate; at least one backside metal layer formed on a backside of the substrate covering an inner surface of the substrate via hole and at least part of the backside of the substrate; at least one front-side metal layer formed on the front-side of the substrate and electrically connected to the at least one backside metal layer on a top of at least one of the at least one substrate via hole; at least one electronic device formed on the front-side of the substrate and electrically connected to the at least one front-side metal layer; and at least one metal bump formed on at least one of the backside metal layer and the front-side metal layer.

摘要翻译： 层叠结构包括半导体芯片，其包括具有穿透基板的至少一个基板通孔的基板; 至少一个背面金属层，其形成在所述基板的背面上，覆盖所述基板通孔的内表面和所述基板的背面的至少一部分; 至少一个前侧金属层，形成在所述基板的前侧，并且在所述至少一个基板通孔中的至少一个的顶部上电连接到所述至少一个背侧金属层; 至少一个电子器件，其形成在所述衬底的前侧上并电连接到所述至少一个前侧金属层; 以及形成在背侧金属层和前侧金属层中的至少一个上的至少一个金属凸块。

公开(公告)号：US20150325491A1

公开(公告)日：2015-11-12

申请号：US14273754

申请日：2014-05-09

申请人： Aleksandar Aleksov ,  Dilan Seneviratne ,  Charavana K. Gurumurthy ,  Ching-Ping J. Shen ,  Daniel N. Sobieski

发明人： Aleksandar Aleksov ,  Dilan Seneviratne ,  Charavana K. Gurumurthy ,  Ching-Ping J. Shen ,  Daniel N. Sobieski

IPC分类号： H01L23/29 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/564 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L24/96 ,  H01L2224/16245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/06 ,  H01L2924/062 ,  H01L2924/0715 ,  H01L2924/181 ,  H01L2924/1811 ,  H01L2924/186 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： Microelectronic systems encapsulated in a stretchable/flexible material, which is skin/bio-compatible and able to withstand environmental conditions. In one embodiment of the present description, the microelectronic system includes a microelectronic device that is substantially encapsulated in a non-permeable encapsulant, such as, butyl rubbers, ethylene propylene rubbers, fluoropolymer elastomers, or combinations thereof. In another embodiment, the microelectronic system includes a microelectronic device that is substantially encapsulated in a permeable encapsulant, such as polydimethylsiloxane, wherein a non-permeable encapsulant substantially encapsulates the permeable encapsulant.

摘要翻译： 微电子系统封装在可拉伸/柔性材料中，其具有皮肤/生物相容性并能够承受环境条件。 在本说明书的一个实施例中，微电子系统包括微电子器件，其基本上封装在不可渗透的密封剂中，例如丁基橡胶，乙烯丙烯橡胶，含氟聚合物弹性体或其组合。 在另一个实施方案中，微电子系统包括基本上封装在可渗透的密封剂（例如聚二甲基硅氧烷）中的微电子器件，其中非渗透性密封剂基本上封装可渗透的密封剂。

公开(公告)号：US20150318228A1

公开(公告)日：2015-11-05

申请号：US14797752

申请日：2015-07-13

申请人： Murata Manufacturing Co., Ltd.

发明人： Satoshi Ito

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L25/065 ,  H01L23/29 ,  H01L21/56

CPC分类号： H01L23/3114 ,  H01L21/4803 ,  H01L21/563 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3737 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/29387 ,  H01L2224/29393 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/83001 ,  H01L2224/92125 ,  H01L2924/01006 ,  H01L2924/05032 ,  H01L2924/05042 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/06 ,  H01L2924/066 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2924/014

摘要： The present disclosure is intended to provide a module in which connection reliability between a wiring substrate and an electronic component mounted on the wiring substrate can be improved. A module 1 includes a wiring substrate, an electronic component that is mounted on one principal surface of the wiring substrate, an underfill resin layer that is formed all over the one principal surface of the wiring substrate, and that is formed to fill up a gap between the one principal surface of the wiring substrate and the electronic component, and a molded resin layer that is formed to cover the underfill resin layer and the electronic component, wherein the underfill resin layer is formed of a resin containing a filler having a particle diameter that is smaller than a spacing between the one principal surface of the wiring substrate and the electronic component.

摘要翻译： 本公开旨在提供一种模块，其中可以提高布线基板和安装在布线基板上的电子部件之间的连接可靠性。 模块1包括布线基板，安装在布线基板的一个主表面上的电子部件，形成在布线基板的整个主表面上的底部填充树脂层，并且形成为填充间隙 在布线基板的一个主面和电子部件之间，形成有用于覆盖底部填充树脂层和电子部件的成型树脂层，其中，底部填充树脂层由含有粒径的填料的树脂形成 小于布线基板的一个主表面和电子部件之间的间隔。