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公开(公告)号:WO2013161891A1
公开(公告)日:2013-10-31
申请号:PCT/JP2013/062100
申请日:2013-04-24
Applicant: 須賀 唯知 , ボンドテック株式会社
IPC: H01L21/60 , H01L25/065 , H01L25/07 , H01L25/18 , H05K3/32
CPC classification number: H01L25/0652 , B23K31/02 , B23K37/00 , B23K37/0408 , B23K2201/40 , H01L21/6836 , H01L22/10 , H01L23/10 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/09 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/73 , H01L24/74 , H01L24/742 , H01L24/743 , H01L24/75 , H01L24/80 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/95 , H01L25/105 , H01L25/50 , H01L2221/68327 , H01L2224/0384 , H01L2224/03845 , H01L2224/0401 , H01L2224/05009 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06134 , H01L2224/0615 , H01L2224/06177 , H01L2224/08145 , H01L2224/08225 , H01L2224/09181 , H01L2224/1184 , H01L2224/11845 , H01L2224/13009 , H01L2224/13016 , H01L2224/13017 , H01L2224/13021 , H01L2224/13022 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/14134 , H01L2224/1415 , H01L2224/14177 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/17181 , H01L2224/27009 , H01L2224/2755 , H01L2224/27823 , H01L2224/2784 , H01L2224/27845 , H01L2224/29111 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/73103 , H01L2224/74 , H01L2224/7501 , H01L2224/75101 , H01L2224/75102 , H01L2224/7525 , H01L2224/75251 , H01L2224/75252 , H01L2224/75283 , H01L2224/753 , H01L2224/75301 , H01L2224/7531 , H01L2224/75501 , H01L2224/75502 , H01L2224/7565 , H01L2224/75701 , H01L2224/75702 , H01L2224/75753 , H01L2224/75802 , H01L2224/75804 , H01L2224/75824 , H01L2224/75842 , H01L2224/7598 , H01L2224/80003 , H01L2224/8001 , H01L2224/80013 , H01L2224/80065 , H01L2224/8013 , H01L2224/80132 , H01L2224/80143 , H01L2224/80201 , H01L2224/80203 , H01L2224/8022 , H01L2224/8023 , H01L2224/80447 , H01L2224/8083 , H01L2224/80907 , H01L2224/81002 , H01L2224/8101 , H01L2224/81013 , H01L2224/81065 , H01L2224/8113 , H01L2224/81132 , H01L2224/81143 , H01L2224/81193 , H01L2224/81201 , H01L2224/81203 , H01L2224/8122 , H01L2224/8123 , H01L2224/81447 , H01L2224/81801 , H01L2224/81805 , H01L2224/8183 , H01L2224/81907 , H01L2224/83002 , H01L2224/8301 , H01L2224/83013 , H01L2224/83048 , H01L2224/83051 , H01L2224/83065 , H01L2224/83091 , H01L2224/8313 , H01L2224/83132 , H01L2224/83136 , H01L2224/83143 , H01L2224/83193 , H01L2224/83201 , H01L2224/83203 , H01L2224/8322 , H01L2224/8323 , H01L2224/83234 , H01L2224/83355 , H01L2224/83447 , H01L2224/83801 , H01L2224/8383 , H01L2224/83894 , H01L2224/83907 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2225/1023 , H01L2225/1058 , H01L2924/01322 , H01L2924/10157 , H01L2924/10253 , H01L2924/3511 , H01L2224/81 , H01L2924/00012 , H01L2924/00014 , H01L2924/01047 , H01L2224/80 , H01L2224/83 , H01L2924/00
Abstract: 【課題】接合界面に樹脂などの望ましくない残存物を残さないようにして、チップとウエハとの間又は積層された複数のチップ間の電気的接続を確立し機械的強度を上げる、ウエハ上にチップを効率よく接合する技術を提供すること。 【解決手段】金属領域を有するチップ側接合面を有する複数のチップを、複数の接合部を有する基板に接合する方法が、チップ側接合面の金属領域を、表面活性化処理し、かつ親水化処理するステップ(S1)と、基板の接合部を表面活性化処理し、かつ親水化処理するステップ(S2)と、表面活性化処理されかつ親水化処理された複数のチップを、それぞれ、チップの金属領域が基板の接合部に接触するように、表面活性化処理されかつ親水化処理された基板の対応する接合部上に取り付けるステップ(S3)と、基板と基板上に取り付けられた複数のチップとを含む構造体を加熱するステップ(S4)とを備える。
Abstract translation: [问题]提供一种用于将晶片高效地接合到晶片而不在接合界面上留下不需要的残留物(例如树脂)的技术,建立芯片和晶片之间或多个分层芯片之间的电连接并增加机械强度。 [解决方案]本发明的用于将包含金属区域的芯片侧接合表面的多个芯片接合到包括多个接合部分的基板的本发明的方法具有以下步骤:(S1)其中芯片的金属区域 接合表面进行表面活化处理和亲水化处理; 步骤(S2),其中对所述基板的接合部进行表面活化处理和亲水化处理; 已经进行表面活化处理和亲水化处理的多个芯片中的每一个被附着到已进行了表面活化处理和亲水化处理的基板上的相应接合部分的步骤(S3) 处理,使得芯片的金属区域与基板的接合部分接触; 以及步骤(S4),其中包括基板和附接到基板的多个芯片的结构被加热。
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2.USE OF REPELLENT MATERIAL TO PROTECT FABRICATION REGIONS IN SEMICONDUCTOR ASSEMBLY 审中-公开
Title translation: 在半导体组件中使用材料来保护制造区域公开(公告)号:WO2013006447A2
公开(公告)日:2013-01-10
申请号:PCT/US2012044968
申请日:2012-06-29
Applicant: HENKEL CORP , PEDDI RAJ , GASA JEFFREY , KURIYAMA KENJI , YOO HOSEUNG
Inventor: PEDDI RAJ , GASA JEFFREY , KURIYAMA KENJI , YOO HOSEUNG
CPC classification number: H01L21/78 , H01L21/6836 , H01L24/27 , H01L24/29 , H01L24/94 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/27009 , H01L2224/27416 , H01L2224/27848 , H01L2224/2919 , H01L2224/83191 , H01L2224/83856 , H01L2224/94 , H01L2924/12042 , H01L2224/27 , H01L2924/00014 , H01L2924/00
Abstract: A method of preparing semiconductor dies from a semiconductor wafer having a plurality of fabrication regions separated by dicing lines on the top side of the wafer, and an adhesive coating on the back side of the wafer, comprises applying a repellent material to the fabrication regions and dicing lines where the adhesive coating is not intended to be printed; applying the adhesive coating to the back side of the wafer; removing the repellent material; and separating the wafer along the dicing lines into individual dies.
Abstract translation: 一种半导体晶片的半导体晶片的制造方法,其特征在于,在所述晶片的上侧具有由切割线分隔开的多个制造区域和所述晶片的背面侧的粘合剂涂层的半导体晶片的制造方法, 不打印打印粘合剂涂层的切割线; 将粘合剂涂层施加到晶片的背面; 去除驱虫剂材料; 以及将所述晶片沿切割线分离成单独的模具。
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公开(公告)号:WO2015192004A1
公开(公告)日:2015-12-17
申请号:PCT/US2015/035566
申请日:2015-06-12
Applicant: ALPHA METALS, INC.
Inventor: GHOSHAL, Shamik , KUMAR, V., Sathish , VISHWANATH, Pavan , PANDHER, Ranjit, S. , CHANDRAN, Remya , MUKHERJEE, Sutapa , SARKAR, Siuli , SINGH, Bawa , BHATKAL, Ravindra, Mohan
CPC classification number: B22F1/0044 , B22F1/02 , B22F3/1017 , B22F3/22 , B22F5/006 , B22F7/04 , B22F2007/047 , B22F2301/255 , B22F2999/00 , B23K1/0016 , B23K3/0607 , B23K35/0244 , B23K35/3006 , B23K2201/40 , H01L21/6835 , H01L21/78 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/84 , H01L24/85 , H01L24/94 , H01L24/95 , H01L24/97 , H01L2221/68313 , H01L2221/68368 , H01L2224/04026 , H01L2224/05155 , H01L2224/05639 , H01L2224/11003 , H01L2224/11009 , H01L2224/111 , H01L2224/11332 , H01L2224/11334 , H01L2224/11438 , H01L2224/1144 , H01L2224/11505 , H01L2224/11848 , H01L2224/13139 , H01L2224/13294 , H01L2224/13295 , H01L2224/13311 , H01L2224/13324 , H01L2224/13339 , H01L2224/13347 , H01L2224/13355 , H01L2224/13363 , H01L2224/1338 , H01L2224/13384 , H01L2224/13387 , H01L2224/1339 , H01L2224/13393 , H01L2224/13411 , H01L2224/13439 , H01L2224/13444 , H01L2224/13455 , H01L2224/13464 , H01L2224/13469 , H01L2224/1349 , H01L2224/16227 , H01L2224/27002 , H01L2224/27003 , H01L2224/27009 , H01L2224/271 , H01L2224/27312 , H01L2224/2732 , H01L2224/27332 , H01L2224/27334 , H01L2224/27438 , H01L2224/2744 , H01L2224/27505 , H01L2224/2782 , H01L2224/27821 , H01L2224/27848 , H01L2224/29139 , H01L2224/29294 , H01L2224/29295 , H01L2224/29311 , H01L2224/29324 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29355 , H01L2224/29363 , H01L2224/29364 , H01L2224/2938 , H01L2224/29384 , H01L2224/29387 , H01L2224/2939 , H01L2224/29393 , H01L2224/29411 , H01L2224/29439 , H01L2224/29444 , H01L2224/29455 , H01L2224/29464 , H01L2224/29469 , H01L2224/2949 , H01L2224/2969 , H01L2224/32225 , H01L2224/32245 , H01L2224/45014 , H01L2224/75251 , H01L2224/75316 , H01L2224/7598 , H01L2224/81002 , H01L2224/81191 , H01L2224/8184 , H01L2224/81948 , H01L2224/83002 , H01L2224/83191 , H01L2224/83193 , H01L2224/83439 , H01L2224/83444 , H01L2224/83447 , H01L2224/8384 , H01L2224/83948 , H01L2224/94 , H01L2224/95 , H01L2224/97 , H01L2924/00014 , H01L2924/0463 , H01L2924/0503 , H01L2924/05032 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20108 , H01L2924/20109 , H01L2924/2011 , H01L2924/2064 , H05K3/32 , H05K2203/1131 , B22F1/0018 , B22F1/025 , H01L2224/11 , H01L2924/00012 , H01L2224/81 , H01L2224/83 , H01L2224/27 , H01L2924/01046 , H01L2924/01029 , H01L2924/01042 , H01L2924/01028 , H01L2924/0105 , H01L2924/01006 , H01L2924/01005 , H01L2224/45015 , H01L2924/207
Abstract: Methods for die attachment of multichip and single components including flip chips may involve printing a sintering paste on a substrate or on the back side of a die. Printing may involve stencil printing, screen printing, or a dispensing process. Paste may be printed on the back side of an entire wafer prior to dicing, or on the back side of an individual die. Sintering films may also be fabricated and transferred to a wafer, die or substrate. A post-sintering step may increase throughput.
Abstract translation: 包括倒装芯片在内的多芯片和单一部件的裸片附着方法可以包括在基片上或模具的背面上印刷烧结膏。 打印可能涉及模版印刷,丝网印刷或分配过程。 糊剂可以在切割之前或在单独的模具的背面上印刷在整个晶片的背面。 烧结膜也可以被制造并转移到晶片,管芯或衬底。 后烧结步骤可以增加生产量。
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公开(公告)号:WO2008069805A1
公开(公告)日:2008-06-12
申请号:PCT/US2006/047067
申请日:2006-12-08
Applicant: NATIONAL STARCH AND CHEMICAL INVESTMENT HOLDING CORPORATION , WYATT, Derek , DUTT, Gyan , PEREZ, Albert, P.
Inventor: WYATT, Derek , DUTT, Gyan , PEREZ, Albert, P.
IPC: H01L21/60
CPC classification number: H01L21/563 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/11822 , H01L2224/13018 , H01L2224/131 , H01L2224/13111 , H01L2224/27009 , H01L2224/274 , H01L2224/27416 , H01L2224/2919 , H01L2224/73104 , H01L2224/81203 , H01L2224/83191 , H01L2224/83856 , H01L2224/83874 , H01L2224/92 , H01L2224/9211 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01013 , H01L2924/01015 , H01L2924/0102 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01056 , H01L2924/01074 , H01L2924/01082 , H01L2924/0133 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/14 , H01L2924/1433 , H01L2224/11 , H01L2224/27 , H01L2924/0665 , H01L2924/00 , H01L2224/81 , H01L2224/83 , H01L2224/0401
Abstract: A process is described that enables the active side of a bumped wafer to be coated with a front side protection (FSP) material or wafer level underfill (WLUF) without contaminating the solder bumps with the coating material and/or filler. In this process a repellent material is applied to a top portion of the solder bumps on the active side of the wafer, the front side of the wafer is then coated with the coating material, the coating material is hardened, and optionally the repellent material is removed from the solder bumps.
Abstract translation: 描述了使凸起晶片的有源侧涂覆有前侧保护(FSP)材料或晶片级底部填充物(WLUF)的工艺,而不会用涂料和/或填料污染焊料凸块。 在该方法中,将驱避材料施加到晶片的活性侧上的焊料凸起的顶部,然后用涂料涂覆晶片的正面,涂覆材料被硬化,并且任选的驱避材料是 从焊料凸块上取下。
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公开(公告)号:WO2016189643A1
公开(公告)日:2016-12-01
申请号:PCT/JP2015/064998
申请日:2015-05-26
Applicant: 三菱電機株式会社
Inventor: 中田 洋輔
IPC: H01L21/60 , H01L21/304 , H01L21/3205 , H01L21/768 , H01L23/522
CPC classification number: H01L24/27 , H01L21/2253 , H01L21/304 , H01L21/3205 , H01L21/32134 , H01L21/768 , H01L21/82 , H01L23/49562 , H01L23/522 , H01L23/585 , H01L24/29 , H01L24/30 , H01L24/94 , H01L29/083 , H01L2224/27009 , H01L2224/27019 , H01L2224/2745 , H01L2224/2747 , H01L2224/29155 , H01L2224/29644 , H01L2224/30181 , H01L2224/32245 , H01L2224/48247 , H01L2224/48472 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00
Abstract: 第1の主面と、第1の主面の反対側に位置する第2の主面とを有する半導体基板を準備する工程(S01)と、第1の主面上に第1電極を形成する工程(S02)と、第1電極上にはんだ接合用金属膜(第1はんだ接合用金属膜)を形成する工程(S03)と、第1はんだ接合用金属膜上に犠牲膜を形成する工程(S04)と、犠牲膜を形成した後に第2の主面を研削する工程(S06)と、研削する工程(S06)の後に熱処理を行う工程(第3の主面側に素子構造を形成する工程(S07))と、熱処理を行う工程(S07)の後に犠牲膜を除去する工程(S10)と、第1はんだ接合用金属膜と第1外部電極とをはんだ接合する工程(S12)とを備える。
Abstract translation: 本发明提供:一种用于准备半导体衬底的步骤(S01),所述半导体衬底具有位于所述第一主表面的相对侧上的第一主表面和第二主表面; 用于在所述第一主表面上形成第一电极的步骤(S02); 用于在第一电极上形成焊料接合金属膜(第一焊料接合金属膜)的步骤(S03); 用于在第一焊料接合金属膜上形成牺牲膜的步骤(S04); 用于在形成牺牲膜之后研磨第二主表面的步骤(S06); 在步骤(S07)中,在研磨步骤(S06)之后进行热处理(在(S07)中形成在第三主面侧的元件结构); 用于在热处理步骤之后去除牺牲膜的步骤(S10)(S07); 以及用于焊接第一焊料接合金属膜和第一外部电极的步骤(S12)。
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公开(公告)号:WO2016003584A1
公开(公告)日:2016-01-07
申请号:PCT/US2015/034046
申请日:2015-06-03
Applicant: APPLIED MATERIALS, INC.
Inventor: LEI, Wei-Sheng , PAPANU, James S. , EATON, Brad , KUMAR, Ajay
IPC: H01L21/301 , H01L21/78
CPC classification number: H01L24/73 , H01L21/563 , H01L21/6836 , H01L21/78 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/92 , H01L24/94 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/05009 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/27002 , H01L2224/27009 , H01L2224/2741 , H01L2224/27436 , H01L2224/27831 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/73104 , H01L2224/81191 , H01L2224/83191 , H01L2224/92 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/1431 , H01L2924/1434 , H01L2224/27 , H01L2224/11 , H01L2224/73204 , H01L2924/00012 , H01L2924/0665 , H01L2924/06 , H01L2924/00014
Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a wafer involves providing a semiconductor wafer having integrated circuits on a front side thereof, and having a wafer-level underfill material layer disposed on the integrated circuits. The method also involves laser irradiating the semiconductor wafer from a backside of the semiconductor wafer to generate defects along dicing streets of the semiconductor wafer, the dicing streets oriented between the integrated circuits. The method also involves, subsequent to the laser irradiating, mechanically singulating the integrated circuits along the dicing streets.
Abstract translation: 对半导体晶片的切割方法,具有多个集成电路的各晶片进行说明。 在一个示例中,晶片切割的方法包括在其前侧提供具有集成电路的半导体晶片,并且具有设置在集成电路上的晶片级底部填充材料层。 该方法还包括从半导体晶片的背面激光照射半导体晶片,以在半导体晶片的切割街道之间产生缺陷,该切割街道定向在集成电路之间。 该方法还包括在激光照射之后,沿着切割街道机械地分离集成电路。
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