公开(公告)号：US20080099893A1

公开(公告)日：2008-05-01

申请号：US11955856

申请日：2007-12-13

Applicant: Bruce Beauchamp ,  Andrew Tuthill ,  Joseph Fernandez ,  Anucha Phongsantichai

Inventor： Bruce Beauchamp ,  Andrew Tuthill ,  Joseph Fernandez ,  Anucha Phongsantichai

IPC: H01L23/495

CPC classification number: H01L23/49575 ,  H01L23/4952 ,  H01L23/5382 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/4911 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2224/85201 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2224/45139 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An integrated circuit device comprising an integrated circuit die having a plurality of bond pads that are selectively connected to a plurality of inner leads of a leadframe. At least two bond pads are connected to at least one of the inner leads, and/or at least two inner leads are connected to at least one of bond pads with a single bond wire. A single bond wire is ball or wedge bonded to a first bond pad or inner lead and subsequently wedge bonded to one or more second bond pads or inner leads, then it is connected to a third or last bond pad or inner lead. The single bond wire requires only one connection area at each of the bond pad(s) and/or inner lead(s). The bond pad(s) of the die and/or inner lead(s) of the leadframe are thereby electrically connected together by the single bond wire.

Abstract translation: 一种集成电路器件，包括具有多个接合焊盘的集成电路管芯，所述接合焊盘选择性地连接到引线框架的多个内引线。 至少两个接合焊盘连接到内部引线中的至少一个，和/或至少两个内部引线与具有单键焊丝的至少一个接合焊盘连接。 单键线是球形或楔形结合到第一接合焊盘或内部引线，并且随后楔形结合到一个或多个第二接合焊盘或内部引线上，然后连接到第三或最后的接合焊盘或内部引线。 单键线在每个接合焊盘和/或内引线仅需要一个连接区域。 因此，引线框的管芯和/或内部引线的接合焊盘由此通过单键焊丝电连接在一起。

公开(公告)号：US20080061416A1

公开(公告)日：2008-03-13

申请号：US11941257

申请日：2007-11-16

Applicant: Ken Lam

Inventor： Ken Lam

IPC: H01L21/50

CPC classification number: H01L24/49 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49531 ,  H01L23/49551 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48669 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48769 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48869 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85469 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00015 ,  H01L2924/2075 ,  H01L2924/00012

Abstract: An electrical package for an integrated circuit die which comprises a die-attach paddle for mounting the integrated circuit die. The die-attach paddle has at least one down-set area located on a periphery of the die-attach paddle. The down-set area has an upper surface and a lower surface, with the upper surface configured to electrically couple a first end of a first electrically conductive lead wire. A second end of the first electrically conductive lead wire is bonded to the integrated circuit die. The upper surface is further configured to electrically couple a first end of a second electrically conductive lead wire and a second end of the second electrically conductive lead wire is bonded to a lead finger of the electrical package.

Abstract translation: 一种用于集成电路管芯的电气封装，其包括用于安装集成电路管芯的管芯附接焊盘。 管芯附接板具有至少一个位于芯片附接板的周边上的下降区域。 下降区域具有上表面和下表面，其中上表面被配置为电耦合第一导电引线的第一端。 第一导电引线的第二端接合到集成电路管芯。 上表面还被配置为电耦合第二导电引线的第一端，并且第二导电引线的第二端被接合到电气封装的引线指。

公开(公告)号：US20080006951A1

公开(公告)日：2008-01-10

申请号：US11444977

申请日：2006-05-31

Applicant: Francois Hebert ,  Anup Bhalla

Inventor： Francois Hebert ,  Anup Bhalla

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05017 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/85201 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A copper bonding compatible bond pad structure and associated method is disclosed. The device bond pad structure includes a buffering structure formed of regions of interconnect metal and regions of non-conductive passivation material, the buffering structure providing buffering of underlying layers and structures of the device.

Abstract translation: 公开了一种铜键合兼容的键合焊盘结构及其相关方法。 器件接合焊盘结构包括由互连金属的区域和非导电钝化材料的区域形成的缓冲结构，该缓冲结构为器件的下层和结构提供缓冲。

公开(公告)号：US07286588B2

公开(公告)日：2007-10-23

申请号：US11017142

申请日：2004-12-20

Applicant: Simon Jonathan Stacey

Inventor： Simon Jonathan Stacey

IPC: H01S3/08 ,  H01S3/13 ,  H01S5/00

CPC classification number: B82Y20/00 ,  H01L24/45 ,  H01L2224/45144 ,  H01L2224/85201 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01S5/06256 ,  H01S5/06258 ,  H01S5/1203 ,  H01S5/125 ,  H01S5/2275 ,  H01S5/34373 ,  H01L2224/48 ,  H01L2924/00

Abstract: An optoelectronic device having a semiconductor laser diode and a grating structure for stabilizing the optical wavelength of optical radiation generated by the laser diode.

Abstract translation: 一种具有半导体激光二极管和用于稳定由激光二极管产生的光辐射的光学波长的光栅结构的光电器件。

公开(公告)号：US20070228110A1

公开(公告)日：2007-10-04

申请号：US11758479

申请日：2007-06-05

Applicant: Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Gaetan Mathieu

Inventor： Benjamin Eldridge ,  Gary Grube ,  Igor Khandros ,  Gaetan Mathieu

IPC: B23K20/00

CPC classification number: H01L24/72 ,  B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/0483 ,  G01R1/06711 ,  G01R1/07314 ,  G01R1/07342 ,  G01R1/07357 ,  G01R1/07378 ,  G01R31/2884 ,  G01R31/2886 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L21/6715 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/67288 ,  H01L22/20 ,  H01L23/49811 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/12 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48599 ,  H01L2224/49 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/73251 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/78301 ,  H01L2224/81801 ,  H01L2224/81901 ,  H01L2224/85 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/851 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K7/1069 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49149 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/2075 ,  H01L2924/01204 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/01048 ,  H01L2224/72 ,  H01L2924/00012

Abstract: Contact structures exhibiting resilience or compliance for a variety of electronic components are formed by bonding a free end of a wire to a substrate, configuring the wire into a wire stem having a springable shape, severing the wire stem, and overcoating the wire stem with at least one layer of a material chosen primarily for its structural (resiliency, compliance) characteristics. A variety of techniques for configuring, severing, and overcoating the wire stem are disclosed. In an exemplary embodiment, a free end of a wire stem is bonded to a contact area on a substrate, the wire stem is configured to have a springable shape, the wire stem is severed to be free-standing by an electrical discharge, and the free-standing wire stem is overcoated by plating. A variety of materials for the wire stem (which serves as a falsework) and for the overcoat (which serves as a superstructure over the falsework) are disclosed. Various techniques are described for mounting the contact structures to a variety of electronic components (e.g., semiconductor wafers and dies, semiconductor packages, interposers, interconnect substrates, etc.), and various process sequences are described. The resilient contact structures described herein are ideal for making a “temporary” (probe) connections to an electronic component such as a semiconductor die, for burn-in and functional testing. The self-same resilient contact structures can be used for subsequent permanent mounting of the electronic component, such as by soldering to a printed circuit board (PCB). An irregular topography can be created on or imparted to the tip of the contact structure to enhance its ability to interconnect resiliently with another electronic component. Among the numerous advantages of the present invention is the great facility with which the tips of a plurality of contact structures can be made to be coplanar with one another. Other techniques and embodiments, such as wherein the falsework wirestem protrudes beyond an end of the superstructure, or is melted down, and wherein multiple free-standing resilient contact structures can be fabricated from loops, are described.

公开(公告)号：US20070222054A1

公开(公告)日：2007-09-27

申请号：US11743660

申请日：2007-05-02

Applicant: David Hembree

Inventor： David Hembree

IPC: H01L23/48

CPC classification number: H01L25/0657 ,  B23K20/004 ,  B23K20/005 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48145 ,  H01L2224/48455 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48992 ,  H01L2224/78301 ,  H01L2224/8121 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/3025 ,  H05K3/4046 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49117 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49162 ,  Y10T29/49169 ,  Y10T29/53213 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact. The semiconductor component can be used to form chip scale components, wafer scale components, stacked components, or interconnect components for electrically engaging or testing other semiconductor components.

Abstract translation: 用于通过导线互连制造半导体部件的方法包括提供具有电路侧，背面和通孔的基板的步骤。 该方法还包括以下步骤：将导线穿过通孔，在背面的导线上形成接触，在电路侧的导线上形成接合接触，然后将线从接合接触件断开。 通线互连包括通孔中的导线，背侧的触点和电路侧的接合触点。 背面的触点和电路侧的接合触点允许多个部件与相邻部件之间的电连接层叠。 用于执行该方法的系统包括具有通孔的基板和具有接合毛细管的引线接合器，所述接合毛细管被配置为使线穿过通孔，并形成接触和接合接触。 半导体部件可用于形成用于电接合或测试其它半导体部件的芯片级部件，晶片级部件，堆叠部件或互连部件。

公开(公告)号：US20070202682A1

公开(公告)日：2007-08-30

申请号：US11626541

申请日：2007-01-24

Applicant: Kenichi YAMAMOTO ,  Toshinori Kawamura ,  Haruo Akahoshi

Inventor： Kenichi YAMAMOTO ,  Toshinori Kawamura ,  Haruo Akahoshi

IPC: H01L21/44

CPC classification number: H01L23/3128 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05655 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45155 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01016 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/241 ,  H05K3/244 ,  H05K2203/1476 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Improvement in shock-resistant strength of a soldered joint is aimed at, and the variation in the plating film formed on an electrode pad is reduced.In the step which forms a plating film (for example, Ni film) by an electrolytic plating method on the surface of an electrode pad, the first layer is formed in the front surface of the electrode pad with the first current density, and the second layer is formed in the front surface of the first layer with the second current density higher than the first current density after that.

Abstract translation: 针对焊接接头的耐冲击强度的提高，电极焊盘上形成的电镀膜的变化减小。 在电极焊盘的表面上通过电解电镀法形成电镀膜（例如Ni膜）的步骤中，在电极焊盘的前表面形成有第一电流密度的第一层，第二层 在第一层的前表面形成有第二电流密度高于之后的第一电流密度的层。

公开(公告)号：US20070187707A1

公开(公告)日：2007-08-16

申请号：US11651534

申请日：2007-01-10

Applicant: Yukihiro Tsuji ,  Toshio Nomaguchi

Inventor： Yukihiro Tsuji ,  Toshio Nomaguchi

IPC: H01L33/00 ,  H01L21/00

CPC classification number: H01S5/0425 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05558 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/48644 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/0101 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01088 ,  H01L2924/10253 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01S5/2214 ,  H01S5/227 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of producing a semiconductor device, comprising: a first plasma processing step of processing a surface of a resin layer laid on a semiconductor element and containing silicon, with a first plasma generated from a gas containing oxygen and fluorine, thereby forming an oxide film; and an electrode pad forming step of forming an electrode pad of a metal on the oxide film.

Abstract translation: 一种制造半导体器件的方法，包括：第一等离子体处理步骤，其处理由半导体元件上放置的含有硅的树脂层的表面，以及由含有氧和氟的气体产生的第一等离子体，从而形成氧化膜 ; 以及在所述氧化物膜上形成金属的电极焊盘的电极焊盘形成工序。

公开(公告)号：US20070176619A1

公开(公告)日：2007-08-02

申请号：US11697643

申请日：2007-04-06

Applicant: Igor Khandros ,  Gaetan Mathieu

Inventor： Igor Khandros ,  Gaetan Mathieu

IPC: G01R31/02

CPC classification number: B23K20/004 ,  B23K2101/40 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D21/02 ,  G01R1/06716 ,  G01R1/06744 ,  G01R1/07378 ,  H01L21/4853 ,  H01L21/4889 ,  H01L21/563 ,  H01L22/20 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/49 ,  H01L24/72 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/04042 ,  H01L2224/1134 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/49109 ,  H01L2224/73203 ,  H01L2224/73251 ,  H01L2224/78301 ,  H01L2224/81801 ,  H01L2224/85201 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01R12/52 ,  H05K1/141 ,  H05K3/20 ,  H05K3/308 ,  H05K3/326 ,  H05K3/328 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/4092 ,  H05K7/1069 ,  H05K2201/0311 ,  H05K2201/0397 ,  H05K2201/068 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2201/10757 ,  H05K2201/10878 ,  H05K2201/10909 ,  H05K2201/10946 ,  H05K2203/049 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49179 ,  Y10T29/49204 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/72

Abstract: An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the first end forming a first intimate bond to the surface of said conductive contact terminal without the use of a separate bonding material. An electrically conductive shell is provided and is formed of at least one layer of a conductive material enveloping the elongate member and forming a second intimate bond with at least a portion of the conductive contact terminal immediately adjacent the first intimate bond.

Abstract translation: 一种互连接触结构组件，包括具有表面的电子部件和由电子部件承载并可在表面处接触的导电接触。 接触结构包括具有第一端和第二端的内部柔性细长构件，并且第一端在不使用单独的接合材料的情况下形成与所述导电接触端子的表面的第一紧密结合。 提供导电外壳，并且由至少一层导电材料形成，该导电材料层包围细长构件，并与紧邻第一紧密接合的导电接触端子的至少一部分形成第二紧密接合。

公开(公告)号：US20070134903A1

公开(公告)日：2007-06-14

申请号：US11298030

申请日：2005-12-09

Applicant: Vivian Ryan

Inventor： Vivian Ryan

IPC: H01L21/44

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L23/295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/131 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48471 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00015 ,  H01L2924/00012

Abstract: An integrated circuit includes active circuitry and at least one bond pad. The at least one bond pad, in turn, comprises a metallization layer and a capping layer having one or more grooves. The metallization layer is in electrical contact with at least a portion of the active circuitry. In addition, the capping layer is formed over at least a portion of the metallization layer and is in electrical contact with the metallization layer. The grooves in the capping layer may be located only proximate to the edges of the bond pad or may run throughout the bond pad depending on the application.

Abstract translation: 集成电路包括有源电路和至少一个接合焊盘。 所述至少一个接合焊盘又包括金属化层和具有一个或多个凹槽的覆盖层。 金属化层与有源电路的至少一部分电接触。 此外，覆盖层形成在金属化层的至少一部分上并且与金属化层电接触。 覆盖层中的凹槽可以仅位于接合焊盘的边缘附近，或者可以根据应用而贯穿焊接垫。