摘要:
A technique which improves the reliability in coupling between a bump electrode of a semiconductor chip and wiring of a mounting substrate, more particularly a technique which guarantees the flatness of a bump electrode even when wiring lies in a top wiring layer under the bump electrode, thereby improving the reliability in coupling between the bump electrode and the wiring formed on a glass substrate. Wiring, comprised of a power line or signal line, and a dummy pattern are formed in a top wiring layer beneath a non-overlap region of a bump electrode. The dummy pattern is located to fill the space between wirings to reduce irregularities caused by the wirings and space in the top wiring layer. A surface protection film formed to cover the top wiring layer is flattened by CMP.
摘要:
The mechanisms of preparing bump structures described by using patterned anodes may simplify bump-making process, reduce manufacturing cost, and improve thickness uniformity within die and across the wafer. In addition, the mechanisms described above allow forming bumps with different heights to allow bumps to be integrated with elements on a substrate with different heights. Bumps with different heights expand the application of copper post bumps to enable further chip integration.
摘要:
A copper pillar bump has a sidewall protection layer formed of an electrolytic metal layer. The electrolytic metal layer is an electrolytic nickel layer, an electrolytic gold layer, and electrolytic copper layer, or an electrolytic silver layer.
摘要:
In a system for providing temporary or permanent connection of an integrated circuit die to a base substrate using electrical microsprings, a thermal element is provided that assists with cooling of the pad structure during use. The thermal element may be formed of the same material and my similar processes as the microsprings. The thermal element may be one or more block structures or one or more thermal microsprings. The thermal element may be provided with channels to contain and/or direct the flow of a thermal transfer fluid. Cooling of components associated with the pad structure (e.g., ICs) may be provided.
摘要:
A resin sheet for circuit boards (2) obtained from a macromolecular material of the energy ray curable type and used for embedding circuit chips, which has a double bond concentration of 4.5 to 25 mmol/g before being cured by irradiation with an energy ray; a sheet for circuit boards including the resin sheet for circuit boards, one face of the resin sheet being formed on a support (1); and a circuit board for displays (5) which is obtained by embedding circuit chips (3) into a face of the resin sheet for circuit boards in the sheet for circuit boards, followed by curing the resin sheet by irradiation with an energy ray. The resin sheet for circuit boards (2) can be advantageously used for producing circuit boards having embedded circuit chips for controlling each pixel of displays, in particular, flat panel displays efficiently with excellent quality and productivity.
摘要:
A process for coating a semiconductor wafer with a coating composition comprises curing the coating with a pulsed UV light, thereby preventing delamination during reflow operations. In a particular embodiment, the coating composition comprises both epoxy and acrylate resins. The epoxy resin can be cured thermally; the acrylate resin is cured by UV irradiation.
摘要:
A semiconductor package includes a semiconductor component including a circuit carrier with a plurality of inner contact pads, a semiconductor chip, and a plurality of electrical connections. An adhesion promotion layer is disposed on at least areas of the semiconductor component and a plastic encapsulation material encapsulates at least the semiconductor chip, the plurality of electrical connections and the plurality of the inner contact pads. Surface regions of the semiconductor component are selectively activated.
摘要:
In a method of manufacturing a semiconductor device, an electrode layer is formed on a surface of a semiconductor substrate, and a resin insulation layer is formed on the surface of the semiconductor substrate so that the electrode layer can be covered with the resin insulation layer. A tapered hole is formed in the insulation layer by using a tool bit having a rake angle of zero or a negative value. The tapered hole has an opening defined by the insulation layer, a bottom defined by the electrode layer, and a side wall connecting the opening to the bottom.
摘要:
This electronic component is provided with an inorganic substrate, a conductor film formed on a surface of the substrate, and bonding wires bonded to a part of said conductor film, and wire bonding sections are formed on at least a part of the electronic component. The part of the conductor film at least forming the aforementioned wire bonding sections contains an Ag-based metal formed of Ag or an alloy having Ag as the main constituent and a metal oxide which coats said Ag-based metal and which has, as a constituent element, any of the elements selected from the group consisting of Al, Zr, Ti, Y, Ca, Mg, and Zn. The coating quantity of the metal oxide is a quantity corresponding to 0.02 to 0.1 parts by mass relative to 100 parts by mass of the aforementioned Ag-based metal.
摘要:
A bonding wire for semiconductor devices includes a core member formed of an electrically-conductive metal, and a skin layer mainly composed of a face-centered cubic metal different from the core member and formed thereon. An orientation ratio of orientations in crystalline orientations in a wire lengthwise direction at a crystal face of a surface of the skin layer is greater than or equal to 50%, and the orientations have an angular difference relative to the wire lengthwise direction. The angular difference is within 15 degrees.