公开(公告)号：US09941140B2

公开(公告)日：2018-04-10

申请号：US15437193

申请日：2017-02-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Feng Chen ,  Kai-Chiang Wu ,  Chun-Lin Lu ,  Hung-Jui Kou

IPC: H01L21/3205 ,  H01L23/00 ,  H01L23/544 ,  H01L21/78 ,  H01L21/3213 ,  H01L23/433 ,  H01L21/283 ,  H01L21/34

CPC classification number: H01L21/3205 ,  H01L21/283 ,  H01L21/3213 ,  H01L21/34 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/10 ,  H01L23/147 ,  H01L23/16 ,  H01L23/28 ,  H01L23/31 ,  H01L23/3157 ,  H01L23/4334 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2021/6024 ,  H01L2223/5446 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/0226 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/11318 ,  H01L2224/13026 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81139 ,  H01L2224/92124 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/06 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/2064 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00

Abstract: Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a substrate, and a plurality of contact pads disposed over the substrate. The contact pads may be arranged in a ball grid array (BGA), and the may include a plurality of corners. A metal dam is disposed around each of the plurality of corners, such as corners of the BGA.

公开(公告)号：US20180090459A1

公开(公告)日：2018-03-29

申请号：US15456882

申请日：2017-03-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-woo KIM ,  Woon-bae KIM ,  Bo-in NOH ,  Go-woon SEONG ,  Ji-yong PARK

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L23/4985 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05584 ,  H01L2224/05666 ,  H01L2224/05686 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/1162 ,  H01L2224/13021 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/16227 ,  H01L2224/16502 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81204 ,  H01L2224/81805 ,  H01L2924/19105 ,  H01L2924/0105 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/013

Abstract: A film-type semiconductor package includes a metal lead portion arranged on a film substrate, a semiconductor chip including a pad, and a bump connecting the metal lead portion to the pad of the semiconductor chip. The bump includes a metal pillar arranged on the pad and including a first metal and a soldering portion arranged on an entire surface of the metal pillar, bonded to the metal lead portion, and including the first metal and a second metal that is different from the first metal.

公开(公告)号：US20180047685A1

公开(公告)日：2018-02-15

申请号：US15792312

申请日：2017-10-24

Applicant: Erick Merle Spory

Inventor： Erick Merle Spory

IPC: H01L23/00 ,  H01L23/26 ,  H01L23/498 ,  H01L23/057

CPC classification number: H01L24/05 ,  H01L23/057 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L24/98 ,  H01L2224/03424 ,  H01L2224/03464 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05554 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48599 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2924/16152 ,  H01L2924/19107 ,  H01L2924/00014

Abstract: A remapped extracted die is provided. The remapped extracted die includes an extracted die removed from a previous integrated circuit package. The extracted die includes a plurality of original bond pads having locations that do not correspond to desired pin assignments of a new package base and an interposer, bonded to the extracted die. The interposer includes first bond pads configured to receive new bond wires from the plurality of original bond pads, and second bond pads corresponding to desired pin assignments of the new package base, each individually electrically coupled to one of the first bond pads and configured to receive new bond wires from package leads or downbonds of the new package base.

公开(公告)号：US09859231B2

公开(公告)日：2018-01-02

申请号：US15269044

申请日：2016-09-19

Applicant: Skyworks Solutions, Inc.

Inventor： Weimin Sun ,  Peter J. Zampardi, Jr. ,  Hongxiao Shao

IPC: H05K1/11 ,  H01L23/66 ,  C25D5/02 ,  C25D5/12 ,  H05K1/02 ,  H05K3/34 ,  C25D7/06 ,  H01L23/00 ,  H01L23/498 ,  H05K1/09 ,  H05K3/10 ,  C25D17/00 ,  H05K3/24

CPC classification number: H01L23/66 ,  C25D5/022 ,  C25D5/12 ,  C25D7/0607 ,  C25D17/00 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2223/6605 ,  H01L2223/6611 ,  H01L2224/03424 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/04042 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05644 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48229 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/49111 ,  H01L2224/85205 ,  H01L2224/85411 ,  H01L2224/85416 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/15747 ,  H01L2924/2064 ,  H05K1/0243 ,  H05K1/09 ,  H05K1/111 ,  H05K3/10 ,  H05K3/244 ,  H05K3/3452 ,  H05K2203/049 ,  H05K2203/0597 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: To reduce radio frequency losses during operation of a radio frequency integrated circuit module, the radio frequency integrated circuit module is fabricated such that at least one of an edge of the wirebond pad on the copper trace and a sidewall of the copper trace is free from high-resistivity plating material. The unplated portion provides a path for the radio frequency current to flow around the high-resistivity material.

公开(公告)号：US20170372964A1

公开(公告)日：2017-12-28

申请号：US15695772

申请日：2017-09-05

Applicant: DECA Technologies Inc.

Inventor： Christopher M. Scanlan ,  Craig Bishop

IPC: H01L21/78 ,  H01L21/56 ,  H01L23/48 ,  H01L23/31 ,  H01L21/768 ,  H01L23/00 ,  H01L23/498 ,  H01L23/29

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L21/76877 ,  H01L23/295 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/92 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/05687 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/2101 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2224/95001 ,  H01L2224/96 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/3511 ,  Y02P80/30 ,  H01L2224/11 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2924/01074 ,  H01L2924/01023 ,  H01L2924/01013 ,  H01L2924/01079 ,  H01L2924/01047 ,  H01L2224/0231 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L21/304 ,  H01L23/3164 ,  H01L2224/03 ,  H01L2224/19 ,  H01L2924/01322

Abstract: A method of making a semiconductor package can include placing a single layer dielectric film on a temporary carrier substrate. A plurality of semiconductor die can be placed directly on the first surface of the single layer dielectric film. The single layer dielectric film can be cured to lock the plurality of semiconductor die in place on the single layer dielectric film. The plurality of semiconductor die can be encapsulated while directly on the single layer dielectric film with an encapsulant. The single layer dielectric film can be patterned utilizing a mask-less patterning technique to form a via hole after removing the temporary carrier substrate. A conductive layer can be formed directly on, substantially parallel to, and extending across, the second surface of the patterned single layer dielectric film, within the vial hole, and over the plurality of semiconductor die.

公开(公告)号：US09793106B2

公开(公告)日：2017-10-17

申请号：US14931822

申请日：2015-11-03

Applicant: Texas Instruments Incorporated

Inventor： Honglin Guo ,  Tim A. Taylor ,  Jeff A. West ,  Ricky A. Jackson ,  Byron Williams

IPC: H01L49/02 ,  H01G4/14 ,  H01L21/02 ,  H01G4/224 ,  H01L51/00 ,  H01G4/18 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L21/02118 ,  H01G4/14 ,  H01G4/18 ,  H01G4/224 ,  H01G4/236 ,  H01G4/33 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/0228 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L23/564 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L28/40 ,  H01L51/00 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/04042 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2224/45099

Abstract: It has been discovered that poor TDDB reliability of microelectronic device capacitors with organic polymer material in the capacitor dielectric is due to water molecules infiltrating the organic polymer material when the microelectronic device is exposed to water vapor in the operating ambient. Water molecule infiltration from water vapor in the ambient is effectively reduced by a moisture barrier comprising a layer of aluminum oxide formed by an atomic layer deposition (ALD) process. A microelectronic device includes a capacitor with organic polymer material in the capacitor dielectric and a moisture barrier with a layer of aluminum oxide formed by an ALD process.

公开(公告)号：US20170256496A1

公开(公告)日：2017-09-07

申请号：US15440442

申请日：2017-02-23

Applicant: XINTEC INC.

Inventor： Chia-Sheng LIN ,  Chaung-Lin LAI ,  Kuei-Wei CHEN

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L27/14618 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14683 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/0529 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/11 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/13211 ,  H01L2224/13216 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2924/146 ,  H01L2924/19102 ,  H01L2924/301 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2924/06 ,  H01L2924/01074

Abstract: A chip package including a substrate is provided. A sensing region or device region of the substrate is electrically connected to a conducting pad. A first insulating layer is disposed on the substrate. A redistribution layer is disposed on the first insulating layer. A first portion and a second portion of the redistribution layer are electrically connected to the conducting pad. A second insulating layer conformally extends on the first insulating layer, and covers side surfaces of the first portion and the second portion. A protection layer is disposed on the second insulating layer. A portion of the second insulating layer is located between the protection layer and the first insulating layer. A method of forming the chip package is also provided.

公开(公告)号：US20170256477A1

公开(公告)日：2017-09-07

申请号：US15601702

申请日：2017-05-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Chun Miao ,  Kai-Chiang Wu ,  Shih-Wei Liang

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/525 ,  H01L24/03 ,  H01L24/04 ,  H01L24/05 ,  H01L24/07 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02245 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/03424 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/11916 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/1413 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/00011 ,  H01L2924/013 ,  H01L2924/01322 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2224/81805 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/0105 ,  H01L2924/01051

Abstract: A structure includes a die substrate; a passivation layer on the die substrate; first and second interconnect structures on the passivation layer; and a barrier on the passivation layer, at least one of the first or second interconnect structures, or a combination thereof. The first and second interconnect structures comprise first and second via portions through the passivation layer to first and second conductive features of the die substrate, respectively. The first and second interconnect structures further comprise first and second pads, respectively, and first and second transition elements on a surface of the passivation layer between the first and second via portion and the first and second pad, respectively. The barrier is disposed between the first pad and the second pad. The barrier does not fully encircle at least one of the first pad or the second pad.

公开(公告)号：US09728527B2

公开(公告)日：2017-08-08

申请号：US14925807

申请日：2015-10-28

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC: H01L23/48 ,  H01L25/00 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L25/065 ,  H01L21/311 ,  H01L21/56 ,  H01L21/768

CPC classification number: H01L25/50 ,  H01L21/31111 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/49811 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/32 ,  H01L24/33 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/89 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02317 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0331 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/08146 ,  H01L2224/0823 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/13616 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14134 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/24147 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4805 ,  H01L2224/48108 ,  H01L2224/48149 ,  H01L2224/4903 ,  H01L2224/49426 ,  H01L2224/73201 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/386 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01028 ,  H01L2924/01082 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/16225 ,  H01L2224/81 ,  H01L2224/45616 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2224/45099

Abstract: An apparatus relating generally to a substrate is disclosed. In such an apparatus, a first bond via array has first wires extending from a surface of the substrate. A second bond via array has second wires extending from the surface of the substrate. The first bond via array is disposed at least partially within the second bond via array. The first wires of the first bond via array are of a first height. The second wires of the second bond via array are of a second height greater than the first height for coupling of at least one die to the first bond via array at least partially disposed within the second bond via array.

公开(公告)号：US20170221845A1

公开(公告)日：2017-08-03

申请号：US15490716

申请日：2017-04-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsien-Wei Chen ,  Jie Chen

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L24/09 ,  H01L21/56 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49838 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/0214 ,  H01L2224/02175 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02315 ,  H01L2224/02331 ,  H01L2224/02335 ,  H01L2224/0235 ,  H01L2224/02351 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0381 ,  H01L2224/0382 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/06131 ,  H01L2224/06136 ,  H01L2224/06179 ,  H01L2224/0912 ,  H01L2224/11013 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/221 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/06 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/01051 ,  H01L2924/01047 ,  H01L2924/00012

Abstract: Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to a second portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element comprises a first side and a second side coupled to the first side. The first side and the second side of the transition element are non-tangential to the PPI pad.